[GitHub] [tvm] vinx13 commented on a diff in pull request #12059: [MetaSchedule] Add MultiLevelTilingTensorCore rule for auto-tensorization on CUDA

[GitBox <gi...@apache.org>]

vinx13 commented on code in PR #12059:
URL: https://github.com/apache/tvm/pull/12059#discussion_r919290886


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include/tvm/meta_schedule/schedule_rule.h:
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@@ -173,6 +173,32 @@ class ScheduleRule : public runtime::ObjectRef {
       Optional<Integer> max_innermost_factor, Optional<Array<Integer>> vector_load_lens,
       Optional<Map<String, ObjectRef>> reuse_read, Optional<Map<String, ObjectRef>> reuse_write);
 
+  /*!
+   * \brief Extension of MultiLevelTiling for auto-tensorizing with a single group of tensor core
+   * intrinsics
+   * \param intrin_group A group of tensor core intrinsics. The map should contains key "init",
+   * "load_a", "load_b", "compute", "store", which represent the tensor intrin for initialization,
+   * loading operand A, loading operand B, tensor core computation, storing the result. The value of
+   * the map should be names of tensor intrinsics, must be registerd via TensorIntrin.register(...)
+   * beforehand
+   * \param structure The tiling structure. Recommended:
+   * - 'SSRSRS' on CPU
+   * - 'SSSRRSRS' on GPU
+   * \param tile_binds For each level of tiles, which thread axis it is bound to. Recommended:
+   * - NullOpt on CPU

Review Comment:
   AMX should be similar but it's not supported for now as it assumes wmma fragment memory scope. Removed mentioning CPU for now.



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