[GitHub] [incubator-nuttx] gustavonihei commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral

[GitBox <gi...@apache.org>]

gustavonihei commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r605952598



##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,273 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+                                size_t buflen);
+static int esp32c3_rng_open(FAR struct file *filep);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+  uint8_t *rd_buf;
+  sem_t    rd_sem;         /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+  .open  = esp32c3_rng_open,       /* open */
+  .read  = esp32c3_rng_read,       /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+  /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+   * of extra entropy from a hardware randomness source every APB clock cycle
+   * (provided WiFi or BT are enabled). To make sure entropy is not drained
+   * faster than it is added, this function needs to wait for at least 16 APB
+   * clock cycles after reading previous word. This implementation may
+   * actually wait a bit longer due to extra time spent in arithmetic and
+   * branch statements.
+   *
+   * As a (probably unnecessary) precaution to avoid returning the
+   * RNG state as-is, the result is XORed with additional
+   * WDEV_RND_REG reads while waiting.
+   */
+
+  uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+                                   esp32c3_clk_apb_freq();
+
+  static uint32_t last_ccount = 0;
+  uint32_t ccount;
+  uint32_t result = 0;
+
+  do
+    {
+      ccount = esp32c3_cpu_cycle_count();
+      result ^= getreg32(WDEV_RND_REG);
+    }
+  while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+  last_ccount = ccount;
+  return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_start
+ ****************************************************************************/
+
+static void esp32c3_rng_start(void)
+{
+  /* Nothing to do, bootloader already did it */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_stop
+ ****************************************************************************/
+
+static void esp32c3_rng_stop(void)
+{
+  /* Nothing to do */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_initialize
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void)
+{
+  _info("Initializing RNG\n");
+
+  memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
+
+  nxsem_init(&g_rngdev.rd_sem, 0, 1);
+  nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
+
+  esp32c3_rng_stop();
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
+
+static int esp32c3_rng_open(FAR struct file *filep)
+{
+  /* O_NONBLOCK is not supported */
+
+  if (filep->f_oflags & O_NONBLOCK)
+    {
+      _err("ESP32-C3 RNG doesn't support O_NONBLOCK mode.\n");
+      return -EPERM;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_read
+ ****************************************************************************/
+
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+                              size_t buflen)
+{
+  FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
+  ssize_t read_len;
+  uint8_t *rd_buf = (uint8_t *)buffer;
+
+  if (nxsem_wait(&priv->rd_sem) != OK)
+    {
+      return -EBUSY;
+    }
+
+  read_len = buflen;
+
+  /* start RNG and wait until the buffer is filled */
+
+  esp32c3_rng_start();
+
+  /* Now, got data */

Review comment:
       ```suggestion
     /* Now, got data */
   ```
   This comment is not needed here, since the previous comment states that it will wait for the buffer to be filled.




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