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Posted to commits@mynewt.apache.org by ma...@apache.org on 2017/03/10 18:37:09 UTC
[7/9] incubator-mynewt-core git commit: BSP for 'sensorhub' board
fixed openocd issues, seems to be ok
BSP for 'sensorhub' board fixed openocd issues, seems to be ok
Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/469eabd1
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/469eabd1
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/469eabd1
Branch: refs/heads/develop
Commit: 469eabd1ec9bb985dd6ccbd3399df6dd8cc7fd3e
Parents: b85fcd3
Author: Alan <ag...@gemcore.com>
Authored: Wed Mar 8 16:59:21 2017 -0800
Committer: Alan <ag...@gemcore.com>
Committed: Thu Mar 9 12:07:39 2017 -0800
----------------------------------------------------------------------
apps/boot/src/boot.c | 2 +-
diff.txt | 330 +++++++++++++++++
hw/bsp/sensorhub/boot-sensorhub.ld | 31 ++
hw/bsp/sensorhub/boot-stm32f4discovery.ld | 29 --
hw/bsp/sensorhub/bsp.yml | 16 +-
hw/bsp/sensorhub/f4discovery.cfg | 22 --
hw/bsp/sensorhub/include/bsp/bsp.h | 8 +-
hw/bsp/sensorhub/include/bsp/cmsis_nvic.h | 2 +-
hw/bsp/sensorhub/pkg.yml | 4 +-
hw/bsp/sensorhub/sensorhub.cfg | 22 ++
hw/bsp/sensorhub/sensorhub.ld | 31 ++
hw/bsp/sensorhub/sensorhub_debug.cmd | 3 +
hw/bsp/sensorhub/sensorhub_debug.sh | 39 ++
hw/bsp/sensorhub/sensorhub_download.cmd | 3 +
hw/bsp/sensorhub/sensorhub_download.sh | 42 +++
.../src/arch/cortex_m4/startup_STM32F40x.s | 353 ------------------
.../src/arch/cortex_m4/startup_STM32F427xx.s | 369 +++++++++++++++++++
hw/bsp/sensorhub/src/hal_bsp.c | 13 +-
hw/bsp/sensorhub/src/hal_bsp_sav.c | 123 +++++++
hw/bsp/sensorhub/stm32f4discovery.ld | 31 --
hw/bsp/sensorhub/stm32f4discovery_debug.cmd | 3 -
hw/bsp/sensorhub/stm32f4discovery_debug.sh | 39 --
hw/bsp/sensorhub/stm32f4discovery_download.cmd | 3 -
hw/bsp/sensorhub/stm32f4discovery_download.sh | 42 ---
hw/mcu/stm/stm32f4xx/src/hal_gpio.c | 8 +-
hw/mcu/stm/stm32f4xx/stm32f427.ld | 203 ++++++++++
26 files changed, 1220 insertions(+), 551 deletions(-)
----------------------------------------------------------------------
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/apps/boot/src/boot.c
----------------------------------------------------------------------
diff --git a/apps/boot/src/boot.c b/apps/boot/src/boot.c
index 9cd59e7..d6f0325 100755
--- a/apps/boot/src/boot.c
+++ b/apps/boot/src/boot.c
@@ -23,7 +23,7 @@
#include "syscfg/syscfg.h"
#include <flash_map/flash_map.h>
#include <os/os.h>
-#include <bsp/bsp.h>
+
#include <hal/hal_bsp.h>
#include <hal/hal_system.h>
#include <hal/hal_flash.h>
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/diff.txt
----------------------------------------------------------------------
diff --git a/diff.txt b/diff.txt
new file mode 100644
index 0000000..1496b88
--- /dev/null
+++ b/diff.txt
@@ -0,0 +1,330 @@
+diff --git a/apps/boot/src/boot.c b/apps/boot/src/boot.c
+index 9cd59e7..4f4f827 100755
+--- a/apps/boot/src/boot.c
++++ b/apps/boot/src/boot.c
+@@ -23,7 +23,7 @@
+ #include "syscfg/syscfg.h"
+ #include <flash_map/flash_map.h>
+ #include <os/os.h>
+-#include <bsp/bsp.h>
++//#include <bsp/bsp.h>
+ #include <hal/hal_bsp.h>
+ #include <hal/hal_system.h>
+ #include <hal/hal_flash.h>
+diff --git a/hw/bsp/sensorhub/boot-stm32f4discovery.ld b/hw/bsp/sensorhub/boot-stm32f4discovery.ld
+deleted file mode 100644
+index ae34f19..0000000
+--- a/hw/bsp/sensorhub/boot-stm32f4discovery.ld
++++ /dev/null
+@@ -1,31 +0,0 @@
+-/*
+- * Licensed to the Apache Software Foundation (ASF) under one
+- * or more contributor license agreements. See the NOTICE file
+- * distributed with this work for additional information
+- * regarding copyright ownership. The ASF licenses this file
+- * to you under the Apache License, Version 2.0 (the
+- * "License"); you may not use this file except in compliance
+- * with the License. You may obtain a copy of the License at
+- *
+- * http://www.apache.org/licenses/LICENSE-2.0
+- *
+- * Unless required by applicable law or agreed to in writing,
+- * software distributed under the License is distributed on an
+- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+- * KIND, either express or implied. See the License for the
+- * specific language governing permissions and limitations
+- * under the License.
+- */
+-
+-/* Linker script for STM32F427 when running from flash and using the bootloader */
+-
+-/* Linker script to configure memory regions. */
+-MEMORY
+-{
+- FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
+- CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
+- RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
+-}
+-
+-/* The bootloader does not contain an image header */
+-_imghdr_size = 0x0;
+diff --git a/hw/bsp/sensorhub/bsp.yml b/hw/bsp/sensorhub/bsp.yml
+index c87e36a..f19e0e8 100644
+--- a/hw/bsp/sensorhub/bsp.yml
++++ b/hw/bsp/sensorhub/bsp.yml
+@@ -20,15 +20,15 @@
+ bsp.arch: cortex_m4
+ bsp.compiler: compiler/arm-none-eabi-m4
+ bsp.linkerscript:
+- - "hw/bsp/stm32f4discovery/stm32f4discovery.ld"
++ - "hw/bsp/sensorhub/sensorhub.ld"
+ - "hw/mcu/stm/stm32f4xx/stm32f427.ld"
+ bsp.linkerscript.BOOT_LOADER.OVERWRITE:
+- - "hw/bsp/stm32f4discovery/boot-stm32f4discovery.ld"
++ - "hw/bsp/sensorhub/boot-sensorhub.ld"
+ - "hw/mcu/stm/stm32f4xx/stm32f427.ld"
+-bsp.downloadscript: "hw/bsp/stm32f4discovery/stm32f4discovery_download.sh"
+-bsp.debugscript: "hw/bsp/stm32f4discovery/stm32f4discovery_debug.sh"
+-bsp.downloadscript.WINDOWS.OVERRIDE: "hw/bsp/stm32f4discovery/stm32f4discovery_download.cmd"
+-bsp.debugscript.WINDOWS.OVERRIDE: "hw/bsp/stm32f4discovery/stm32f4discovery_debug.cmd"
++bsp.downloadscript: "hw/bsp/sensorhub/sensorhub_download.sh"
++bsp.debugscript: "hw/bsp/sensorhub/sensorhub_debug.sh"
++bsp.downloadscript.WINDOWS.OVERRIDE: "hw/bsp/sensorhub/sensorhub_download.cmd"
++bsp.debugscript.WINDOWS.OVERRIDE: "hw/bsp/sensorhub/sensorhub_debug.cmd"
+
+ bsp.flash_map:
+ areas:
+diff --git a/hw/bsp/sensorhub/f4discovery.cfg b/hw/bsp/sensorhub/f4discovery.cfg
+deleted file mode 100644
+index 3fa5699..0000000
+--- a/hw/bsp/sensorhub/f4discovery.cfg
++++ /dev/null
+@@ -1,22 +0,0 @@
+-#!/bin/sh
+-# Licensed to the Apache Software Foundation (ASF) under one
+-# or more contributor license agreements. See the NOTICE file
+-# distributed with this work for additional information
+-# regarding copyright ownership. The ASF licenses this file
+-# to you under the Apache License, Version 2.0 (the
+-# "License"); you may not use this file except in compliance
+-# with the License. You may obtain a copy of the License at
+-#
+-# http://www.apache.org/licenses/LICENSE-2.0
+-#
+-# Unless required by applicable law or agreed to in writing,
+-# software distributed under the License is distributed on an
+-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+-# KIND, either express or implied. See the License for the
+-# specific language governing permissions and limitations
+-# under the License.
+-
+-# JLink debugger
+-source [find interface/jlink.cfg]
+-transport select hla_swd
+-source [find target/stm32f4x.cfg]
+diff --git a/hw/bsp/sensorhub/include/bsp/bsp.h b/hw/bsp/sensorhub/include/bsp/bsp.h
+index f7866a2..ef7f6b4 100644
+--- a/hw/bsp/sensorhub/include/bsp/bsp.h
++++ b/hw/bsp/sensorhub/include/bsp/bsp.h
+@@ -1,4 +1,4 @@
+-/*
++quit/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+@@ -35,11 +35,10 @@ extern "C" {
+ /* More convenient section placement macros. */
+ #define bssnz_t sec_bss_nz_core
+
+-extern uint8_t _ram_start;
+-extern uint8_t _ccram_start;
+-
+ /* System SRAM including CCM (core coupled memory) data RAM. */
++extern uint8_t _ram_start;
+ #define RAM_SIZE (192 * 1024)
++extern uint8_t _ccram_start;
+ #define CCRAM_SIZE (64 * 1024)
+
+ /* 4KB of backup SRAM, accessible only from the CPU.
+@@ -54,14 +53,14 @@ extern uint8_t _ccram_start;
+ #define UART_CNT 1
+ #define CONSOLE_UART "uart0"
+
+-#if MYNEWT_VAL(BOOT_SERIAL)
++//#if MYNEWT_VAL(BOOT_SERIAL)
+ #define BOOT_SERIAL_DETECT_PIN 16 /* on Sensor Hub board BOOT0 is dedicated! */
+ #define BOOT_SERIAL_DETECT_PIN_CFG HAL_GPIO_PULL_UP
+ #define BOOT_SERIAL_DETECT_PIN_VAL 0
+
+ #define BOOT_SERIAL_REPORT_PIN LED_BLINK_PIN
+ #define BOOT_SERIAL_REPORT_FREQ (MYNEWT_VAL(OS_CPUTIME_FREQ) / 4)
+-#endif
++//#endif
+
+ #define NFFS_AREA_MAX (8)
+
+diff --git a/hw/bsp/sensorhub/src/hal_bsp.c b/hw/bsp/sensorhub/src/hal_bsp.c
+index 18a0f6c..1cea958 100644
+--- a/hw/bsp/sensorhub/src/hal_bsp.c
++++ b/hw/bsp/sensorhub/src/hal_bsp.c
+@@ -16,15 +16,10 @@
+ * specific language governing permissions and limitations
+ * under the License.
+ */
++#include <stdint.h>
++#include <stddef.h>
+ #include <assert.h>
+-
+-#include <syscfg/syscfg.h>
+-
+-#include <os/os_dev.h>
+-#if MYNEWT_VAL(UART_0)
+-#include <uart/uart.h>
+-#include <uart_hal/uart_hal.h>
+-#endif
++#include "syscfg/syscfg.h"
+
+ #include <hal/hal_bsp.h>
+ #include <hal/hal_gpio.h>
+@@ -35,7 +30,12 @@
+ #include <stm32f4xx_hal_gpio_ex.h>
+ #include <mcu/stm32f4_bsp.h>
+
+-#include "bsp/bsp.h"
++#if MYNEWT_VAL(UART_0)
++#include <uart/uart.h>
++#include <uart_hal/uart_hal.h>
++#endif
++#include "os/os_dev.h"
++#include "bsp.h"
+
+ #if MYNEWT_VAL(UART_0)
+ static struct uart_dev hal_uart0;
+diff --git a/hw/bsp/sensorhub/stm32f4discovery.ld b/hw/bsp/sensorhub/stm32f4discovery.ld
+deleted file mode 100644
+index 923a133..0000000
+--- a/hw/bsp/sensorhub/stm32f4discovery.ld
++++ /dev/null
+@@ -1,31 +0,0 @@
+-/*
+- * Licensed to the Apache Software Foundation (ASF) under one
+- * or more contributor license agreements. See the NOTICE file
+- * distributed with this work for additional information
+- * regarding copyright ownership. The ASF licenses this file
+- * to you under the Apache License, Version 2.0 (the
+- * "License"); you may not use this file except in compliance
+- * with the License. You may obtain a copy of the License at
+- *
+- * http://www.apache.org/licenses/LICENSE-2.0
+- *
+- * Unless required by applicable law or agreed to in writing,
+- * software distributed under the License is distributed on an
+- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+- * KIND, either express or implied. See the License for the
+- * specific language governing permissions and limitations
+- * under the License.
+- */
+-
+-/* Linker script for STM32F427 when running from flash and using the bootloader */
+-
+-/* Linker script to configure memory regions. */
+-MEMORY
+-{
+- FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* First image slot. */
+- CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
+- RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
+-}
+-
+-/* This linker script is used for images and thus contains an image header */
+-_imghdr_size = 0x20;
+diff --git a/hw/bsp/sensorhub/stm32f4discovery_debug.cmd b/hw/bsp/sensorhub/stm32f4discovery_debug.cmd
+deleted file mode 100755
+index d6cfc11..0000000
+--- a/hw/bsp/sensorhub/stm32f4discovery_debug.cmd
++++ /dev/null
+@@ -1,3 +0,0 @@
+-@rem Execute a shell with a script of the same name and .sh extension
+-
+-@bash "%~dp0%~n0.sh"
+diff --git a/hw/bsp/sensorhub/stm32f4discovery_debug.sh b/hw/bsp/sensorhub/stm32f4discovery_debug.sh
+deleted file mode 100755
+index 14b2a64..0000000
+--- a/hw/bsp/sensorhub/stm32f4discovery_debug.sh
++++ /dev/null
+@@ -1,39 +0,0 @@
+-#!/bin/sh
+-# Licensed to the Apache Software Foundation (ASF) under one
+-# or more contributor license agreements. See the NOTICE file
+-# distributed with this work for additional information
+-# regarding copyright ownership. The ASF licenses this file
+-# to you under the Apache License, Version 2.0 (the
+-# "License"); you may not use this file except in compliance
+-# with the License. You may obtain a copy of the License at
+-#
+-# http://www.apache.org/licenses/LICENSE-2.0
+-#
+-# Unless required by applicable law or agreed to in writing,
+-# software distributed under the License is distributed on an
+-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+-# KIND, either express or implied. See the License for the
+-# specific language governing permissions and limitations
+-# under the License.
+-#
+-
+-# Called with following variables set:
+-# - CORE_PATH is absolute path to @apache-mynewt-core
+-# - BSP_PATH is absolute path to hw/bsp/bsp_name
+-# - BIN_BASENAME is the path to prefix to target binary,
+-# .elf appended to name is the ELF file
+-# - FEATURES holds the target features string
+-# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+-# - RESET set if target should be reset when attaching
+-# - NO_GDB set if we should not start gdb to debug
+-#
+-. $CORE_PATH/hw/scripts/openocd.sh
+-
+-FILE_NAME=$BIN_BASENAME.elf
+-CFG="-s $BSP_PATH -f $BSP_PATH/f4discovery.cfg"
+-#ADG! CFG="-s $BSP_PATH -f /usr/share/openocd/scripts/interface/jlink.cfg -f /home/alan/dev/myproj-2/targets/stm_blinky/openocd.cfg"
+-
+-# Exit openocd when gdb detaches.
+-EXTRA_JTAG_CMD="$EXTRA_JTAG_CMD; stm32f4x.cpu configure -event gdb-detach {if {[stm32f4x.cpu curstate] eq \"halted\"} resume;shutdown}"
+-
+-openocd_debug
+diff --git a/hw/bsp/sensorhub/stm32f4discovery_download.cmd b/hw/bsp/sensorhub/stm32f4discovery_download.cmd
+deleted file mode 100755
+index d6cfc11..0000000
+--- a/hw/bsp/sensorhub/stm32f4discovery_download.cmd
++++ /dev/null
+@@ -1,3 +0,0 @@
+-@rem Execute a shell with a script of the same name and .sh extension
+-
+-@bash "%~dp0%~n0.sh"
+diff --git a/hw/bsp/sensorhub/stm32f4discovery_download.sh b/hw/bsp/sensorhub/stm32f4discovery_download.sh
+deleted file mode 100755
+index 5a3a17d..0000000
+--- a/hw/bsp/sensorhub/stm32f4discovery_download.sh
++++ /dev/null
+@@ -1,42 +0,0 @@
+-#!/bin/sh
+-# Licensed to the Apache Software Foundation (ASF) under one
+-# or more contributor license agreements. See the NOTICE file
+-# distributed with this work for additional information
+-# regarding copyright ownership. The ASF licenses this file
+-# to you under the Apache License, Version 2.0 (the
+-# "License"); you may not use this file except in compliance
+-# with the License. You may obtain a copy of the License at
+-#
+-# http://www.apache.org/licenses/LICENSE-2.0
+-#
+-# Unless required by applicable law or agreed to in writing,
+-# software distributed under the License is distributed on an
+-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+-# KIND, either express or implied. See the License for the
+-# specific language governing permissions and limitations
+-# under the License.
+-#
+-
+-# Called with following variables set:
+-# - CORE_PATH is absolute path to @apache-mynewt-core
+-# - BSP_PATH is absolute path to hw/bsp/bsp_name
+-# - BIN_BASENAME is the path to prefix to target binary,
+-# .elf appended to name is the ELF file
+-# - IMAGE_SLOT is the image slot to download to (for non-mfg-image, non-boot)
+-# - FEATURES holds the target features string
+-# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+-# - MFG_IMAGE is "1" if this is a manufacturing image
+-# - FLASH_OFFSET contains the flash offset to download to
+-# - BOOT_LOADER is set if downloading a bootloader
+-. $CORE_PATH/hw/scripts/openocd.sh
+-
+-CFG="-s $BSP_PATH -f f4discovery.cfg"
+-#ADG! CFG="-s $BSP_PATH -f /usr/share/openocd/scripts/interface/jlink.cfg -f /home/alan/dev/myproj-2/targets/stm_blinky/openocd.cfg"
+-
+-if [ "$MFG_IMAGE" ]; then
+- FLASH_OFFSET=0x08000000
+-fi
+-
+-common_file_to_load
+-openocd_load
+-openocd_reset_run
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/boot-sensorhub.ld
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/boot-sensorhub.ld b/hw/bsp/sensorhub/boot-sensorhub.ld
new file mode 100644
index 0000000..ae34f19
--- /dev/null
+++ b/hw/bsp/sensorhub/boot-sensorhub.ld
@@ -0,0 +1,31 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+/* Linker script for STM32F427 when running from flash and using the bootloader */
+
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
+ CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
+}
+
+/* The bootloader does not contain an image header */
+_imghdr_size = 0x0;
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/boot-stm32f4discovery.ld
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/boot-stm32f4discovery.ld b/hw/bsp/sensorhub/boot-stm32f4discovery.ld
deleted file mode 100644
index 342de6a..0000000
--- a/hw/bsp/sensorhub/boot-stm32f4discovery.ld
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-/* Linker script to configure memory regions. */
-MEMORY
-{
- FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
- CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
- RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
-}
-
-/* The bootloader does not contain an image header */
-_imghdr_size = 0x0;
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/bsp.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/bsp.yml b/hw/bsp/sensorhub/bsp.yml
index 658cb21..f19e0e8 100644
--- a/hw/bsp/sensorhub/bsp.yml
+++ b/hw/bsp/sensorhub/bsp.yml
@@ -20,15 +20,15 @@
bsp.arch: cortex_m4
bsp.compiler: compiler/arm-none-eabi-m4
bsp.linkerscript:
- - "hw/bsp/stm32f4discovery/stm32f4discovery.ld"
- - "hw/mcu/stm/stm32f4xx/stm32f407.ld"
+ - "hw/bsp/sensorhub/sensorhub.ld"
+ - "hw/mcu/stm/stm32f4xx/stm32f427.ld"
bsp.linkerscript.BOOT_LOADER.OVERWRITE:
- - "hw/bsp/stm32f4discovery/boot-stm32f4discovery.ld"
- - "hw/mcu/stm/stm32f4xx/stm32f407.ld"
-bsp.downloadscript: "hw/bsp/stm32f4discovery/stm32f4discovery_download.sh"
-bsp.debugscript: "hw/bsp/stm32f4discovery/stm32f4discovery_debug.sh"
-bsp.downloadscript.WINDOWS.OVERRIDE: "hw/bsp/stm32f4discovery/stm32f4discovery_download.cmd"
-bsp.debugscript.WINDOWS.OVERRIDE: "hw/bsp/stm32f4discovery/stm32f4discovery_debug.cmd"
+ - "hw/bsp/sensorhub/boot-sensorhub.ld"
+ - "hw/mcu/stm/stm32f4xx/stm32f427.ld"
+bsp.downloadscript: "hw/bsp/sensorhub/sensorhub_download.sh"
+bsp.debugscript: "hw/bsp/sensorhub/sensorhub_debug.sh"
+bsp.downloadscript.WINDOWS.OVERRIDE: "hw/bsp/sensorhub/sensorhub_download.cmd"
+bsp.debugscript.WINDOWS.OVERRIDE: "hw/bsp/sensorhub/sensorhub_debug.cmd"
bsp.flash_map:
areas:
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/f4discovery.cfg
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/f4discovery.cfg b/hw/bsp/sensorhub/f4discovery.cfg
deleted file mode 100644
index 694ab8d..0000000
--- a/hw/bsp/sensorhub/f4discovery.cfg
+++ /dev/null
@@ -1,22 +0,0 @@
-#!/bin/sh
-# Licensed to the Apache Software Foundation (ASF) under one
-# or more contributor license agreements. See the NOTICE file
-# distributed with this work for additional information
-# regarding copyright ownership. The ASF licenses this file
-# to you under the Apache License, Version 2.0 (the
-# "License"); you may not use this file except in compliance
-# with the License. You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing,
-# software distributed under the License is distributed on an
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-# KIND, either express or implied. See the License for the
-# specific language governing permissions and limitations
-# under the License.
-
-# New version of St-link
-source [find interface/stlink-v2-1.cfg]
-transport select hla_swd
-source [find target/stm32f4x.cfg]
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/include/bsp/bsp.h
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/include/bsp/bsp.h b/hw/bsp/sensorhub/include/bsp/bsp.h
index da9ffc4..822a2ca 100644
--- a/hw/bsp/sensorhub/include/bsp/bsp.h
+++ b/hw/bsp/sensorhub/include/bsp/bsp.h
@@ -35,11 +35,11 @@ extern "C" {
/* More convenient section placement macros. */
#define bssnz_t sec_bss_nz_core
+/* System SRAM */
extern uint8_t _ram_start;
+#define RAM_SIZE (192 * 1024)
+/* System CCM (core coupled memory) data RAM. */
extern uint8_t _ccram_start;
-
-/* System SRAM including CCM (core coupled memory) data RAM. */
-#define RAM_SIZE (256 * 1024)
#define CCRAM_SIZE (64 * 1024)
/* 4KB of backup SRAM, accessible only from the CPU.
@@ -50,7 +50,7 @@ extern uint8_t _ccram_start;
/* LED pins */
#define LED_BLINK_PIN MCU_GPIO_PORTD(12)
-/* UART */
+/* UART pins */
#define UART_CNT 1
#define CONSOLE_UART "uart0"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/include/bsp/cmsis_nvic.h
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/include/bsp/cmsis_nvic.h b/hw/bsp/sensorhub/include/bsp/cmsis_nvic.h
index d0c8b44..f61c10b 100644
--- a/hw/bsp/sensorhub/include/bsp/cmsis_nvic.h
+++ b/hw/bsp/sensorhub/include/bsp/cmsis_nvic.h
@@ -9,7 +9,7 @@
#include <stdint.h>
-#define NVIC_NUM_VECTORS (16 + 81) // CORE + MCU Peripherals
+#define NVIC_NUM_VECTORS (16 + 90) // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET 16
#include "stm32f4xx.h"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/pkg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/pkg.yml b/hw/bsp/sensorhub/pkg.yml
index d329ea4..d4063c9 100644
--- a/hw/bsp/sensorhub/pkg.yml
+++ b/hw/bsp/sensorhub/pkg.yml
@@ -25,9 +25,9 @@ pkg.homepage: "http://mynewt.apache.org/"
pkg.keywords:
- stm32
- stm32f4
- - discovery
+ - sensorhub
-pkg.cflags: -DSTM32F407xx
+pkg.cflags: -DSTM32F427xx
pkg.cflags.HARDFLOAT:
- -mfloat-abi=hard -mfpu=fpv4-sp-d16
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/sensorhub.cfg
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/sensorhub.cfg b/hw/bsp/sensorhub/sensorhub.cfg
new file mode 100644
index 0000000..0758e0a
--- /dev/null
+++ b/hw/bsp/sensorhub/sensorhub.cfg
@@ -0,0 +1,22 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+
+# JLink debugger
+source [find interface/jlink.cfg]
+transport select jtag
+source [find target/stm32f4x.cfg]
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/sensorhub.ld
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/sensorhub.ld b/hw/bsp/sensorhub/sensorhub.ld
new file mode 100644
index 0000000..923a133
--- /dev/null
+++ b/hw/bsp/sensorhub/sensorhub.ld
@@ -0,0 +1,31 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+/* Linker script for STM32F427 when running from flash and using the bootloader */
+
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* First image slot. */
+ CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
+}
+
+/* This linker script is used for images and thus contains an image header */
+_imghdr_size = 0x20;
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/sensorhub_debug.cmd
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/sensorhub_debug.cmd b/hw/bsp/sensorhub/sensorhub_debug.cmd
new file mode 100755
index 0000000..d6cfc11
--- /dev/null
+++ b/hw/bsp/sensorhub/sensorhub_debug.cmd
@@ -0,0 +1,3 @@
+@rem Execute a shell with a script of the same name and .sh extension
+
+@bash "%~dp0%~n0.sh"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/sensorhub_debug.sh
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/sensorhub_debug.sh b/hw/bsp/sensorhub/sensorhub_debug.sh
new file mode 100755
index 0000000..109aa55
--- /dev/null
+++ b/hw/bsp/sensorhub/sensorhub_debug.sh
@@ -0,0 +1,39 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+# Called with following variables set:
+# - CORE_PATH is absolute path to @apache-mynewt-core
+# - BSP_PATH is absolute path to hw/bsp/bsp_name
+# - BIN_BASENAME is the path to prefix to target binary,
+# .elf appended to name is the ELF file
+# - FEATURES holds the target features string
+# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+# - RESET set if target should be reset when attaching
+# - NO_GDB set if we should not start gdb to debug
+#
+. $CORE_PATH/hw/scripts/openocd.sh
+
+FILE_NAME=$BIN_BASENAME.elf
+CFG="-s $BSP_PATH -f $BSP_PATH/sensorhub.cfg"
+#ADG! CFG="-s $BSP_PATH -f /usr/share/openocd/scripts/interface/jlink.cfg -f /home/alan/dev/myproj-2/targets/stm_blinky/openocd.cfg"
+
+# Exit openocd when gdb detaches.
+EXTRA_JTAG_CMD="$EXTRA_JTAG_CMD; stm32f4x.cpu configure -event gdb-detach {if {[stm32f4x.cpu curstate] eq \"halted\"} resume;shutdown}"
+
+openocd_debug
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/sensorhub_download.cmd
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/sensorhub_download.cmd b/hw/bsp/sensorhub/sensorhub_download.cmd
new file mode 100755
index 0000000..d6cfc11
--- /dev/null
+++ b/hw/bsp/sensorhub/sensorhub_download.cmd
@@ -0,0 +1,3 @@
+@rem Execute a shell with a script of the same name and .sh extension
+
+@bash "%~dp0%~n0.sh"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/sensorhub_download.sh
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/sensorhub_download.sh b/hw/bsp/sensorhub/sensorhub_download.sh
new file mode 100755
index 0000000..14fe38a
--- /dev/null
+++ b/hw/bsp/sensorhub/sensorhub_download.sh
@@ -0,0 +1,42 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+# Called with following variables set:
+# - CORE_PATH is absolute path to @apache-mynewt-core
+# - BSP_PATH is absolute path to hw/bsp/bsp_name
+# - BIN_BASENAME is the path to prefix to target binary,
+# .elf appended to name is the ELF file
+# - IMAGE_SLOT is the image slot to download to (for non-mfg-image, non-boot)
+# - FEATURES holds the target features string
+# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+# - MFG_IMAGE is "1" if this is a manufacturing image
+# - FLASH_OFFSET contains the flash offset to download to
+# - BOOT_LOADER is set if downloading a bootloader
+. $CORE_PATH/hw/scripts/openocd.sh
+
+CFG="-s $BSP_PATH -f sensorhub.cfg"
+#ADG! CFG="-s $BSP_PATH -f /usr/share/openocd/scripts/interface/jlink.cfg -f /home/alan/dev/myproj-2/targets/stm_blinky/openocd.cfg"
+
+if [ "$MFG_IMAGE" ]; then
+ FLASH_OFFSET=0x08000000
+fi
+
+common_file_to_load
+openocd_load
+openocd_reset_run
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F40x.s
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F40x.s b/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F40x.s
deleted file mode 100644
index e84feac..0000000
--- a/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F40x.s
+++ /dev/null
@@ -1,353 +0,0 @@
-/* File: startup_STM32F40x.S
- * Purpose: startup file for Cortex-M4 devices. Should use with
- * GCC for ARM Embedded Processors
- * Version: V1.4
- * Date: 09 July 2012
- *
- * Copyright (c) 2011, 2012, ARM Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- * Neither the name of the ARM Limited nor the
- names of its contributors may be used to endorse or promote products
- derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
-#ifdef __STACK_SIZE
- .equ Stack_Size, __STACK_SIZE
-#else
- .equ Stack_Size, 0xc00
-#endif
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long MemManage_Handler /* MPU Fault Handler */
- .long BusFault_Handler /* Bus Fault Handler */
- .long UsageFault_Handler /* Usage Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long DebugMon_Handler /* Debug Monitor Handler */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External interrupts */
- .long WWDG_IRQHandler /* Window WatchDog */
- .long PVD_IRQHandler /* PVD through EXTI Line detection */
- .long TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
- .long RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
- .long FLASH_IRQHandler /* FLASH */
- .long RCC_IRQHandler /* RCC */
- .long EXTI0_IRQHandler /* EXTI Line0 */
- .long EXTI1_IRQHandler /* EXTI Line1 */
- .long EXTI2_IRQHandler /* EXTI Line2 */
- .long EXTI3_IRQHandler /* EXTI Line3 */
- .long EXTI4_IRQHandler /* EXTI Line4 */
- .long DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
- .long DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
- .long DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
- .long DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
- .long DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
- .long DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
- .long DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
- .long ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
- .long CAN1_TX_IRQHandler /* CAN1 TX */
- .long CAN1_RX0_IRQHandler /* CAN1 RX0 */
- .long CAN1_RX1_IRQHandler /* CAN1 RX1 */
- .long CAN1_SCE_IRQHandler /* CAN1 SCE */
- .long EXTI9_5_IRQHandler /* External Line[9:5]s */
- .long TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
- .long TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
- .long TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
- .long TIM1_CC_IRQHandler /* TIM1 Capture Compare */
- .long TIM2_IRQHandler /* TIM2 */
- .long TIM3_IRQHandler /* TIM3 */
- .long TIM4_IRQHandler /* TIM4 */
- .long I2C1_EV_IRQHandler /* I2C1 Event */
- .long I2C1_ER_IRQHandler /* I2C1 Error */
- .long I2C2_EV_IRQHandler /* I2C2 Event */
- .long I2C2_ER_IRQHandler /* I2C2 Error */
- .long SPI1_IRQHandler /* SPI1 */
- .long SPI2_IRQHandler /* SPI2 */
- .long USART1_IRQHandler /* USART1 */
- .long USART2_IRQHandler /* USART2 */
- .long USART3_IRQHandler /* USART3 */
- .long EXTI15_10_IRQHandler /* External Line[15:10]s */
- .long RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
- .long OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
- .long TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
- .long TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
- .long TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
- .long TIM8_CC_IRQHandler /* TIM8 Capture Compare */
- .long DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
- .long FSMC_IRQHandler /* FSMC */
- .long SDIO_IRQHandler /* SDIO */
- .long TIM5_IRQHandler /* TIM5 */
- .long SPI3_IRQHandler /* SPI3 */
- .long UART4_IRQHandler /* UART4 */
- .long UART5_IRQHandler /* UART5 */
- .long TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
- .long TIM7_IRQHandler /* TIM7 */
- .long DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
- .long DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
- .long DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
- .long DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
- .long DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
- .long ETH_IRQHandler /* Ethernet */
- .long ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
- .long CAN2_TX_IRQHandler /* CAN2 TX */
- .long CAN2_RX0_IRQHandler /* CAN2 RX0 */
- .long CAN2_RX1_IRQHandler /* CAN2 RX1 */
- .long CAN2_SCE_IRQHandler /* CAN2 SCE */
- .long OTG_FS_IRQHandler /* USB OTG FS */
- .long DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
- .long DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
- .long DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
- .long USART6_IRQHandler /* USART6 */
- .long I2C3_EV_IRQHandler /* I2C3 event */
- .long I2C3_ER_IRQHandler /* I2C3 error */
- .long OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
- .long OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
- .long OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
- .long OTG_HS_IRQHandler /* USB OTG HS */
- .long DCMI_IRQHandler /* DCMI */
- .long CRYP_IRQHandler /* CRYP crypto */
- .long HASH_RNG_IRQHandler /* Hash and Rng */
- .long FPU_IRQHandler /* FPU */
-
- .size __isr_vector, . - __isr_vector
-
- .text
- .thumb
- .thumb_func
- .align 2
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
-/* Copy data core section from flash to RAM */
- ldr r1, =__etext
- ldr r2, =__coredata_start__
- ldr r3, =__coredata_end__
-
-.LC0:
- cmp r2, r3
- ittt lt
- ldrlt r0, [r1], #4
- strlt r0, [r2], #4
- blt .LC0
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__ecoredata
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
-.LC1:
- cmp r2, r3
- ittt lt
- ldrlt r0, [r1], #4
- strlt r0, [r2], #4
- blt .LC1
-
-/* Set the bss core section to zero */
- mov r0, #0
- ldr r1, =__corebss_start__
- ldr r2, =__corebss_end__
-
-.LC2:
- cmp r1, r2
- itt lt
- strlt r0, [r1], #4
- blt .LC2
-
- /* Set the other bss section to zero as well*/
- ldr r1, =__bss_start__
- ldr r2, =__bss_end__
-
-.LC3:
- cmp r1, r2
- itt lt
- strlt r0, [r1], #4
- blt .LC3
-
-/* Call system initialization and startup routines */
- ldr r0, =SystemInit
- blx r0
- ldr r0, =_start
- bx r0
- .pool
- .size Reset_Handler, . - Reset_Handler
-
- .text
-/* Macro to define default handlers. Default handler
- * will be weak symbol and just dead loops. They can be
- * overwritten by other handlers */
- .macro def_default_handler handler_name
- .align 1
- .thumb_func
- .weak \handler_name
- .type \handler_name, %function
-\handler_name :
- b .
- .size \handler_name, . - \handler_name
- .endm
-
- def_default_handler NMI_Handler
- def_default_handler HardFault_Handler
- def_default_handler MemManage_Handler
- def_default_handler BusFault_Handler
- def_default_handler UsageFault_Handler
- def_default_handler SVC_Handler
- def_default_handler DebugMon_Handler
- def_default_handler PendSV_Handler
- def_default_handler SysTick_Handler
- def_default_handler Default_Handler
-
- .macro def_irq_default_handler handler_name
- .weak \handler_name
- .set \handler_name, Default_Handler
- .endm
-
- def_irq_default_handler WWDG_IRQHandler
- def_irq_default_handler PVD_IRQHandler
- def_irq_default_handler TAMP_STAMP_IRQHandler
- def_irq_default_handler RTC_WKUP_IRQHandler
- def_irq_default_handler FLASH_IRQHandler
- def_irq_default_handler RCC_IRQHandler
- def_irq_default_handler EXTI0_IRQHandler
- def_irq_default_handler EXTI1_IRQHandler
- def_irq_default_handler EXTI2_IRQHandler
- def_irq_default_handler EXTI3_IRQHandler
- def_irq_default_handler EXTI4_IRQHandler
- def_irq_default_handler DMA1_Stream0_IRQHandler
- def_irq_default_handler DMA1_Stream1_IRQHandler
- def_irq_default_handler DMA1_Stream2_IRQHandler
- def_irq_default_handler DMA1_Stream3_IRQHandler
- def_irq_default_handler DMA1_Stream4_IRQHandler
- def_irq_default_handler DMA1_Stream5_IRQHandler
- def_irq_default_handler DMA1_Stream6_IRQHandler
- def_irq_default_handler ADC_IRQHandler
- def_irq_default_handler CAN1_TX_IRQHandler
- def_irq_default_handler CAN1_RX0_IRQHandler
- def_irq_default_handler CAN1_RX1_IRQHandler
- def_irq_default_handler CAN1_SCE_IRQHandler
- def_irq_default_handler EXTI9_5_IRQHandler
- def_irq_default_handler TIM1_BRK_TIM9_IRQHandler
- def_irq_default_handler TIM1_UP_TIM10_IRQHandler
- def_irq_default_handler TIM1_TRG_COM_TIM11_IRQHandler
- def_irq_default_handler TIM1_CC_IRQHandler
- def_irq_default_handler TIM2_IRQHandler
- def_irq_default_handler TIM3_IRQHandler
- def_irq_default_handler TIM4_IRQHandler
- def_irq_default_handler I2C1_EV_IRQHandler
- def_irq_default_handler I2C1_ER_IRQHandler
- def_irq_default_handler I2C2_EV_IRQHandler
- def_irq_default_handler I2C2_ER_IRQHandler
- def_irq_default_handler SPI1_IRQHandler
- def_irq_default_handler SPI2_IRQHandler
- def_irq_default_handler USART1_IRQHandler
- def_irq_default_handler USART2_IRQHandler
- def_irq_default_handler USART3_IRQHandler
- def_irq_default_handler EXTI15_10_IRQHandler
- def_irq_default_handler RTC_Alarm_IRQHandler
- def_irq_default_handler OTG_FS_WKUP_IRQHandler
- def_irq_default_handler TIM8_BRK_TIM12_IRQHandler
- def_irq_default_handler TIM8_UP_TIM13_IRQHandler
- def_irq_default_handler TIM8_TRG_COM_TIM14_IRQHandler
- def_irq_default_handler TIM8_CC_IRQHandler
- def_irq_default_handler DMA1_Stream7_IRQHandler
- def_irq_default_handler FSMC_IRQHandler
- def_irq_default_handler SDIO_IRQHandler
- def_irq_default_handler TIM5_IRQHandler
- def_irq_default_handler SPI3_IRQHandler
- def_irq_default_handler UART4_IRQHandler
- def_irq_default_handler UART5_IRQHandler
- def_irq_default_handler TIM6_DAC_IRQHandler
- def_irq_default_handler TIM7_IRQHandler
- def_irq_default_handler DMA2_Stream0_IRQHandler
- def_irq_default_handler DMA2_Stream1_IRQHandler
- def_irq_default_handler DMA2_Stream2_IRQHandler
- def_irq_default_handler DMA2_Stream3_IRQHandler
- def_irq_default_handler DMA2_Stream4_IRQHandler
- def_irq_default_handler ETH_IRQHandler
- def_irq_default_handler ETH_WKUP_IRQHandler
- def_irq_default_handler CAN2_TX_IRQHandler
- def_irq_default_handler CAN2_RX0_IRQHandler
- def_irq_default_handler CAN2_RX1_IRQHandler
- def_irq_default_handler CAN2_SCE_IRQHandler
- def_irq_default_handler OTG_FS_IRQHandler
- def_irq_default_handler DMA2_Stream5_IRQHandler
- def_irq_default_handler DMA2_Stream6_IRQHandler
- def_irq_default_handler DMA2_Stream7_IRQHandler
- def_irq_default_handler USART6_IRQHandler
- def_irq_default_handler I2C3_EV_IRQHandler
- def_irq_default_handler I2C3_ER_IRQHandler
- def_irq_default_handler OTG_HS_EP1_OUT_IRQHandler
- def_irq_default_handler OTG_HS_EP1_IN_IRQHandler
- def_irq_default_handler OTG_HS_WKUP_IRQHandler
- def_irq_default_handler OTG_HS_IRQHandler
- def_irq_default_handler DCMI_IRQHandler
- def_irq_default_handler CRYP_IRQHandler
- def_irq_default_handler HASH_RNG_IRQHandler
- def_irq_default_handler FPU_IRQHandler
- def_irq_default_handler DEF_IRQHandler
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F427xx.s
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F427xx.s b/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F427xx.s
new file mode 100644
index 0000000..996ad81
--- /dev/null
+++ b/hw/bsp/sensorhub/src/arch/cortex_m4/startup_STM32F427xx.s
@@ -0,0 +1,369 @@
+/* File: startup_STM32F42x.S
+ * Purpose: startup file for Cortex-M4 devices. Should use with
+ * GCC for ARM Embedded Processors
+ * Version: V1.4
+ * Date: 09 July 2012
+ *
+ * Copyright (c) 2011, 2012, ARM Limited
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the ARM Limited nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ .syntax unified
+ .arch armv7-m
+
+ .section .stack
+ .align 3
+#ifdef __STACK_SIZE
+ .equ Stack_Size, __STACK_SIZE
+#else
+ .equ Stack_Size, 0xc00
+#endif
+ .globl __StackTop
+ .globl __StackLimit
+__StackLimit:
+ .space Stack_Size
+ .size __StackLimit, . - __StackLimit
+__StackTop:
+ .size __StackTop, . - __StackTop
+
+ .section .heap
+ .align 3
+#ifdef __HEAP_SIZE
+ .equ Heap_Size, __HEAP_SIZE
+#else
+ .equ Heap_Size, 0
+#endif
+ .globl __HeapBase
+ .globl __HeapLimit
+__HeapBase:
+ .if Heap_Size
+ .space Heap_Size
+ .endif
+ .size __HeapBase, . - __HeapBase
+__HeapLimit:
+ .size __HeapLimit, . - __HeapLimit
+
+ .section .isr_vector
+ .align 2
+ .globl __isr_vector
+__isr_vector:
+ .long __StackTop /* Top of Stack */
+ .long Reset_Handler /* Reset Handler */
+ .long NMI_Handler /* NMI Handler */
+ .long HardFault_Handler /* Hard Fault Handler */
+ .long MemManage_Handler /* MPU Fault Handler */
+ .long BusFault_Handler /* Bus Fault Handler */
+ .long UsageFault_Handler /* Usage Fault Handler */
+ .long 0 /* Reserved */
+ .long 0 /* Reserved */
+ .long 0 /* Reserved */
+ .long 0 /* Reserved */
+ .long SVC_Handler /* SVCall Handler */
+ .long DebugMon_Handler /* Debug Monitor Handler */
+ .long 0 /* Reserved */
+ .long PendSV_Handler /* PendSV Handler */
+ .long SysTick_Handler /* SysTick Handler */
+
+ /* External interrupts */
+ .long WWDG_IRQHandler /* Window WatchDog */
+ .long PVD_IRQHandler /* PVD through EXTI Line detection */
+ .long TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
+ .long RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
+ .long FLASH_IRQHandler /* FLASH */
+ .long RCC_IRQHandler /* RCC */
+ .long EXTI0_IRQHandler /* EXTI Line0 */
+ .long EXTI1_IRQHandler /* EXTI Line1 */
+ .long EXTI2_IRQHandler /* EXTI Line2 */
+ .long EXTI3_IRQHandler /* EXTI Line3 */
+ .long EXTI4_IRQHandler /* EXTI Line4 */
+ .long DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
+ .long DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
+ .long DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
+ .long DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
+ .long DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
+ .long DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
+ .long DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
+ .long ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
+ .long CAN1_TX_IRQHandler /* CAN1 TX */
+ .long CAN1_RX0_IRQHandler /* CAN1 RX0 */
+ .long CAN1_RX1_IRQHandler /* CAN1 RX1 */
+ .long CAN1_SCE_IRQHandler /* CAN1 SCE */
+ .long EXTI9_5_IRQHandler /* External Line[9:5]s */
+ .long TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
+ .long TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
+ .long TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
+ .long TIM1_CC_IRQHandler /* TIM1 Capture Compare */
+ .long TIM2_IRQHandler /* TIM2 */
+ .long TIM3_IRQHandler /* TIM3 */
+ .long TIM4_IRQHandler /* TIM4 */
+ .long I2C1_EV_IRQHandler /* I2C1 Event */
+ .long I2C1_ER_IRQHandler /* I2C1 Error */
+ .long I2C2_EV_IRQHandler /* I2C2 Event */
+ .long I2C2_ER_IRQHandler /* I2C2 Error */
+ .long SPI1_IRQHandler /* SPI1 */
+ .long SPI2_IRQHandler /* SPI2 */
+ .long USART1_IRQHandler /* USART1 */
+ .long USART2_IRQHandler /* USART2 */
+ .long USART3_IRQHandler /* USART3 */
+ .long EXTI15_10_IRQHandler /* External Line[15:10]s */
+ .long RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
+ .long OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
+ .long TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
+ .long TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
+ .long TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
+ .long TIM8_CC_IRQHandler /* TIM8 Capture Compare */
+ .long DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
+ .long FSMC_IRQHandler /* FSMC */
+ .long SDIO_IRQHandler /* SDIO */
+ .long TIM5_IRQHandler /* TIM5 */
+ .long SPI3_IRQHandler /* SPI3 */
+ .long UART4_IRQHandler /* UART4 */
+ .long UART5_IRQHandler /* UART5 */
+ .long TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
+ .long TIM7_IRQHandler /* TIM7 */
+ .long DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
+ .long DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
+ .long DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
+ .long DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
+ .long DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
+ .long ETH_IRQHandler /* Ethernet */
+ .long ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
+ .long CAN2_TX_IRQHandler /* CAN2 TX */
+ .long CAN2_RX0_IRQHandler /* CAN2 RX0 */
+ .long CAN2_RX1_IRQHandler /* CAN2 RX1 */
+ .long CAN2_SCE_IRQHandler /* CAN2 SCE */
+ .long OTG_FS_IRQHandler /* USB OTG FS */
+ .long DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
+ .long DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
+ .long DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
+ .long USART6_IRQHandler /* USART6 */
+ .long I2C3_EV_IRQHandler /* I2C3 event */
+ .long I2C3_ER_IRQHandler /* I2C3 error */
+ .long OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
+ .long OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
+ .long OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
+ .long OTG_HS_IRQHandler /* USB OTG HS */
+ .long DCMI_IRQHandler /* DCMI */
+ .long CRYP_IRQHandler /* CRYP crypto */
+ .long HASH_RNG_IRQHandler /* Hash and Rng */
+ .long FPU_IRQHandler /* FPU */
+ .long UART7_IRQHandler /* UART7 */
+ .long UART8_IRQHandler /* UART8 */
+ .long SPI4_IRQHandler /* SPI4 */
+ .long SPI5_IRQHandler /* SPI5 */
+ .long SPI6_IRQHandler /* SPI6 */
+ .long SAI1_IRQHandler /* SAI1 */
+ .long 0 /* Reserved */
+ .long 0 /* Reserved */
+ .long DMA2D_IRQHandler /* DMA2D */
+
+ .size __isr_vector, . - __isr_vector
+
+ .text
+ .thumb
+ .thumb_func
+ .align 2
+ .globl Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+/* Copy data core section from flash to RAM */
+ ldr r1, =__etext
+ ldr r2, =__coredata_start__
+ ldr r3, =__coredata_end__
+
+.LC0:
+ cmp r2, r3
+ ittt lt
+ ldrlt r0, [r1], #4
+ strlt r0, [r2], #4
+ blt .LC0
+
+/* Loop to copy data from read only memory to RAM. The ranges
+ * of copy from/to are specified by following symbols evaluated in
+ * linker script.
+ * __etext: End of code section, i.e., begin of data sections to copy from.
+ * __data_start__/__data_end__: RAM address range that data should be
+ * copied to. Both must be aligned to 4 bytes boundary. */
+ ldr r1, =__ecoredata
+ ldr r2, =__data_start__
+ ldr r3, =__data_end__
+
+.LC1:
+ cmp r2, r3
+ ittt lt
+ ldrlt r0, [r1], #4
+ strlt r0, [r2], #4
+ blt .LC1
+
+/* Set the bss core section to zero */
+ mov r0, #0
+ ldr r1, =__corebss_start__
+ ldr r2, =__corebss_end__
+
+.LC2:
+ cmp r1, r2
+ itt lt
+ strlt r0, [r1], #4
+ blt .LC2
+
+ /* Set the other bss section to zero as well*/
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+
+.LC3:
+ cmp r1, r2
+ itt lt
+ strlt r0, [r1], #4
+ blt .LC3
+
+/* Call system initialization and startup routines */
+ ldr r0, =SystemInit
+ blx r0
+ ldr r0, =_start
+ bx r0
+ .pool
+ .size Reset_Handler, . - Reset_Handler
+
+ .text
+/* Macro to define default handlers. Default handler
+ * will be weak symbol and just dead loops. They can be
+ * overwritten by other handlers */
+ .macro def_default_handler handler_name
+ .align 1
+ .thumb_func
+ .weak \handler_name
+ .type \handler_name, %function
+\handler_name :
+ b .
+ .size \handler_name, . - \handler_name
+ .endm
+
+ def_default_handler NMI_Handler
+ def_default_handler HardFault_Handler
+ def_default_handler MemManage_Handler
+ def_default_handler BusFault_Handler
+ def_default_handler UsageFault_Handler
+ def_default_handler SVC_Handler
+ def_default_handler DebugMon_Handler
+ def_default_handler PendSV_Handler
+ def_default_handler SysTick_Handler
+ def_default_handler Default_Handler
+
+ .macro def_irq_default_handler handler_name
+ .weak \handler_name
+ .set \handler_name, Default_Handler
+ .endm
+
+ def_irq_default_handler WWDG_IRQHandler
+ def_irq_default_handler PVD_IRQHandler
+ def_irq_default_handler TAMP_STAMP_IRQHandler
+ def_irq_default_handler RTC_WKUP_IRQHandler
+ def_irq_default_handler FLASH_IRQHandler
+ def_irq_default_handler RCC_IRQHandler
+ def_irq_default_handler EXTI0_IRQHandler
+ def_irq_default_handler EXTI1_IRQHandler
+ def_irq_default_handler EXTI2_IRQHandler
+ def_irq_default_handler EXTI3_IRQHandler
+ def_irq_default_handler EXTI4_IRQHandler
+ def_irq_default_handler DMA1_Stream0_IRQHandler
+ def_irq_default_handler DMA1_Stream1_IRQHandler
+ def_irq_default_handler DMA1_Stream2_IRQHandler
+ def_irq_default_handler DMA1_Stream3_IRQHandler
+ def_irq_default_handler DMA1_Stream4_IRQHandler
+ def_irq_default_handler DMA1_Stream5_IRQHandler
+ def_irq_default_handler DMA1_Stream6_IRQHandler
+ def_irq_default_handler ADC_IRQHandler
+ def_irq_default_handler CAN1_TX_IRQHandler
+ def_irq_default_handler CAN1_RX0_IRQHandler
+ def_irq_default_handler CAN1_RX1_IRQHandler
+ def_irq_default_handler CAN1_SCE_IRQHandler
+ def_irq_default_handler EXTI9_5_IRQHandler
+ def_irq_default_handler TIM1_BRK_TIM9_IRQHandler
+ def_irq_default_handler TIM1_UP_TIM10_IRQHandler
+ def_irq_default_handler TIM1_TRG_COM_TIM11_IRQHandler
+ def_irq_default_handler TIM1_CC_IRQHandler
+ def_irq_default_handler TIM2_IRQHandler
+ def_irq_default_handler TIM3_IRQHandler
+ def_irq_default_handler TIM4_IRQHandler
+ def_irq_default_handler I2C1_EV_IRQHandler
+ def_irq_default_handler I2C1_ER_IRQHandler
+ def_irq_default_handler I2C2_EV_IRQHandler
+ def_irq_default_handler I2C2_ER_IRQHandler
+ def_irq_default_handler SPI1_IRQHandler
+ def_irq_default_handler SPI2_IRQHandler
+ def_irq_default_handler USART1_IRQHandler
+ def_irq_default_handler USART2_IRQHandler
+ def_irq_default_handler USART3_IRQHandler
+ def_irq_default_handler EXTI15_10_IRQHandler
+ def_irq_default_handler RTC_Alarm_IRQHandler
+ def_irq_default_handler OTG_FS_WKUP_IRQHandler
+ def_irq_default_handler TIM8_BRK_TIM12_IRQHandler
+ def_irq_default_handler TIM8_UP_TIM13_IRQHandler
+ def_irq_default_handler TIM8_TRG_COM_TIM14_IRQHandler
+ def_irq_default_handler TIM8_CC_IRQHandler
+ def_irq_default_handler DMA1_Stream7_IRQHandler
+ def_irq_default_handler FSMC_IRQHandler
+ def_irq_default_handler SDIO_IRQHandler
+ def_irq_default_handler TIM5_IRQHandler
+ def_irq_default_handler SPI3_IRQHandler
+ def_irq_default_handler UART4_IRQHandler
+ def_irq_default_handler UART5_IRQHandler
+ def_irq_default_handler TIM6_DAC_IRQHandler
+ def_irq_default_handler TIM7_IRQHandler
+ def_irq_default_handler DMA2_Stream0_IRQHandler
+ def_irq_default_handler DMA2_Stream1_IRQHandler
+ def_irq_default_handler DMA2_Stream2_IRQHandler
+ def_irq_default_handler DMA2_Stream3_IRQHandler
+ def_irq_default_handler DMA2_Stream4_IRQHandler
+ def_irq_default_handler ETH_IRQHandler
+ def_irq_default_handler ETH_WKUP_IRQHandler
+ def_irq_default_handler CAN2_TX_IRQHandler
+ def_irq_default_handler CAN2_RX0_IRQHandler
+ def_irq_default_handler CAN2_RX1_IRQHandler
+ def_irq_default_handler CAN2_SCE_IRQHandler
+ def_irq_default_handler OTG_FS_IRQHandler
+ def_irq_default_handler DMA2_Stream5_IRQHandler
+ def_irq_default_handler DMA2_Stream6_IRQHandler
+ def_irq_default_handler DMA2_Stream7_IRQHandler
+ def_irq_default_handler USART6_IRQHandler
+ def_irq_default_handler I2C3_EV_IRQHandler
+ def_irq_default_handler I2C3_ER_IRQHandler
+ def_irq_default_handler OTG_HS_EP1_OUT_IRQHandler
+ def_irq_default_handler OTG_HS_EP1_IN_IRQHandler
+ def_irq_default_handler OTG_HS_WKUP_IRQHandler
+ def_irq_default_handler OTG_HS_IRQHandler
+ def_irq_default_handler DCMI_IRQHandler
+ def_irq_default_handler CRYP_IRQHandler
+ def_irq_default_handler HASH_RNG_IRQHandler
+ def_irq_default_handler FPU_IRQHandler
+ def_irq_default_handler UART7_IRQHandler
+ def_irq_default_handler UART8_IRQHandler
+ def_irq_default_handler SPI4_IRQHandler
+ def_irq_default_handler SPI5_IRQHandler
+ def_irq_default_handler SPI6_IRQHandler
+ def_irq_default_handler SAI1_IRQHandler
+ def_irq_default_handler DMA2D_IRQHandler
+ def_irq_default_handler DEF_IRQHandler
+
+ .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/src/hal_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/src/hal_bsp.c b/hw/bsp/sensorhub/src/hal_bsp.c
index 0f2cbfe..722a13b 100644
--- a/hw/bsp/sensorhub/src/hal_bsp.c
+++ b/hw/bsp/sensorhub/src/hal_bsp.c
@@ -17,24 +17,19 @@
* under the License.
*/
#include <assert.h>
-
-#include <syscfg/syscfg.h>
-
-#include <os/os_dev.h>
+#include "syscfg/syscfg.h"
+#include "os/os_dev.h"
#if MYNEWT_VAL(UART_0)
#include <uart/uart.h>
#include <uart_hal/uart_hal.h>
#endif
-
#include <hal/hal_bsp.h>
#include <hal/hal_gpio.h>
#include <hal/hal_flash_int.h>
#include <hal/hal_timer.h>
-
-#include <stm32f407xx.h> //ADG! Should be using stm32f427xx.h
+#include <stm32f427xx.h>
#include <stm32f4xx_hal_gpio_ex.h>
#include <mcu/stm32f4_bsp.h>
-
#include "bsp/bsp.h"
#if MYNEWT_VAL(UART_0)
@@ -43,7 +38,7 @@ static struct uart_dev hal_uart0;
static const struct stm32f4_uart_cfg uart_cfg[UART_CNT] = {
[0] = {
.suc_uart = UART4,
- .suc_rcc_reg = &RCC->APB2ENR,
+ .suc_rcc_reg = &RCC->APB1ENR,
.suc_rcc_dev = RCC_APB1ENR_UART4EN,
.suc_pin_tx = MCU_GPIO_PORTC(10), /* PC10 */
.suc_pin_rx = MCU_GPIO_PORTC(11), /* PC11 */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/src/hal_bsp_sav.c
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/src/hal_bsp_sav.c b/hw/bsp/sensorhub/src/hal_bsp_sav.c
new file mode 100644
index 0000000..2d18815
--- /dev/null
+++ b/hw/bsp/sensorhub/src/hal_bsp_sav.c
@@ -0,0 +1,123 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+//#include <stdint.h>
+//#include <stddef.h>
+#include <assert.h>
+#include "syscfg/syscfg.h"
+//#include "bsp/bsp.h"
+
+#if MYNEWT_VAL(UART_0)
+//#include <uart/uart.h>
+//#include <uart_hal/uart_hal.h>
+#endif
+#include "os/os_dev.h"
+
+#include <hal/hal_bsp.h>
+#include <hal/hal_gpio.h>
+#include <hal/hal_flash_int.h>
+#include <hal/hal_timer.h>
+
+#include <stm32f427xx.h>
+#include <stm32f4xx_hal_gpio_ex.h>
+#include <mcu/stm32f4_bsp.h>
+
+#if MYNEWT_VAL(UART_0)
+#include "bsp/bsp.h"
+#include <uart/uart.h>
+#include <uart_hal/uart_hal.h>
+
+static struct uart_dev hal_uart0;
+
+static const struct stm32f4_uart_cfg uart_cfg[UART_CNT] = {
+ [0] = {
+ .suc_uart = UART4,
+ .suc_rcc_reg = &RCC->APB1ENR,
+ .suc_rcc_dev = RCC_APB1ENR_UART4EN,
+ .suc_pin_tx = MCU_GPIO_PORTC(10), /* PC10 */
+ .suc_pin_rx = MCU_GPIO_PORTC(11), /* PC11 */
+ .suc_pin_rts = -1,
+ .suc_pin_cts = -1,
+ .suc_pin_af = GPIO_AF8_UART4,
+ .suc_irqn = UART4_IRQn
+ }
+};
+#endif
+
+static const struct hal_bsp_mem_dump dump_cfg[] = {
+ [0] = {
+ .hbmd_start = &_ram_start,
+ .hbmd_size = RAM_SIZE
+ },
+ [1] = {
+ .hbmd_start = &_ccram_start,
+ .hbmd_size = CCRAM_SIZE
+ }
+};
+
+const struct hal_flash *
+hal_bsp_flash_dev(uint8_t id)
+{
+ /*
+ * Internal flash mapped to id 0.
+ */
+ if (id != 0) {
+ return NULL;
+ }
+ return &stm32f4_flash_dev;
+}
+
+const struct hal_bsp_mem_dump *
+hal_bsp_core_dump(int *area_cnt)
+{
+ *area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]);
+ return dump_cfg;
+}
+
+void
+hal_bsp_init(void)
+{
+ int rc;
+
+ (void)rc;
+
+#if MYNEWT_VAL(UART_0)
+ rc = os_dev_create((struct os_dev *) &hal_uart0, CONSOLE_UART,
+ OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
+ assert(rc == 0);
+#endif
+#if MYNEWT_VAL(TIMER_0)
+ hal_timer_init(0, TIM9);
+#endif
+}
+
+/**
+ * Returns the configured priority for the given interrupt. If no priority
+ * configured, return the priority passed in
+ *
+ * @param irq_num
+ * @param pri
+ *
+ * @return uint32_t
+ */
+uint32_t
+hal_bsp_get_nvic_priority(int irq_num, uint32_t pri)
+{
+ /* Add any interrupt priorities configured by the bsp here */
+ return pri;
+}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/stm32f4discovery.ld
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/stm32f4discovery.ld b/hw/bsp/sensorhub/stm32f4discovery.ld
deleted file mode 100644
index 3382dcc..0000000
--- a/hw/bsp/sensorhub/stm32f4discovery.ld
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-/* Linker script for STM32F407 when running from flash and using the bootloader */
-
-/* Linker script to configure memory regions. */
-MEMORY
-{
- FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* First image slot. */
- CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
- RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
-}
-
-/* This linker script is used for images and thus contains an image header */
-_imghdr_size = 0x20;
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/stm32f4discovery_debug.cmd
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/stm32f4discovery_debug.cmd b/hw/bsp/sensorhub/stm32f4discovery_debug.cmd
deleted file mode 100755
index d6cfc11..0000000
--- a/hw/bsp/sensorhub/stm32f4discovery_debug.cmd
+++ /dev/null
@@ -1,3 +0,0 @@
-@rem Execute a shell with a script of the same name and .sh extension
-
-@bash "%~dp0%~n0.sh"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/stm32f4discovery_debug.sh
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/stm32f4discovery_debug.sh b/hw/bsp/sensorhub/stm32f4discovery_debug.sh
deleted file mode 100755
index 14b2a64..0000000
--- a/hw/bsp/sensorhub/stm32f4discovery_debug.sh
+++ /dev/null
@@ -1,39 +0,0 @@
-#!/bin/sh
-# Licensed to the Apache Software Foundation (ASF) under one
-# or more contributor license agreements. See the NOTICE file
-# distributed with this work for additional information
-# regarding copyright ownership. The ASF licenses this file
-# to you under the Apache License, Version 2.0 (the
-# "License"); you may not use this file except in compliance
-# with the License. You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing,
-# software distributed under the License is distributed on an
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-# KIND, either express or implied. See the License for the
-# specific language governing permissions and limitations
-# under the License.
-#
-
-# Called with following variables set:
-# - CORE_PATH is absolute path to @apache-mynewt-core
-# - BSP_PATH is absolute path to hw/bsp/bsp_name
-# - BIN_BASENAME is the path to prefix to target binary,
-# .elf appended to name is the ELF file
-# - FEATURES holds the target features string
-# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
-# - RESET set if target should be reset when attaching
-# - NO_GDB set if we should not start gdb to debug
-#
-. $CORE_PATH/hw/scripts/openocd.sh
-
-FILE_NAME=$BIN_BASENAME.elf
-CFG="-s $BSP_PATH -f $BSP_PATH/f4discovery.cfg"
-#ADG! CFG="-s $BSP_PATH -f /usr/share/openocd/scripts/interface/jlink.cfg -f /home/alan/dev/myproj-2/targets/stm_blinky/openocd.cfg"
-
-# Exit openocd when gdb detaches.
-EXTRA_JTAG_CMD="$EXTRA_JTAG_CMD; stm32f4x.cpu configure -event gdb-detach {if {[stm32f4x.cpu curstate] eq \"halted\"} resume;shutdown}"
-
-openocd_debug
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/stm32f4discovery_download.cmd
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/stm32f4discovery_download.cmd b/hw/bsp/sensorhub/stm32f4discovery_download.cmd
deleted file mode 100755
index d6cfc11..0000000
--- a/hw/bsp/sensorhub/stm32f4discovery_download.cmd
+++ /dev/null
@@ -1,3 +0,0 @@
-@rem Execute a shell with a script of the same name and .sh extension
-
-@bash "%~dp0%~n0.sh"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/bsp/sensorhub/stm32f4discovery_download.sh
----------------------------------------------------------------------
diff --git a/hw/bsp/sensorhub/stm32f4discovery_download.sh b/hw/bsp/sensorhub/stm32f4discovery_download.sh
deleted file mode 100755
index 5a3a17d..0000000
--- a/hw/bsp/sensorhub/stm32f4discovery_download.sh
+++ /dev/null
@@ -1,42 +0,0 @@
-#!/bin/sh
-# Licensed to the Apache Software Foundation (ASF) under one
-# or more contributor license agreements. See the NOTICE file
-# distributed with this work for additional information
-# regarding copyright ownership. The ASF licenses this file
-# to you under the Apache License, Version 2.0 (the
-# "License"); you may not use this file except in compliance
-# with the License. You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing,
-# software distributed under the License is distributed on an
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
-# KIND, either express or implied. See the License for the
-# specific language governing permissions and limitations
-# under the License.
-#
-
-# Called with following variables set:
-# - CORE_PATH is absolute path to @apache-mynewt-core
-# - BSP_PATH is absolute path to hw/bsp/bsp_name
-# - BIN_BASENAME is the path to prefix to target binary,
-# .elf appended to name is the ELF file
-# - IMAGE_SLOT is the image slot to download to (for non-mfg-image, non-boot)
-# - FEATURES holds the target features string
-# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
-# - MFG_IMAGE is "1" if this is a manufacturing image
-# - FLASH_OFFSET contains the flash offset to download to
-# - BOOT_LOADER is set if downloading a bootloader
-. $CORE_PATH/hw/scripts/openocd.sh
-
-CFG="-s $BSP_PATH -f f4discovery.cfg"
-#ADG! CFG="-s $BSP_PATH -f /usr/share/openocd/scripts/interface/jlink.cfg -f /home/alan/dev/myproj-2/targets/stm_blinky/openocd.cfg"
-
-if [ "$MFG_IMAGE" ]; then
- FLASH_OFFSET=0x08000000
-fi
-
-common_file_to_load
-openocd_load
-openocd_reset_run
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/mcu/stm/stm32f4xx/src/hal_gpio.c
----------------------------------------------------------------------
diff --git a/hw/mcu/stm/stm32f4xx/src/hal_gpio.c b/hw/mcu/stm/stm32f4xx/src/hal_gpio.c
index 44c2eb8..5aac030 100644
--- a/hw/mcu/stm/stm32f4xx/src/hal_gpio.c
+++ b/hw/mcu/stm/stm32f4xx/src/hal_gpio.c
@@ -17,8 +17,8 @@
* under the License.
*/
-#include "hal/hal_gpio.h"
#include "bsp/cmsis_nvic.h"
+#include "hal/hal_gpio.h"
#include "stm32f4xx.h"
#include "stm32f4xx_hal_gpio.h"
#include "stm32f4xx_hal_rcc.h"
@@ -102,13 +102,13 @@ static GPIO_TypeDef * const portmap[HAL_GPIO_NUM_PORTS] =
GPIOH,
#endif
#if defined GPIOI_BASE
- GPIOI
+ GPIOI,
#endif
#if defined GPIOJ_BASE
- GPIOJ
+ GPIOJ,
#endif
#if defined GPIOK_BASE
- GPIOK
+ GPIOK,
#endif
};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/469eabd1/hw/mcu/stm/stm32f4xx/stm32f427.ld
----------------------------------------------------------------------
diff --git a/hw/mcu/stm/stm32f4xx/stm32f427.ld b/hw/mcu/stm/stm32f4xx/stm32f427.ld
new file mode 100644
index 0000000..7d2887a
--- /dev/null
+++ b/hw/mcu/stm/stm32f4xx/stm32f427.ld
@@ -0,0 +1,203 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapBase
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __coredata_start__
+ * __coredata_end__
+ * __corebss_start__
+ * __corebss_end__
+ * __ecoredata
+ * __ecorebss
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ /* Reserve space at the start of the image for the header. */
+ .imghdr (NOLOAD):
+ {
+ . = . + _imghdr_size;
+ } > FLASH
+
+ .text :
+ {
+ __isr_vector_start = .;
+ KEEP(*(.isr_vector))
+ __isr_vector_end = .;
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+
+ __exidx_end = .;
+
+ __etext = .;
+
+ .vector_relocation :
+ {
+ . = ALIGN(4);
+ __vector_tbl_reloc__ = .;
+ . = . + (__isr_vector_end - __isr_vector_start);
+ . = ALIGN(4);
+ } > RAM
+
+ .coredata :
+ {
+ __coredata_start__ = .;
+ *(.data.core)
+ . = ALIGN(4);
+ __coredata_end__ = .;
+ } > CCM AT > FLASH
+
+ __ecoredata = __etext + SIZEOF(.coredata);
+
+ .data :
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM AT > FLASH
+
+ .corebss (NOLOAD):
+ {
+ . = ALIGN(4);
+ __corebss_start__ = .;
+ *(.bss.core)
+ . = ALIGN(4);
+ __corebss_end__ = .;
+ *(.corebss*)
+ *(.bss.core.nz)
+ . = ALIGN(4);
+ __ecorebss = .;
+ } > CCM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ __HeapBase = .;
+ __HeapLimit = ORIGIN(RAM) + LENGTH(RAM);
+
+ _ram_start = ORIGIN(RAM);
+ _ccram_start = ORIGIN(CCM);
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ *(.stack*)
+ } > CCM
+
+ /* Set stack top to end of CCM; stack limit is bottom of stack */
+ __StackTop = ORIGIN(CCM) + LENGTH(CCM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check for CCM overflow */
+ ASSERT(__StackLimit >= __ecorebss, "CCM overflow!")
+}
+