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Posted to dev@brpc.apache.org by "Felix-Gong (via GitHub)" <gi...@apache.org> on 2026/07/07 15:00:53 UTC

[PR] fix: replace RISC-V cpu_relax fence.i with nop for spin-wait hint (brpc)

Felix-Gong opened a new pull request, #3374:
URL: https://github.com/apache/brpc/pull/3374

   ## Description
   
   `fence.i` is an instruction-synchronization barrier on RISC-V that flushes the instruction cache. Using it in `cpu_relax()` for spin-wait loops is unnecessarily heavy — it should only be used after writing code (e.g., JIT compilation, self-modifying code).
   
   ## Fix
   
   Replace `fence.i` with `nop` (plus compiler memory barrier). This is consistent with the RISC-V Linux kernel's `cpu_relax()` implementation, which also uses `nop`.
   
   ## Verification
   
   - Compiled on RISC-V 64-bit server (SG2044, rv64gcv) with GCC 12.3.1
   - `libbrpc.a` built successfully
   - Disassembly confirmed `nop` emitted instead of `fence.i` 
   
   ## References
   
   - [RISC-V Linux kernel cpu_relax](https://github.com/torvalds/linux/blob/master/arch/riscv/include/asm/vdso/processor.h)
   
   Signed-off-by: Felix-Gong <go...@iscas.ac.cn>


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Re: [PR] fix: replace RISC-V cpu_relax fence.i with pause hint for spin-wait (brpc)

Posted by "chenBright (via GitHub)" <gi...@apache.org>.
chenBright merged PR #3374:
URL: https://github.com/apache/brpc/pull/3374


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