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Posted to commits@nuttx.apache.org by xi...@apache.org on 2020/07/30 05:07:42 UTC
[incubator-nuttx] branch master updated (1a669e0 -> 336bd8c)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 1a669e0 drivers/syslog/syslog_write.c: nxstyle fix
new f255f4f boards: lc823450-xgevk: Fix style violations
new 22a9b49 arch: lc823450: Fix style violations in lc823450_syscontrol.h
new 336bd8c arch: lc823450: Fix style violations
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/lc823450/lc823450_intc.h | 18 +--
arch/arm/src/lc823450/lc823450_ipl2.c | 35 ++---
arch/arm/src/lc823450/lc823450_irq.c | 10 +-
arch/arm/src/lc823450/lc823450_start.c | 16 ++-
arch/arm/src/lc823450/lc823450_syscontrol.h | 26 ++--
arch/arm/src/lc823450/lc823450_timer.c | 153 +++++++++++----------
boards/arm/lc823450/lc823450-xgevk/include/board.h | 4 +
.../lc823450/lc823450-xgevk/src/lc823450-xgevk.h | 2 +-
.../arm/lc823450/lc823450-xgevk/src/lc823450_adc.c | 4 +
.../lc823450/lc823450-xgevk/src/lc823450_boot.c | 6 +-
.../arm/lc823450/lc823450-xgevk/src/lc823450_mux.c | 24 ++--
.../lc823450/lc823450-xgevk/src/lc823450_reset.c | 2 +-
.../lc823450/lc823450-xgevk/src/lc823450_st7565.c | 3 +-
.../lc823450/lc823450-xgevk/src/lc823450_usbmsc.c | 4 +
.../lc823450/lc823450-xgevk/src/lc823450_wm8776.c | 4 +
15 files changed, 169 insertions(+), 142 deletions(-)
[incubator-nuttx] 02/03: arch: lc823450: Fix style violations in
lc823450_syscontrol.h
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 22a9b497b10e477e8d29929ad27d4528dfca08a8
Author: Masayuki Ishikawa <ma...@gmail.com>
AuthorDate: Thu Jul 30 09:19:10 2020 +0900
arch: lc823450: Fix style violations in lc823450_syscontrol.h
Summary:
- Fix style violations in lc823450_syscontrol.h
Impact:
- This commit affects register naming in syscontrol.
- So some files such as lc823450_start.c lc823450_mux.c were also changed.
Testing:
- Build check only
Signed-off-by: Masayuki Ishikawa <Ma...@jp.sony.com>
---
arch/arm/src/lc823450/lc823450_start.c | 16 ++++++++-----
arch/arm/src/lc823450/lc823450_syscontrol.h | 26 +++++++++++-----------
.../arm/lc823450/lc823450-xgevk/src/lc823450_mux.c | 24 ++++++++++----------
3 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/arch/arm/src/lc823450/lc823450_start.c b/arch/arm/src/lc823450/lc823450_start.c
index b1a6e40..9bf129b 100644
--- a/arch/arm/src/lc823450/lc823450_start.c
+++ b/arch/arm/src/lc823450/lc823450_start.c
@@ -119,7 +119,10 @@ const uintptr_t g_idle_topstack = HEAP_BASE;
int icx_boot_reason;
-extern uint32_t _stext_sram, _etext_sram, _ftext, _svect;
+extern uint32_t _stext_sram;
+extern uint32_t _etext_sram;
+extern uint32_t _ftext;
+extern uint32_t _svect;
/****************************************************************************
* Private Function prototypes
@@ -285,8 +288,9 @@ void __start(void)
#endif /* CONFIG_LC823450_SPIFI_BOOT */
- /* Enable Mutex */
- /* NOTE: modyfyreg32() can not be used because it might use spin_lock */
+ /* Enable Mutex
+ * NOTE: modyfyreg32() can not be used because it might use spin_lock.
+ */
uint32_t val = getreg32(MRSTCNTBASIC);
val |= MRSTCNTBASIC_MUTEX_RSTB;
@@ -307,8 +311,8 @@ void __start(void)
modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_PORT2_CLKEN);
modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_PORT2_RSTB);
- modifyreg32(rP2DT, 0, 1 << 15 /* GPIO2F */);
- modifyreg32(rP2DRC, 0, 1 << 15 /* GPIO2F */);
+ modifyreg32(P2DT, 0, 1 << 15 /* GPIO2F */);
+ modifyreg32(P2DRC, 0, 1 << 15 /* GPIO2F */);
#ifdef CONFIG_DEBUG_FEATURES
/* enable TXD0 for debug */
@@ -411,6 +415,6 @@ void __start(void)
/* Shouldn't get here */
- for (;;);
+ for (; ; );
#endif
}
diff --git a/arch/arm/src/lc823450/lc823450_syscontrol.h b/arch/arm/src/lc823450/lc823450_syscontrol.h
index e464993..794f0ff 100644
--- a/arch/arm/src/lc823450/lc823450_syscontrol.h
+++ b/arch/arm/src/lc823450/lc823450_syscontrol.h
@@ -250,19 +250,19 @@
/* GPIO */
#define PORT0_BASE 0x40081000
-#define rP0DT (PORT0_BASE + 0x0000 + 0x04)
-#define rP1DT (PORT0_BASE + 0x1000 + 0x04)
-#define rP2DT (PORT0_BASE + 0x2000 + 0x04)
-#define rP3DT (PORT0_BASE + 0x3000 + 0x04)
-#define rP4DT (PORT0_BASE + 0x4000 + 0x04)
-#define rP5DT (PORT0_BASE + 0x5000 + 0x04)
-
-#define rP0DRC (PORT0_BASE + 0x0000 + 0x00)
-#define rP1DRC (PORT0_BASE + 0x1000 + 0x00)
-#define rP2DRC (PORT0_BASE + 0x2000 + 0x00)
-#define rP3DRC (PORT0_BASE + 0x3000 + 0x00)
-#define rP4DRC (PORT0_BASE + 0x4000 + 0x00)
-#define rP5DRC (PORT0_BASE + 0x5000 + 0x00)
+#define P0DT (PORT0_BASE + 0x0000 + 0x04)
+#define P1DT (PORT0_BASE + 0x1000 + 0x04)
+#define P2DT (PORT0_BASE + 0x2000 + 0x04)
+#define P3DT (PORT0_BASE + 0x3000 + 0x04)
+#define P4DT (PORT0_BASE + 0x4000 + 0x04)
+#define P5DT (PORT0_BASE + 0x5000 + 0x04)
+
+#define P0DRC (PORT0_BASE + 0x0000 + 0x00)
+#define P1DRC (PORT0_BASE + 0x1000 + 0x00)
+#define P2DRC (PORT0_BASE + 0x2000 + 0x00)
+#define P3DRC (PORT0_BASE + 0x3000 + 0x00)
+#define P4DRC (PORT0_BASE + 0x4000 + 0x00)
+#define P5DRC (PORT0_BASE + 0x5000 + 0x00)
/****************************************************************************
* Public Types
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_mux.c b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_mux.c
index f693888..5c80125 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_mux.c
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_mux.c
@@ -85,38 +85,38 @@ void up_init_default_mux(void)
putreg32(PORT0_MUX, PMDCNT0);
putreg32(PORT0_PUPD, PUDCNT0);
putreg32(PORT0_DRV, PTDRVCNT0);
- putreg32(PORT0_DAT, rP0DT);
- putreg32(PORT0_DIR, rP0DRC);
+ putreg32(PORT0_DAT, P0DT);
+ putreg32(PORT0_DIR, P0DRC);
putreg32(PORT1_MUX, PMDCNT1);
putreg32(PORT1_PUPD, PUDCNT1);
putreg32(PORT1_DRV, PTDRVCNT1);
- putreg32(PORT1_DAT, rP1DT);
- putreg32(PORT1_DIR, rP1DRC);
+ putreg32(PORT1_DAT, P1DT);
+ putreg32(PORT1_DIR, P1DRC);
putreg32(PORT2_MUX, PMDCNT2);
putreg32(PORT2_PUPD, PUDCNT2);
putreg32(PORT2_DRV, PTDRVCNT2);
- putreg32(PORT2_DAT, rP2DT);
- putreg32(PORT2_DIR, rP2DRC);
+ putreg32(PORT2_DAT, P2DT);
+ putreg32(PORT2_DIR, P2DRC);
putreg32(PORT3_MUX, PMDCNT3);
putreg32(PORT3_PUPD, PUDCNT3);
putreg32(PORT3_DRV, PTDRVCNT3);
- putreg32(PORT3_DAT, rP3DT);
- putreg32(PORT3_DIR, rP3DRC);
+ putreg32(PORT3_DAT, P3DT);
+ putreg32(PORT3_DIR, P3DRC);
putreg32(PORT4_MUX, PMDCNT4);
putreg32(PORT4_PUPD, PUDCNT4);
putreg32(PORT4_DRV, PTDRVCNT4);
- putreg32(PORT4_DAT, rP4DT);
- putreg32(PORT4_DIR, rP4DRC);
+ putreg32(PORT4_DAT, P4DT);
+ putreg32(PORT4_DIR, P4DRC);
putreg32(PORT5_MUX, PMDCNT5);
putreg32(PORT5_PUPD, PUDCNT5);
putreg32(PORT5_DRV, PTDRVCNT5);
- putreg32(PORT5_DAT, rP5DT);
- putreg32(PORT5_DIR, rP5DRC);
+ putreg32(PORT5_DAT, P5DT);
+ putreg32(PORT5_DIR, P5DRC);
putreg32(PORT6_PUPD, PUDCNT6);
putreg32(PORT6_DRV, PTDRVCNT6);
[incubator-nuttx] 01/03: boards: lc823450-xgevk: Fix style
violations
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit f255f4f97ddc692b8f334047dc81a0f6b10b33aa
Author: Masayuki Ishikawa <ma...@gmail.com>
AuthorDate: Thu Jul 30 09:08:55 2020 +0900
boards: lc823450-xgevk: Fix style violations
Summary:
- Fix style violations under lc823450-xgevk
Impact:
- No impact
Testing:
- Build check only
Signed-off-by: Masayuki Ishikawa <Ma...@jp.sony.com>
---
boards/arm/lc823450/lc823450-xgevk/include/board.h | 4 ++++
boards/arm/lc823450/lc823450-xgevk/src/lc823450-xgevk.h | 2 +-
boards/arm/lc823450/lc823450-xgevk/src/lc823450_adc.c | 4 ++++
boards/arm/lc823450/lc823450-xgevk/src/lc823450_boot.c | 6 +++---
boards/arm/lc823450/lc823450-xgevk/src/lc823450_reset.c | 2 +-
boards/arm/lc823450/lc823450-xgevk/src/lc823450_st7565.c | 3 ++-
boards/arm/lc823450/lc823450-xgevk/src/lc823450_usbmsc.c | 4 ++++
boards/arm/lc823450/lc823450-xgevk/src/lc823450_wm8776.c | 4 ++++
8 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/boards/arm/lc823450/lc823450-xgevk/include/board.h b/boards/arm/lc823450/lc823450-xgevk/include/board.h
index 739da95..726d842 100644
--- a/boards/arm/lc823450/lc823450-xgevk/include/board.h
+++ b/boards/arm/lc823450/lc823450-xgevk/include/board.h
@@ -36,6 +36,10 @@
#ifndef __BOARDS_ARM_LC823450_LC823450_XGEVK_INCLUDE_BOARD_H
#define __BOARDS_ARM_LC823450_LC823450_XGEVK_INCLUDE_BOARD_H
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
#include <stdint.h>
/****************************************************************************
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450-xgevk.h b/boards/arm/lc823450/lc823450-xgevk/src/lc823450-xgevk.h
index f719224..a1031fb 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450-xgevk.h
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450-xgevk.h
@@ -59,7 +59,7 @@
#ifndef __ASSEMBLY__
/****************************************************************************
- * Public Functions
+ * Public Function Prototypes
****************************************************************************/
/****************************************************************************
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_adc.c b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_adc.c
index 5de3297..382e16a 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_adc.c
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_adc.c
@@ -52,6 +52,10 @@
#include "lc823450_adc.h"
/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
* Name: lc823450_adc_setup
*
* Description:
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_boot.c b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_boot.c
index c100936..9c8cfd2 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_boot.c
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_boot.c
@@ -55,9 +55,9 @@
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
- * function called board_late_initialize(). board_late_initialize() will be
- * called immediately after up_intitialize() is called and just before the
- * initial application is started. This additional initialization phase
+ * function called board_late_initialize(). board_late_initialize() will
+ * be called immediately after up_intitialize() is called and just before
+ * the initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_reset.c b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_reset.c
index 8279e60..eb7eba8 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_reset.c
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_reset.c
@@ -45,7 +45,7 @@
#ifdef CONFIG_BOARDCTL_RESET
/****************************************************************************
- * Public functions
+ * Public Functions
****************************************************************************/
/****************************************************************************
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_st7565.c b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_st7565.c
index a6e1bae..a1bf885 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_st7565.c
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_st7565.c
@@ -80,7 +80,8 @@ static void lc823450_st7565_cmddata(FAR struct st7565_lcd_s *lcd,
static int lc823450_st7565_senddata(FAR struct st7565_lcd_s *lcd,
FAR const uint8_t *data,
int size);
-static int lc823450_st7565_backlight(FAR struct st7565_lcd_s *lcd, int level);
+static int lc823450_st7565_backlight(FAR struct st7565_lcd_s *lcd,
+ int level);
static FAR struct spi_dev_s *g_spidev;
static FAR struct lcd_dev_s *g_lcddev;
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_usbmsc.c b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_usbmsc.c
index 056ae25..d8ecbd7 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_usbmsc.c
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_usbmsc.c
@@ -34,6 +34,10 @@
****************************************************************************/
/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
* Name: board_usbmsc_initialize
*
* Description:
diff --git a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_wm8776.c b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_wm8776.c
index 913d99a..962e2b9 100644
--- a/boards/arm/lc823450/lc823450-xgevk/src/lc823450_wm8776.c
+++ b/boards/arm/lc823450/lc823450-xgevk/src/lc823450_wm8776.c
@@ -74,6 +74,10 @@ static struct wm8776_lower_s g_wm8776info =
};
/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
* Name: lc823450_wm8776initialize
****************************************************************************/
[incubator-nuttx] 03/03: arch: lc823450: Fix style violations
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 336bd8c3a2631650d212129a2a8e6dacc06354f5
Author: Masayuki Ishikawa <ma...@gmail.com>
AuthorDate: Thu Jul 30 09:32:29 2020 +0900
arch: lc823450: Fix style violations
Summary:
- Fix style violations under lc823450
- NOTE: still some files need to be fixed
Impact:
- Some register naming were changed but all files are included
Testing:
- Build check only
Signed-off-by: Masayuki Ishikawa <Ma...@jp.sony.com>
---
arch/arm/src/lc823450/lc823450_intc.h | 18 ++--
arch/arm/src/lc823450/lc823450_ipl2.c | 35 ++++----
arch/arm/src/lc823450/lc823450_irq.c | 10 +--
arch/arm/src/lc823450/lc823450_timer.c | 153 +++++++++++++++++----------------
4 files changed, 111 insertions(+), 105 deletions(-)
diff --git a/arch/arm/src/lc823450/lc823450_intc.h b/arch/arm/src/lc823450/lc823450_intc.h
index bcbadd1..771b085 100644
--- a/arch/arm/src/lc823450/lc823450_intc.h
+++ b/arch/arm/src/lc823450/lc823450_intc.h
@@ -66,15 +66,15 @@
#define IPICLR_INTISR1_CLR_2 (0x1 << 10)
#define IPICLR_INTISR1_CLR_3 (0x1 << 11)
-#define EXTINTn_BASE (LC823450_INTC_REGBASE + 0x400)
-#define EXTINTnS_BASE (LC823450_INTC_REGBASE + 0x418)
-#define EXTINTnM_BASE (LC823450_INTC_REGBASE + 0x430)
-#define EXTINTnC0_BASE (LC823450_INTC_REGBASE + 0x448)
-#define EXTINTnC1_BASE (LC823450_INTC_REGBASE + 0x460)
-#define EXTINTnCND_BASE (LC823450_INTC_REGBASE + 0x478)
-#define EXTINTnCLR_BASE (LC823450_INTC_REGBASE + 0x490)
-#define EXTINTnFEN_BASE (LC823450_INTC_REGBASE + 0x4A8)
-#define EXTINTnSET_BASE (LC823450_INTC_REGBASE + 0x4C0)
+#define EXTINT_BASE (LC823450_INTC_REGBASE + 0x400)
+#define EXTINTS_BASE (LC823450_INTC_REGBASE + 0x418)
+#define EXTINTM_BASE (LC823450_INTC_REGBASE + 0x430)
+#define EXTINTC0_BASE (LC823450_INTC_REGBASE + 0x448)
+#define EXTINTC1_BASE (LC823450_INTC_REGBASE + 0x460)
+#define EXTINTCND_BASE (LC823450_INTC_REGBASE + 0x478)
+#define EXTINTCLR_BASE (LC823450_INTC_REGBASE + 0x490)
+#define EXTINTFEN_BASE (LC823450_INTC_REGBASE + 0x4A8)
+#define EXTINTSET_BASE (LC823450_INTC_REGBASE + 0x4C0)
#define INTC_REG(base,port) ((base) + 4 * (port))
diff --git a/arch/arm/src/lc823450/lc823450_ipl2.c b/arch/arm/src/lc823450/lc823450_ipl2.c
index d5fca01..a09a90a 100644
--- a/arch/arm/src/lc823450/lc823450_ipl2.c
+++ b/arch/arm/src/lc823450/lc823450_ipl2.c
@@ -119,7 +119,8 @@ static struct
uint32_t size;
uint32_t enc;
uint32_t offset;
- } chunk[10];
+ }
+ chunk[10];
} upg_image;
/****************************************************************************
@@ -192,7 +193,10 @@ static int blk_write(const void *buf, int len, const char *path, int offset)
static int install_recovery(const char *srcpath)
{
- int rfd, i, len, rem;
+ int rfd;
+ int i;
+ int len;
+ int rem;
int ret = 0;
void *handle = NULL;
@@ -223,7 +227,6 @@ static int install_recovery(const char *srcpath)
sysreset();
/* NOT REACHED */
-
}
#endif
@@ -308,7 +311,6 @@ static void load_kernel(const char *name, const char *devname)
"ldr sp, [r1, #0]\n" /* set sp */
"ldr pc, [r1, #4]" /* set pc, start nuttx */
);
-
}
/****************************************************************************
@@ -377,18 +379,18 @@ static int check_forceusbboot(void)
/* start ADC0,1 */
- putreg32(rADCCTL_fADCNVCK_DIV32 | rADCCTL_fADACT | rADCCTL_fADCHSCN |
- 1 /* 0,1 ch */, rADCCTL);
+ putreg32(ADCCTL_ADCNVCK_DIV32 | ADCCTL_ADACT | ADCCTL_ADCHSCN |
+ 1 /* 0,1 ch */, ADCCTL);
- putreg32(53, rADCSMPL);
+ putreg32(53, ADCSMPL);
/* wait for adc done */
- while ((getreg32(rADCSTS) & rADCSTS_fADCMPL) == 0)
+ while ((getreg32(ADCSTS) & ADCSTS_ADCMPL) == 0)
;
- val = getreg32(rADC0DT);
- val1 = getreg32(rADC1DT);
+ val = getreg32(ADC0DT);
+ val1 = getreg32(ADC1DT);
_info("val = %d, val1 = %d\n", val, val1);
@@ -399,21 +401,21 @@ static int check_forceusbboot(void)
/* check KEY0_AD_D key pressed */
- if (val >= (0x3A << 2) && val < (0x57 << 2))
+ if (val >= (0x3a << 2) && val < (0x57 << 2))
{
return 1;
}
/* check KEY0_AD_B key pressed */
- if (val >= (0x0B << 2) && val < (0x20 << 2))
+ if (val >= (0x0b << 2) && val < (0x20 << 2))
{
return 1;
}
/* check KEY1_AD_B key pressed */
- if (val1 >= (0x0B << 2) && val1 < (0x20 << 2))
+ if (val1 >= (0x0b << 2) && val1 < (0x20 << 2))
{
return 1;
}
@@ -495,11 +497,11 @@ static void chg_disable(void)
/* I2C pinmux */
- modifyreg32(PMDCNT0, 0x0003C000, 0x00014000);
+ modifyreg32(PMDCNT0, 0x0003c000, 0x00014000);
/* I2C drv : 4mA */
- modifyreg32(PTDRVCNT0, 0x0003C000, 0x0003C000);
+ modifyreg32(PTDRVCNT0, 0x0003c000, 0x0003c000);
/* Enable I2C controller */
@@ -612,6 +614,7 @@ static int msc_enable(int forced)
_info("Install recovery\n");
/* clear old MBR */
+
memset(copybuf, 0, sizeof(copybuf));
set_config(0, copybuf);
}
@@ -625,6 +628,7 @@ static int msc_enable(int forced)
sysreset();
/* not reached */
+
return 0;
}
#endif
@@ -749,7 +753,6 @@ int ipl2_main(int argc, char *argv[])
install_recovery("/mnt/sd0/UPG.IMG");
load_kernel("recovery", CONFIG_MTD_RECOVERY_DEVPATH);
-
}
else
{
diff --git a/arch/arm/src/lc823450/lc823450_irq.c b/arch/arm/src/lc823450/lc823450_irq.c
index 631a192..6530e5b 100644
--- a/arch/arm/src/lc823450/lc823450_irq.c
+++ b/arch/arm/src/lc823450/lc823450_irq.c
@@ -304,7 +304,7 @@ static void lc823450_extint_clr(int irq)
port = (irq & 0x70) >> 4;
pin = irq & 0xf;
- regaddr = INTC_REG(EXTINTnCLR_BASE, port);
+ regaddr = INTC_REG(EXTINTCLR_BASE, port);
putreg32(1 << pin, regaddr);
return;
@@ -330,12 +330,12 @@ static int lc823450_extint_isr(int irq, FAR void *context, FAR void *arg)
/* Read irq factor */
- regaddr = INTC_REG(EXTINTn_BASE, port);
+ regaddr = INTC_REG(EXTINT_BASE, port);
pending = getreg32(regaddr);
/* Clear irq factor */
- regaddr = INTC_REG(EXTINTnCLR_BASE, port);
+ regaddr = INTC_REG(EXTINTCLR_BASE, port);
putreg32(pending, regaddr);
irq = LC823450_IRQ_GPIO00 + (port * 0x10);
@@ -412,7 +412,7 @@ static int lc823450_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
{
int port = ((irq - LC823450_IRQ_GPIO00) & 0x70) >> 4;
- *regaddr = INTC_REG(EXTINTnM_BASE, port);
+ *regaddr = INTC_REG(EXTINTM_BASE, port);
*bit = 1 << ((irq - LC823450_IRQ_GPIO00) & 0xf);
}
else if (irq >= LC823450_IRQ_INTERRUPTS)
@@ -846,7 +846,7 @@ int lc823450_irq_srctype(int irq, enum lc823450_srctype_e srctype)
flags = spin_lock_irqsave();
- regaddr = INTC_REG(EXTINTnCND_BASE, port);
+ regaddr = INTC_REG(EXTINTCND_BASE, port);
regval = getreg32(regaddr);
regval &= ~(3 << gpio * 2);
diff --git a/arch/arm/src/lc823450/lc823450_timer.c b/arch/arm/src/lc823450/lc823450_timer.c
index d112978..27b049c 100644
--- a/arch/arm/src/lc823450/lc823450_timer.c
+++ b/arch/arm/src/lc823450/lc823450_timer.c
@@ -84,48 +84,48 @@
/* #define CHECK_INTERVAL */
#ifdef CONFIG_LC823450_MTM0_TICK
-# define rMT00STS (LC823450_MTM0_REGBASE + LC823450_MTM_0STS)
-# define rMT00A (LC823450_MTM0_REGBASE + LC823450_MTM_0A)
-# define rMT00B (LC823450_MTM0_REGBASE + LC823450_MTM_0B)
-# define rMT00CTL (LC823450_MTM0_REGBASE + LC823450_MTM_0CTL)
-# define rMT00PSCL (LC823450_MTM0_REGBASE + LC823450_MTM_0PSCL)
-# define rMT00TIER (LC823450_MTM0_REGBASE + LC823450_MTM_0TIER)
-# define rMT00OPR (LC823450_MTM0_REGBASE + LC823450_MTM_OPR)
-# define rMT00CNT (LC823450_MTM0_REGBASE + LC823450_MTM_0CNT)
+# define MT00STS (LC823450_MTM0_REGBASE + LC823450_MTM_0STS)
+# define MT00A (LC823450_MTM0_REGBASE + LC823450_MTM_0A)
+# define MT00B (LC823450_MTM0_REGBASE + LC823450_MTM_0B)
+# define MT00CTL (LC823450_MTM0_REGBASE + LC823450_MTM_0CTL)
+# define MT00PSCL (LC823450_MTM0_REGBASE + LC823450_MTM_0PSCL)
+# define MT00TIER (LC823450_MTM0_REGBASE + LC823450_MTM_0TIER)
+# define MT00OPR (LC823450_MTM0_REGBASE + LC823450_MTM_OPR)
+# define MT00CNT (LC823450_MTM0_REGBASE + LC823450_MTM_0CNT)
# define MTM_RELOAD (XT1OSC_CLK / (CLK_TCK * 10))
#endif
#ifdef CONFIG_HRT_TIMER
# define LC823450_MTM2_REGBASE 0x40045000
-# define rMT20STS (LC823450_MTM2_REGBASE + LC823450_MTM_0STS)
-# define rMT20A (LC823450_MTM2_REGBASE + LC823450_MTM_0A)
-# define rMT20PSCL (LC823450_MTM2_REGBASE + LC823450_MTM_0PSCL)
-# define rMT20TIER (LC823450_MTM2_REGBASE + LC823450_MTM_0TIER)
-# define rMT2OPR (LC823450_MTM2_REGBASE + LC823450_MTM_OPR)
-# define rMT20CNT (LC823450_MTM2_REGBASE + LC823450_MTM_0CNT)
+# define MT20STS (LC823450_MTM2_REGBASE + LC823450_MTM_0STS)
+# define MT20A (LC823450_MTM2_REGBASE + LC823450_MTM_0A)
+# define MT20PSCL (LC823450_MTM2_REGBASE + LC823450_MTM_0PSCL)
+# define MT20TIER (LC823450_MTM2_REGBASE + LC823450_MTM_0TIER)
+# define MT2OPR (LC823450_MTM2_REGBASE + LC823450_MTM_OPR)
+# define MT20CNT (LC823450_MTM2_REGBASE + LC823450_MTM_0CNT)
#endif /* CONFIG_HRT_TIMER */
#ifdef CONFIG_PROFILE
# define LC823450_MTM3_REGBASE 0x40046000
-# define rMT30STS (LC823450_MTM3_REGBASE + LC823450_MTM_0STS)
-# define rMT30A (LC823450_MTM3_REGBASE + LC823450_MTM_0A)
-# define rMT30B (LC823450_MTM3_REGBASE + LC823450_MTM_0B)
-# define rMT30CTL (LC823450_MTM3_REGBASE + LC823450_MTM_0CTL)
-# define rMT30PSCL (LC823450_MTM3_REGBASE + LC823450_MTM_0PSCL)
-# define rMT30TIER (LC823450_MTM3_REGBASE + LC823450_MTM_0TIER)
-# define rMT30OPR (LC823450_MTM3_REGBASE + LC823450_MTM_OPR)
-# define rMT30CNT (LC823450_MTM3_REGBASE + LC823450_MTM_0CNT)
+# define MT30STS (LC823450_MTM3_REGBASE + LC823450_MTM_0STS)
+# define MT30A (LC823450_MTM3_REGBASE + LC823450_MTM_0A)
+# define MT30B (LC823450_MTM3_REGBASE + LC823450_MTM_0B)
+# define MT30CTL (LC823450_MTM3_REGBASE + LC823450_MTM_0CTL)
+# define MT30PSCL (LC823450_MTM3_REGBASE + LC823450_MTM_0PSCL)
+# define MT30TIER (LC823450_MTM3_REGBASE + LC823450_MTM_0TIER)
+# define MT30OPR (LC823450_MTM3_REGBASE + LC823450_MTM_OPR)
+# define MT30CNT (LC823450_MTM3_REGBASE + LC823450_MTM_0CNT)
#endif /* CONFIG_PROFILE */
#ifdef CONFIG_DVFS
-# define rMT01STS (LC823450_MTM0_REGBASE + LC823450_MTM_1STS)
-# define rMT01A (LC823450_MTM0_REGBASE + LC823450_MTM_1A)
-# define rMT01B (LC823450_MTM0_REGBASE + LC823450_MTM_1B)
-# define rMT01CTL (LC823450_MTM0_REGBASE + LC823450_MTM_1CTL)
-# define rMT01PSCL (LC823450_MTM0_REGBASE + LC823450_MTM_1PSCL)
-# define rMT01TIER (LC823450_MTM0_REGBASE + LC823450_MTM_1TIER)
-# define rMT01CNT (LC823450_MTM0_REGBASE + LC823450_MTM_1CNT)
-# define rMT0OPR (LC823450_MTM0_REGBASE + LC823450_MTM_OPR)
+# define MT01STS (LC823450_MTM0_REGBASE + LC823450_MTM_1STS)
+# define MT01A (LC823450_MTM0_REGBASE + LC823450_MTM_1A)
+# define MT01B (LC823450_MTM0_REGBASE + LC823450_MTM_1B)
+# define MT01CTL (LC823450_MTM0_REGBASE + LC823450_MTM_1CTL)
+# define MT01PSCL (LC823450_MTM0_REGBASE + LC823450_MTM_1PSCL)
+# define MT01TIER (LC823450_MTM0_REGBASE + LC823450_MTM_1TIER)
+# define MT01CNT (LC823450_MTM0_REGBASE + LC823450_MTM_1CNT)
+# define MT0OPR (LC823450_MTM0_REGBASE + LC823450_MTM_OPR)
#endif
#ifndef container_of
@@ -200,7 +200,7 @@ static void hrt_queue_refresh(void)
irqstate_t flags;
flags = spin_lock_irqsave();
- elapsed = (uint64_t)getreg32(rMT20CNT) * (1000 * 1000) * 10 / XT1OSC_CLK;
+ elapsed = (uint64_t)getreg32(MT20CNT) * (1000 * 1000) * 10 / XT1OSC_CLK;
for (pent = hrt_timer_queue.head; pent; pent = dq_next(pent))
{
@@ -209,6 +209,7 @@ static void hrt_queue_refresh(void)
}
cont:
+
/* serch for expired */
for (pent = hrt_timer_queue.head; pent; pent = dq_next(pent))
@@ -267,12 +268,12 @@ static void hrt_usleep_setup(void)
count = 0x7fff;
}
- putreg32(0, rMT20CNT); /* counter */
- putreg32(count, rMT20A); /* AEVT counter */
+ putreg32(0, MT20CNT); /* counter */
+ putreg32(count, MT20A); /* AEVT counter */
/* Enable MTM2-Ch0 */
- putreg32(1, rMT2OPR);
+ putreg32(1, MT2OPR);
spin_unlock_irqrestore(flags);
}
#endif
@@ -286,11 +287,11 @@ static int hrt_interrupt(int irq, FAR void *context, FAR void *arg)
{
/* Disable MTM2-Ch0 */
- putreg32(0, rMT2OPR);
+ putreg32(0, MT2OPR);
/* clear AEVT Interrupt */
- putreg32(1 << 0, rMT20STS);
+ putreg32(1 << 0, MT20STS);
hrt_queue_refresh();
hrt_usleep_setup();
@@ -308,7 +309,7 @@ static void hrt_usleep_add(struct hrt_s *phrt)
/* Disable MTM2-Ch0 */
- putreg32(0, rMT2OPR);
+ putreg32(0, MT2OPR);
hrt_queue_refresh();
@@ -324,6 +325,7 @@ static void hrt_usleep_add(struct hrt_s *phrt)
break;
}
}
+
if (pent)
{
dq_addbefore(pent, &phrt->ent, &hrt_timer_queue);
@@ -350,7 +352,7 @@ static void hrt_usleep_add(struct hrt_s *phrt)
#ifdef CONFIG_PROFILE
int up_proftimerisr(int irq, uint32_t *regs, FAR void *arg)
{
- putreg32(1 << 1, rMT30STS);
+ putreg32(1 << 1, MT30STS);
if (profile_en)
{
if (profile_ptr != CONFIG_PROFILE_SAMPLES)
@@ -363,8 +365,8 @@ int up_proftimerisr(int irq, uint32_t *regs, FAR void *arg)
profile_en = 0;
tmrinfo("PROFILING DONE\n");
}
-
}
+
return 0;
}
#endif /* CONFIG_PROFILE */
@@ -375,7 +377,7 @@ int up_proftimerisr(int irq, uint32_t *regs, FAR void *arg)
int up_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
- /* Process timer interrupt */
+ /* Process timer interrupt */
#ifdef CONFIG_DVFS
lc823450_dvfs_tick_callback();
@@ -384,7 +386,7 @@ int up_timerisr(int irq, uint32_t *regs, FAR void *arg)
#ifdef CONFIG_LC823450_MTM0_TICK
/* Clear the interrupt (BEVT) */
- putreg32(1 << 1, rMT00STS);
+ putreg32(1 << 1, MT00STS);
#endif
nxsched_process_timer();
@@ -436,11 +438,11 @@ static uint64_t up_get_timer_fraction(void)
/* read the counter */
- regval = getreg32(rMT00CNT);
+ regval = getreg32(MT00CNT);
/* check if the timer interrupt is underway */
- if (getreg32(rMT00STS) & 0x2 && regval < (MTM_RELOAD/10))
+ if (getreg32(MT00STS) & 0x2 && regval < (MTM_RELOAD / 10))
{
return NSEC_PER_TICK;
}
@@ -457,9 +459,9 @@ static uint64_t up_get_timer_fraction(void)
/* check if the systick interrupt is pending or active */
- if ((getreg32(0xE000ED04) & (1 << 26) ||
- getreg32(0xE000ED24) & (1 << 11))
- && (SYSTICK_RELOAD - cur) < (SYSTICK_RELOAD/10))
+ if ((getreg32(0xe000ed04) & (1 << 26) ||
+ getreg32(0xe000ed24) & (1 << 11))
+ && (SYSTICK_RELOAD - cur) < (SYSTICK_RELOAD / 10))
{
return NSEC_PER_TICK;
}
@@ -491,11 +493,11 @@ void up_timer_initialize(void)
/* Enable AEVT Interrupt */
- putreg32(1 << 0, rMT20TIER);
+ putreg32(1 << 0, MT20TIER);
/* Set prescaler to (1/10) */
- putreg32(10 - 1, rMT20PSCL);
+ putreg32(10 - 1, MT20PSCL);
modifyreg32(MCLKCNTEXT1, MCLKCNTEXT1_MTM2C_CLKEN, 0);
modifyreg32(MCLKCNTEXT1, MCLKCNTEXT1_MTM2_CLKEN, 0);
@@ -515,28 +517,29 @@ void up_timer_initialize(void)
modifyreg32(MRSTCNTEXT1, 0x0, MRSTCNTEXT1_MTM3_RSTB);
- /* Input clock for the MTM3 is XT1 (i.e. 24M or 20M) */
- /* then the clock will be set to 1/10 by the internal divider */
- /* To implement 10ms timer, ADT=0, BDT=MTM_RELOAD */
+ /* Input clock for the MTM3 is XT1 (i.e. 24M or 20M)
+ * then the clock will be set to 1/10 by the internal divider
+ * To implement 10ms timer, ADT=0, BDT=MTM_RELOAD
+ */
- putreg32(0, rMT30A); /* AEVT counter */
- putreg32((XT1OSC_CLK / 1010) - 1, rMT30B); /* BEVT counter */
+ putreg32(0, MT30A); /* AEVT counter */
+ putreg32((XT1OSC_CLK / 1010) - 1, MT30B); /* BEVT counter */
/* Clear the counter by BEVT */
- putreg32(0x80, rMT30CTL);
+ putreg32(0x80, MT30CTL);
/* Set prescaler to 9 : (1/10) */
- putreg32(9, rMT30PSCL);
+ putreg32(9, MT30PSCL);
/* Enable BEVT Interrupt */
- putreg32(1 << 1, rMT30TIER);
+ putreg32(1 << 1, MT30TIER);
/* Enable MTM3-Ch0 */
- putreg32(1, rMT30OPR);
+ putreg32(1, MT30OPR);
/* Attach the timer interrupt vector */
@@ -559,28 +562,29 @@ void up_timer_initialize(void)
modifyreg32(MRSTCNTEXT1, 0x0, MRSTCNTEXT1_MTM0_RSTB);
- /* Input clock for the MTM0 is XT1 (i.e. 24M or 20M) */
- /* then the clock will be set to 1/10 by the internal divider */
- /* To implement the tick timer, ADT=0, BDT=MTM_RELOAD-1 */
+ /* Input clock for the MTM0 is XT1 (i.e. 24M or 20M)
+ * then the clock will be set to 1/10 by the internal divider
+ * To implement the tick timer, ADT=0, BDT=MTM_RELOAD-1
+ */
- putreg32(0, rMT00A); /* AEVT counter */
- putreg32(MTM_RELOAD - 1, rMT00B); /* BEVT counter */
+ putreg32(0, MT00A); /* AEVT counter */
+ putreg32(MTM_RELOAD - 1, MT00B); /* BEVT counter */
/* Clear the counter by BEVT */
- putreg32(0x80, rMT00CTL);
+ putreg32(0x80, MT00CTL);
/* Set prescaler to 9 : (1/10) */
- putreg32(9, rMT00PSCL);
+ putreg32(9, MT00PSCL);
/* Enable BEVT Interrupt */
- putreg32(1 << 1, rMT00TIER);
+ putreg32(1 << 1, MT00TIER);
/* Enable MTM0-Ch0 */
- putreg32(1, rMT00OPR);
+ putreg32(1, MT00OPR);
/* Attach the timer interrupt vector */
@@ -655,25 +659,24 @@ void lc823450_mtm_start_oneshot(int msec)
r /= 10; /* 1ms */
r *= msec;
- putreg32(0, rMT01A); /* AEVT counter */
- putreg32(r - 1, rMT01B); /* BEVT counter */
+ putreg32(0, MT01A); /* AEVT counter */
+ putreg32(r - 1, MT01B); /* BEVT counter */
/* Clear the counter by BEVT */
- putreg32(0x80, rMT01CTL);
+ putreg32(0x80, MT01CTL);
/* Set prescaler to 9 : (1/10) */
- putreg32(9, rMT01PSCL);
+ putreg32(9, MT01PSCL);
/* Enable BEVT Interrupt */
- putreg32(1 << 1, rMT01TIER);
-
+ putreg32(1 << 1, MT01TIER);
/* Enable MTM0-ch1 */
- modifyreg32(rMT0OPR, 0, 1 << 1);
+ modifyreg32(MT0OPR, 0, 1 << 1);
}
#endif
@@ -686,11 +689,11 @@ void lc823450_mtm_stop_oneshot(void)
{
/* Clear the interrupt (BEVT) */
- putreg32(1 << 1, rMT01STS);
+ putreg32(1 << 1, MT01STS);
/* Disable MTM0-ch1 */
- modifyreg32(rMT0OPR, 1 << 1, 0);
+ modifyreg32(MT0OPR, 1 << 1, 0);
}
#endif