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Posted to commits@trafficserver.apache.org by zw...@apache.org on 2020/05/20 20:03:57 UTC
[trafficserver] branch 9.0.x updated: Add an optional ramcache
setting to volume.config to be able to disable it (#6746)
This is an automated email from the ASF dual-hosted git repository.
zwoop pushed a commit to branch 9.0.x
in repository https://gitbox.apache.org/repos/asf/trafficserver.git
The following commit(s) were added to refs/heads/9.0.x by this push:
new af1f699 Add an optional ramcache setting to volume.config to be able to disable it (#6746)
af1f699 is described below
commit af1f699024a4a7c0bebf70de62d69b906591c23d
Author: Evan Zelkowitz <ez...@apache.org>
AuthorDate: Wed May 20 12:57:37 2020 -0700
Add an optional ramcache setting to volume.config to be able to disable it (#6746)
* Add an optional ramcache setting to volume.config to be able to disable it
This adds an additional option of `ramcache=true/false` to the volume.config.
The default is true, so enabled, to leave current functionality as is and for
the general use case. If set to false then this will stop the cache from initializing
a ramcache for that specific volume and avoid the ramcache all together. This may
be desirable for people running with volumes composed of ram disks to avoid double
ram caching and reclaim memory+time
(cherry picked from commit 91a9db1b172648b05d7c4b56c6190b270792899e)
---
doc/admin-guide/files/volume.config.en.rst | 17 +++++++++++++--
doc/admin-guide/storage/index.en.rst | 9 ++++++++
iocore/cache/Cache.cc | 22 +++++++++++--------
iocore/cache/CacheHosting.cc | 35 +++++++++++++++++++++---------
iocore/cache/P_CacheHosting.h | 1 +
iocore/cache/P_CacheVol.h | 13 ++++++-----
6 files changed, 70 insertions(+), 27 deletions(-)
diff --git a/doc/admin-guide/files/volume.config.en.rst b/doc/admin-guide/files/volume.config.en.rst
index 7fdfc8e..46395f1 100644
--- a/doc/admin-guide/files/volume.config.en.rst
+++ b/doc/admin-guide/files/volume.config.en.rst
@@ -57,14 +57,27 @@ volumes without deleting and clearing the existing volumes.
Changing this file to add, remove or modify volumes effectively invalidates
the cache.
+
+Optional ramcache setting
+-------------------------
+
+You can also add an option ``ramcache=true/false`` to the volume configuration
+line. True is the default setting and so not needed unless you want to explicitly
+set it. Setting ``ramcache=false`` will disable the ramcache that normally
+sits in front of a volume. This may be desirable if you are using something like
+ramdisks, to avoid wasting RAM and cpu time on double caching objects.
+
+
Examples
========
The following example partitions the cache across 5 volumes to decreasing
-single-lock pressure for a machine with few drives.::
+single-lock pressure for a machine with few drives. The last volume being
+an example of one that might be composed of purely ramdisks so that the
+ramcache has been disabled.::
volume=1 scheme=http size=20%
volume=2 scheme=http size=20%
volume=3 scheme=http size=20%
volume=4 scheme=http size=20%
- volume=5 scheme=http size=20%
+ volume=5 scheme=http size=20% ramcache=false
diff --git a/doc/admin-guide/storage/index.en.rst b/doc/admin-guide/storage/index.en.rst
index cdd3cc9..68bcd81 100644
--- a/doc/admin-guide/storage/index.en.rst
+++ b/doc/admin-guide/storage/index.en.rst
@@ -137,6 +137,15 @@ To change the RAM cache size:
1GB or more, then restart with the :program:`trafficserver` command
(refer to :ref:`start-traffic-server`).
+Disabling the RAM Cache
+-----------------------
+
+It is possible to disable the RAM cache. If you have configured your
+storage using the :file:`volume.config` you can add an optional directive
+of ``ramcache=false`` to whichever volumes you wish to have it disabled on.
+This may be desirable for volumes composed of storage like RAM disks where
+you may want to avoid double RAM caching.
+
Changing Cache Capacity
=======================
diff --git a/iocore/cache/Cache.cc b/iocore/cache/Cache.cc
index 841fa06..0192220 100644
--- a/iocore/cache/Cache.cc
+++ b/iocore/cache/Cache.cc
@@ -911,12 +911,14 @@ CacheProcessor::cacheInitialized()
Debug("cache_init", "CacheProcessor::cacheInitialized - cache_config_ram_cache_size == AUTO_SIZE_RAM_CACHE");
for (i = 0; i < gnvol; i++) {
vol = gvol[i];
- gvol[i]->ram_cache->init(vol->dirlen() * DEFAULT_RAM_CACHE_MULTIPLIER, vol);
- ram_cache_bytes += gvol[i]->dirlen();
- Debug("cache_init", "CacheProcessor::cacheInitialized - ram_cache_bytes = %" PRId64 " = %" PRId64 "Mb", ram_cache_bytes,
- ram_cache_bytes / (1024 * 1024));
- CACHE_VOL_SUM_DYN_STAT(cache_ram_cache_bytes_total_stat, (int64_t)gvol[i]->dirlen());
+ if (gvol[i]->cache_vol->ramcache_enabled) {
+ gvol[i]->ram_cache->init(vol->dirlen() * DEFAULT_RAM_CACHE_MULTIPLIER, vol);
+ ram_cache_bytes += gvol[i]->dirlen();
+ Debug("cache_init", "CacheProcessor::cacheInitialized - ram_cache_bytes = %" PRId64 " = %" PRId64 "Mb", ram_cache_bytes,
+ ram_cache_bytes / (1024 * 1024));
+ CACHE_VOL_SUM_DYN_STAT(cache_ram_cache_bytes_total_stat, (int64_t)gvol[i]->dirlen());
+ }
vol_total_cache_bytes = gvol[i]->len - gvol[i]->dirlen();
total_cache_bytes += vol_total_cache_bytes;
Debug("cache_init", "CacheProcessor::cacheInitialized - total_cache_bytes = %" PRId64 " = %" PRId64 "Mb",
@@ -955,14 +957,14 @@ CacheProcessor::cacheInitialized()
for (i = 0; i < gnvol; i++) {
vol = gvol[i];
double factor;
- if (gvol[i]->cache == theCache) {
+ if (gvol[i]->cache == theCache && gvol[i]->cache_vol->ramcache_enabled) {
ink_assert(gvol[i]->cache != nullptr);
factor = static_cast<double>(static_cast<int64_t>(gvol[i]->len >> STORE_BLOCK_SHIFT)) / theCache->cache_size;
Debug("cache_init", "CacheProcessor::cacheInitialized - factor = %f", factor);
gvol[i]->ram_cache->init(static_cast<int64_t>(http_ram_cache_size * factor), vol);
ram_cache_bytes += static_cast<int64_t>(http_ram_cache_size * factor);
CACHE_VOL_SUM_DYN_STAT(cache_ram_cache_bytes_total_stat, (int64_t)(http_ram_cache_size * factor));
- } else {
+ } else if (gvol[i]->cache_vol->ramcache_enabled) {
ink_release_assert(!"Unexpected non-HTTP cache volume");
}
Debug("cache_init", "CacheProcessor::cacheInitialized[%d] - ram_cache_bytes = %" PRId64 " = %" PRId64 "Mb", i,
@@ -2541,7 +2543,8 @@ cplist_update()
for (config_vol = config_volumes.cp_queue.head; config_vol; config_vol = config_vol->link.next) {
if (config_vol->number == cp->vol_number) {
if (cp->scheme == config_vol->scheme) {
- config_vol->cachep = cp;
+ cp->ramcache_enabled = config_vol->ramcache_enabled;
+ config_vol->cachep = cp;
} else {
/* delete this volume from all the disks */
int d_no;
@@ -2716,7 +2719,8 @@ cplist_reconfigure()
(int64_t)config_vol->size, 128);
Warning("volume %d is not created", config_vol->number);
}
- Debug("cache_hosting", "Volume: %d Size: %" PRId64, config_vol->number, (int64_t)config_vol->size);
+ Debug("cache_hosting", "Volume: %d Size: %" PRId64 " Ramcache: %d", config_vol->number, (int64_t)config_vol->size,
+ config_vol->ramcache_enabled);
}
cplist_update();
/* go through volume config and grow and create volumes */
diff --git a/iocore/cache/CacheHosting.cc b/iocore/cache/CacheHosting.cc
index 3f2aa20..f8080bc 100644
--- a/iocore/cache/CacheHosting.cc
+++ b/iocore/cache/CacheHosting.cc
@@ -650,12 +650,13 @@ ConfigVolumes::BuildListFromString(char *config_file_path, char *file_buf)
line_num++;
char *end;
- char *line_end = nullptr;
- const char *err = nullptr;
- int volume_number = 0;
- CacheType scheme = CACHE_NONE_TYPE;
- int size = 0;
- int in_percent = 0;
+ char *line_end = nullptr;
+ const char *err = nullptr;
+ int volume_number = 0;
+ CacheType scheme = CACHE_NONE_TYPE;
+ int size = 0;
+ int in_percent = 0;
+ bool ramcache_enabled = true;
while (true) {
// skip all blank spaces at beginning of line
@@ -743,6 +744,18 @@ ConfigVolumes::BuildListFromString(char *config_file_path, char *file_buf)
} else {
in_percent = 0;
}
+ } else if (strcasecmp(tmp, "ramcache") == 0) { // match ramcache
+ tmp += 9;
+ if (!strcasecmp(tmp, "false")) {
+ tmp += 5;
+ ramcache_enabled = false;
+ } else if (!strcasecmp(tmp, "true")) {
+ tmp += 4;
+ ramcache_enabled = true;
+ } else {
+ err = "Unexpected end of line";
+ break;
+ }
}
// ends here
@@ -765,9 +778,10 @@ ConfigVolumes::BuildListFromString(char *config_file_path, char *file_buf)
} else {
configp->in_percent = false;
}
- configp->scheme = scheme;
- configp->size = size;
- configp->cachep = nullptr;
+ configp->scheme = scheme;
+ configp->size = size;
+ configp->cachep = nullptr;
+ configp->ramcache_enabled = ramcache_enabled;
cp_queue.enqueue(configp);
num_volumes++;
if (scheme == CACHE_HTTP_TYPE) {
@@ -775,7 +789,8 @@ ConfigVolumes::BuildListFromString(char *config_file_path, char *file_buf)
} else {
ink_release_assert(!"Unexpected non-HTTP cache volume");
}
- Debug("cache_hosting", "added volume=%d, scheme=%d, size=%d percent=%d", volume_number, scheme, size, in_percent);
+ Debug("cache_hosting", "added volume=%d, scheme=%d, size=%d percent=%d, ramcache enabled=%d", volume_number, scheme, size,
+ in_percent, ramcache_enabled);
}
tmp = bufTok.iterNext(&i_state);
diff --git a/iocore/cache/P_CacheHosting.h b/iocore/cache/P_CacheHosting.h
index 90822e2..ba4af9b 100644
--- a/iocore/cache/P_CacheHosting.h
+++ b/iocore/cache/P_CacheHosting.h
@@ -171,6 +171,7 @@ struct ConfigVol {
CacheType scheme;
off_t size;
bool in_percent;
+ bool ramcache_enabled;
int percent;
CacheVol *cachep;
LINK(ConfigVol, link);
diff --git a/iocore/cache/P_CacheVol.h b/iocore/cache/P_CacheVol.h
index 5b3254e..a51d245 100644
--- a/iocore/cache/P_CacheVol.h
+++ b/iocore/cache/P_CacheVol.h
@@ -279,12 +279,13 @@ struct AIO_Callback_handler : public Continuation {
};
struct CacheVol {
- int vol_number = -1;
- int scheme = 0;
- off_t size = 0;
- int num_vols = 0;
- Vol **vols = nullptr;
- DiskVol **disk_vols = nullptr;
+ int vol_number = -1;
+ int scheme = 0;
+ off_t size = 0;
+ int num_vols = 0;
+ bool ramcache_enabled = true;
+ Vol **vols = nullptr;
+ DiskVol **disk_vols = nullptr;
LINK(CacheVol, link);
// per volume stats
RecRawStatBlock *vol_rsb = nullptr;