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Posted to commits@mynewt.apache.org by je...@apache.org on 2021/10/26 17:04:12 UTC
[mynewt-core] 01/10: mcu/nrf5340: Add non-secure peripheral mapping
This is an automated email from the ASF dual-hosted git repository.
jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 7a8083b3ea5eaf053b672ea7c1df68afc0f40963
Author: Jerzy Kasenberg <je...@codecoup.pl>
AuthorDate: Wed Oct 20 10:23:28 2021 +0200
mcu/nrf5340: Add non-secure peripheral mapping
So far application core was using secure version of all peripherals.
If ARM TrustZone is to be used non-secure mapping is needed.
This adds syscfg value MCU_APP_SECURE that chooses if secure on
non-secure peripherals are to be used.
---
hw/mcu/nordic/nrf5340/include/nrfx_config.h | 85 +++++++++++++++++++++++++++--
hw/mcu/nordic/nrf5340/syscfg.yml | 6 ++
2 files changed, 87 insertions(+), 4 deletions(-)
diff --git a/hw/mcu/nordic/nrf5340/include/nrfx_config.h b/hw/mcu/nordic/nrf5340/include/nrfx_config.h
index 87fa001..141085e 100644
--- a/hw/mcu/nordic/nrf5340/include/nrfx_config.h
+++ b/hw/mcu/nordic/nrf5340/include/nrfx_config.h
@@ -54,6 +54,8 @@
#endif
#endif
+#if MYNEWT_VAL(BOOT_LOADER) || MYNEWT_VAL(MCU_APP_SECURE)
+
/*
* The MDK provides macros for accessing the peripheral register structures
* by using their secure and non-secure address mappings (with the names
@@ -127,6 +129,85 @@
#define NRF_WDT0 NRF_WDT0_S
#define NRF_WDT1 NRF_WDT1_S
+/* Fixups for GPIOTE driver. */
+#define NRF_GPIOTE NRF_GPIOTE0_S
+#define GPIOTE_IRQHandler GPIOTE0_IRQHandler
+
+#else
+
+#define NRF_TRUSTZONE_NONSECURE
+
+#define NRF_COMP NRF_COMP_NS
+#define NRF_CLOCK NRF_CLOCK_NS
+#define NRF_DCNF NRF_DCNF_NS
+#define NRF_DPPIC NRF_DPPIC_NS
+#define NRF_EGU0 NRF_EGU0_NS
+#define NRF_EGU1 NRF_EGU1_NS
+#define NRF_EGU2 NRF_EGU2_NS
+#define NRF_EGU3 NRF_EGU3_NS
+#define NRF_EGU4 NRF_EGU4_NS
+#define NRF_EGU5 NRF_EGU5_NS
+#define NRF_FPU NRF_FPU_NS
+#define NRF_I2S NRF_I2S0_NS
+#define NRF_IPC NRF_IPC_NS
+#define NRF_KMU NRF_KMU_NS
+#define NRF_LPCOMP NRF_LPCOMP_NS
+#define NRF_MUTEX NRF_MUTEX_NS
+#define NRF_NFCT NRF_NFCT_NS
+#define NRF_NVMC NRF_NVMC_NS
+#define NRF_OSCILLATORS NRF_OSCILLATORS_NS
+#define NRF_P0 NRF_P0_NS
+#define NRF_P1 NRF_P1_NS
+#define NRF_PDM0 NRF_PDM0_NS
+#define NRF_POWER NRF_POWER_NS
+#define NRF_PWM0 NRF_PWM0_NS
+#define NRF_PWM1 NRF_PWM1_NS
+#define NRF_PWM2 NRF_PWM2_NS
+#define NRF_PWM3 NRF_PWM3_NS
+#define NRF_QDEC0 NRF_QDEC0_NS
+#define NRF_QDEC1 NRF_QDEC1_NS
+#define NRF_QSPI NRF_QSPI_NS
+#define NRF_REGULATORS NRF_REGULATORS_NS
+#define NRF_RESET NRF_RESET_NS
+#define NRF_RTC0 NRF_RTC0_NS
+#define NRF_RTC1 NRF_RTC1_NS
+#define NRF_SAADC NRF_SAADC_NS
+#define NRF_SPIM0 NRF_SPIM0_NS
+#define NRF_SPIM1 NRF_SPIM1_NS
+#define NRF_SPIM2 NRF_SPIM2_NS
+#define NRF_SPIM3 NRF_SPIM3_NS
+#define NRF_SPIM4 NRF_SPIM4_NS
+#define NRF_SPIS0 NRF_SPIS0_NS
+#define NRF_SPIS1 NRF_SPIS1_NS
+#define NRF_SPIS2 NRF_SPIS2_NS
+#define NRF_SPIS3 NRF_SPIS3_NS
+#define NRF_TIMER0 NRF_TIMER0_NS
+#define NRF_TIMER1 NRF_TIMER1_NS
+#define NRF_TIMER2 NRF_TIMER2_NS
+#define NRF_TWIM0 NRF_TWIM0_NS
+#define NRF_TWIM1 NRF_TWIM1_NS
+#define NRF_TWIM2 NRF_TWIM2_NS
+#define NRF_TWIM3 NRF_TWIM3_NS
+#define NRF_TWIS0 NRF_TWIS0_NS
+#define NRF_TWIS1 NRF_TWIS1_NS
+#define NRF_TWIS2 NRF_TWIS2_NS
+#define NRF_TWIS3 NRF_TWIS3_NS
+#define NRF_UARTE0 NRF_UARTE0_NS
+#define NRF_UARTE1 NRF_UARTE1_NS
+#define NRF_UARTE2 NRF_UARTE2_NS
+#define NRF_UARTE3 NRF_UARTE3_NS
+#define NRF_USBD NRF_USBD_NS
+#define NRF_USBREGULATOR NRF_USBREGULATOR_NS
+#define NRF_VMC NRF_VMC_NS
+#define NRF_WDT0 NRF_WDT0_NS
+#define NRF_WDT1 NRF_WDT1_NS
+
+/* Fixups for GPIOTE driver. */
+#define NRF_GPIOTE NRF_GPIOTE1_NS
+#define GPIOTE_IRQHandler GPIOTE1_IRQHandler
+
+#endif
+
/*
* The following section provides the name translation for peripherals with
* only one type of access available. For these peripherals, you cannot choose
@@ -142,10 +223,6 @@
#define NRF_SPU NRF_SPU_S
#define NRF_UICR NRF_UICR_S
-/* Fixups for GPIOTE driver. */
-#define NRF_GPIOTE NRF_GPIOTE0_S
-#define GPIOTE_IRQHandler GPIOTE0_IRQHandler
-
/* Fixups for QDEC driver. */
#define NRF_QDEC NRF_QDEC0
#define QDEC_IRQHandler QDEC0_IRQHandler
diff --git a/hw/mcu/nordic/nrf5340/syscfg.yml b/hw/mcu/nordic/nrf5340/syscfg.yml
index 9a07ebb..7480df9 100644
--- a/hw/mcu/nordic/nrf5340/syscfg.yml
+++ b/hw/mcu/nordic/nrf5340/syscfg.yml
@@ -96,6 +96,12 @@ syscfg.defs:
MCU/BSP wants to handle APPROTECT on its own.
value: 0
+ MCU_APP_SECURE:
+ description: >
+ Application code to runs in secure mode.
+ This settings must have same value for bootloader and application build.
+ value: 1
+
# MCU peripherals definitions
ADC_0:
description: 'Enable nRF5340 ADC 0'