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Posted to commits@mynewt.apache.org by ut...@apache.org on 2018/04/18 21:56:28 UTC
[mynewt-core] 05/13: Undo previously applied i2c patch to stm32cube
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 847cbcb27205f5ce97704095dfacac3fc597d60c
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 09:23:03 2018 -0300
Undo previously applied i2c patch to stm32cube
---
.../STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h | 6 +-
.../STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c | 85 +++-------
hw/mcu/stm/stm32l1xx/src/hal_i2c.c | 172 ---------------------
3 files changed, 21 insertions(+), 242 deletions(-)
diff --git a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
index 2e67480..3e97f68 100644
--- a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
+++ b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
@@ -165,8 +165,7 @@ typedef enum
HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
- HAL_I2C_MODE_MEM = 0x40U, /*!< I2C communication is in Memory Mode */
- HAL_I2C_MODE_MASTER_SEL = 0x11U /*!< I2C communication is in Master Mode, no stop sent */
+ HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
}HAL_I2C_ModeTypeDef;
@@ -514,9 +513,6 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Master_Receive_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-
/******* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
diff --git a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c
index 3509ce9..02ab64b 100644
--- a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c
+++ b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c
@@ -592,7 +592,7 @@ HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
* @param Timeout Timeout duration
* @retval HAL status
*/
-static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout, uint8_t sendStop)
+HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint32_t tickstart = 0x00U;
@@ -601,12 +601,10 @@ static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c,
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL) {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
+ /* Wait until BUSY flag is reset */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
+ {
+ return HAL_BUSY;
}
/* Process Locked */
@@ -699,15 +697,11 @@ static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c,
}
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- hi2c->Mode = HAL_I2C_MODE_NONE;
- } else {
- hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
hi2c->State = HAL_I2C_STATE_READY;
-
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
@@ -719,18 +713,6 @@ static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c,
}
}
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Transmit_Common(hi2c, DevAddress, pData, Size,
- Timeout, 1);
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Transmit_Common(hi2c, DevAddress, pData, Size,
- Timeout, 0);
-}
-
/**
* @brief Receives in master mode an amount of data in blocking mode.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
@@ -742,7 +724,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c, uint16
* @param Timeout Timeout duration
* @retval HAL status
*/
-static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout, uint8_t sendStop)
+HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint32_t tickstart = 0x00U;
@@ -751,12 +733,10 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL) {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
+ /* Wait until BUSY flag is reset */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
+ {
+ return HAL_BUSY;
}
/* Process Locked */
@@ -805,10 +785,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
/* Generate Stop */
- if (sendStop) {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
}
else if(hi2c->XferSize == 1U)
{
@@ -819,9 +796,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
}
else if(hi2c->XferSize == 2U)
{
@@ -829,9 +804,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Enable Pos */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
@@ -880,9 +853,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
@@ -918,9 +889,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
@@ -964,12 +933,8 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
hi2c->State = HAL_I2C_STATE_READY;
- if (!sendStop) {
- hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
- } else {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- }
-
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
@@ -981,16 +946,6 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
}
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Receive_Common(hi2c, DevAddress, pData, Size, Timeout, 1);
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Receive_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Receive_Common(hi2c, DevAddress, pData, Size, Timeout, 0);
-}
-
/**
* @brief Transmits in slave mode an amount of data in blocking mode.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
diff --git a/hw/mcu/stm/stm32l1xx/src/hal_i2c.c b/hw/mcu/stm/stm32l1xx/src/hal_i2c.c
deleted file mode 100644
index 939c3b3..0000000
--- a/hw/mcu/stm/stm32l1xx/src/hal_i2c.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <hal/hal_i2c.h>
-#include <hal/hal_gpio.h>
-
-#include "stm32l1xx.h"
-#include "stm32l1xx_hal_dma.h"
-#include "stm32l1xx_hal_i2c.h"
-#include "stm32l1xx_hal_gpio.h"
-#include "stm32l1xx_hal_rcc.h"
-#include "mcu/stm32l1xx_mynewt_hal.h"
-#include "mcu/stm32l1_bsp.h"
-
-#define HAL_I2C_MAX_DEVS 3
-
-#define I2C_ADDRESS 0xae
-
-struct stm32l1_hal_i2c {
- I2C_HandleTypeDef hid_handle;
-};
-
-#if MYNEWT_VAL(I2C_0)
-static struct stm32l1_hal_i2c i2c0;
-#endif
-#if MYNEWT_VAL(I2C_1)
-static struct stm32l1_hal_i2c i2c1;
-#endif
-#if MYNEWT_VAL(I2C_2)
-static struct stm32l1_hal_i2c i2c2;
-#endif
-
-static struct stm32l1_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
-#if MYNEWT_VAL(I2C_0)
- &i2c0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_1)
- &i2c1,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_2)
- &i2c2,
-#else
- NULL,
-#endif
-};
-
-int
-hal_i2c_init(uint8_t i2c_num, void *usercfg)
-{
- struct stm32l1_hal_i2c_cfg *cfg = (struct stm32l1_hal_i2c_cfg *)usercfg;
- struct stm32l1_hal_i2c *dev;
- I2C_InitTypeDef *init;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- init = &dev->hid_handle.Init;
- dev->hid_handle.Instance = cfg->hic_i2c;
- init->ClockSpeed = cfg->hic_speed;
- if (cfg->hic_10bit) {
- init->AddressingMode = I2C_ADDRESSINGMODE_10BIT;
- } else {
- init->AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- }
- init->OwnAddress1 = I2C_ADDRESS;
- init->OwnAddress2 = 0xFE;
-
- /*
- * Configure GPIO pins for I2C.
- * Enable clock routing for I2C.
- */
- rc = hal_gpio_init_af(cfg->hic_pin_sda, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
- }
- rc = hal_gpio_init_af(cfg->hic_pin_scl, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
- }
- *cfg->hic_rcc_reg |= cfg->hic_rcc_dev;
- rc = HAL_I2C_Init(&dev->hid_handle);
- if (rc) {
- goto err;
- }
-
- return 0;
-err:
- *cfg->hic_rcc_reg &= ~cfg->hic_rcc_dev;
- return rc;
-}
-
-int
-hal_i2c_master_write(uint8_t i2c_num, struct hal_i2c_master_data *data,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32l1_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- return HAL_I2C_Master_Transmit_NoStop(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- } else {
- return HAL_I2C_Master_Transmit(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- }
-}
-
-int
-hal_i2c_master_read(uint8_t i2c_num, struct hal_i2c_master_data *pdata,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32l1_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- return HAL_I2C_Master_Receive_NoStop(&dev->hid_handle,
- pdata->address << 1, pdata->buffer, pdata->len, timo);
- } else {
- return HAL_I2C_Master_Receive(&dev->hid_handle, pdata->address << 1,
- pdata->buffer, pdata->len, timo);
- }
-}
-
-int
-hal_i2c_master_probe(uint8_t i2c_num, uint8_t address, uint32_t timo)
-{
- struct stm32l1_hal_i2c *dev;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- rc = HAL_I2C_IsDeviceReady(&dev->hid_handle, address, 1, timo);
- return rc;
-}
--
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