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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2021/11/08 18:03:37 UTC

[GitHub] [incubator-nuttx] Ouss4 opened a new pull request #4809: arch/risc-v: Driver for the ESP32-C3's CDC console.

Ouss4 opened a new pull request #4809:
URL: https://github.com/apache/incubator-nuttx/pull/4809


   ## Summary
   This PR adds the driver for the built-in USB-to-Serial converter found in ESP32-C3 (rev. 3)
   ## Impact
   New feature.
   ## Testing
   Provided defconfig:  `./tools/configure.sh esp32c3-devkit:usbconsole`
   


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[GitHub] [incubator-nuttx] acassis merged pull request #4809: arch/risc-v: Driver for the ESP32-C3's CDC console.

Posted by GitBox <gi...@apache.org>.
acassis merged pull request #4809:
URL: https://github.com/apache/incubator-nuttx/pull/4809


   


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[GitHub] [incubator-nuttx] acassis commented on a change in pull request #4809: arch/risc-v: Driver for the ESP32-C3's CDC console.

Posted by GitBox <gi...@apache.org>.
acassis commented on a change in pull request #4809:
URL: https://github.com/apache/incubator-nuttx/pull/4809#discussion_r745058384



##########
File path: arch/risc-v/src/esp32c3/hardware/esp32c3_usb_serial_jtag.h
##########
@@ -0,0 +1,1233 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/hardware/esp32c3_usb_serial_jtag.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_ESP32C3_HARDWARE_ESP32C3_USB_SERIAL_JTAG_H
+#define __ARCH_RISCV_SRC_ESP32C3_HARDWARE_ESP32C3_USB_SERIAL_JTAG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "esp32c3_soc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/** Configuration Registers */
+
+/** USB_SERIAL_JTAG_EP1_REG register
+ *  USB_SERIAL_JTAG_EP1_REG.
+ */
+
+#define USB_SERIAL_JTAG_EP1_REG (DR_REG_USB_SERIAL_JTAG_BASE + 0x0)
+
+/* USB_SERIAL_JTAG_RDWR_BYTE : R/W; bitpos: [8:0]; default: 0;
+ * Write and read byte data to/from UART Tx/Rx FIFO through this field.
+ * When USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT is set  then user can write
+ * data (up to 64 bytes) into UART Tx FIFO. When
+ * USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is set, user can check
+ * USB_SERIAL_JTAG_OUT_EP1_WR_ADDR and USB_SERIAL_JTAG_OUT_EP0_RD_ADDR to
+ * know how many data is received, then read that amount of data from UART
+ * Rx
+ * FIFO.
+ */
+
+#define USB_SERIAL_JTAG_RDWR_BYTE    0x000000FF

Review comment:
       Please check all hexacode to lowercase




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