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Posted to commits@harmony.apache.org by nd...@apache.org on 2007/04/23 03:52:31 UTC
svn commit: r531314 - in /harmony/enhanced/drlvm/trunk/vm:
port/src/thread/win/apr_thread_ext.c vmcore/src/thread/win/atomics.cpp
Author: ndbeyer
Date: Sun Apr 22 18:52:31 2007
New Revision: 531314
URL: http://svn.apache.org/viewvc?view=rev&rev=531314
Log:
Add locks, mfence and sfence instructions to align windows with linux
Modified:
harmony/enhanced/drlvm/trunk/vm/port/src/thread/win/apr_thread_ext.c
harmony/enhanced/drlvm/trunk/vm/vmcore/src/thread/win/atomics.cpp
Modified: harmony/enhanced/drlvm/trunk/vm/port/src/thread/win/apr_thread_ext.c
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/port/src/thread/win/apr_thread_ext.c?view=diff&rev=531314&r1=531313&r2=531314
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/port/src/thread/win/apr_thread_ext.c (original)
+++ harmony/enhanced/drlvm/trunk/vm/port/src/thread/win/apr_thread_ext.c Sun Apr 22 18:52:31 2007
@@ -28,9 +28,11 @@
#if _MSC_VER < 1400
// VC++ 2003
extern void _ReadWriteBarrier();
+ extern void _mm_mfence(void);
#else
// VC++ 2005
#include <intrin.h>
+ #include <emmintrin.h>
#endif
#pragma intrinsic (_ReadWriteBarrier)
@@ -90,7 +92,18 @@
}
APR_DECLARE(void) apr_memory_rw_barrier() {
- _ReadWriteBarrier();
+#ifdef _EM64T_
+ // if x86_64/x64/EM64T, then use an mfence to flush memory caches
+ _mm_mfence();
+#else
+ /* otherwise, we assume this is an x86, so insert an inline assembly
+ * macro to insert a lock instruction
+ *
+ * the lock is what's needed, so the 'add' is setup, essentially, as a no-op
+ */
+ __asm {lock add [esp], 0 }
+#endif
+ _ReadWriteBarrier();
}
APR_DECLARE(apr_status_t) apr_thread_times(apr_thread_t *thread,
Modified: harmony/enhanced/drlvm/trunk/vm/vmcore/src/thread/win/atomics.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/vmcore/src/thread/win/atomics.cpp?view=diff&rev=531314&r1=531313&r2=531314
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/vmcore/src/thread/win/atomics.cpp (original)
+++ harmony/enhanced/drlvm/trunk/vm/vmcore/src/thread/win/atomics.cpp Sun Apr 22 18:52:31 2007
@@ -21,18 +21,33 @@
// VC++ 2003
extern "C" void _ReadWriteBarrier();
extern "C" void _WriteBarrier();
+ extern "C" void _mm_mfence(void);
+ extern "C" void _mm_sfence(void);
#else
// VC++ 2005
#include <intrin.h>
+ #include <emmintrin.h>
#endif
#pragma intrinsic (_ReadWriteBarrier)
#pragma intrinsic (_WriteBarrier)
void MemoryReadWriteBarrier() {
+#ifdef _EM64T_
+ // if x86_64/x64/EM64T, then use an mfence to flush memory caches
+ _mm_mfence();
+#else
+ /* otherwise, we assume this is an x86, so insert an inline assembly
+ * macro to insert a lock instruction
+ *
+ * the lock is what's needed, so the 'add' is setup, essentially, as a no-op
+ */
+ __asm {lock add [esp], 0 }
+#endif
_ReadWriteBarrier();
}
void MemoryWriteBarrier() {
+ _mm_sfence();
_WriteBarrier();
}