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Posted to gitbox@activemq.apache.org by GitBox <gi...@apache.org> on 2019/10/29 17:14:22 UTC
[GitHub] [activemq-artemis-native] clebertsuconic commented on a change in
pull request #5: ARTEMIS-2533 Support multiple architecture for ASYNCIO
kernel by-pass
clebertsuconic commented on a change in pull request #5: ARTEMIS-2533 Support multiple architecture for ASYNCIO kernel by-pass
URL: https://github.com/apache/activemq-artemis-native/pull/5#discussion_r340213644
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File path: src/main/c/org_apache_activemq_artemis_nativo_jlibaio_LibaioContext.c
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@@ -32,15 +32,11 @@
#include <fcntl.h>
#include <stdlib.h>
#include <pthread.h>
+#include <stdatomic.h>
#include <limits.h>
#include "org_apache_activemq_artemis_nativo_jlibaio_LibaioContext.h"
#include "exception_helper.h"
-//x86 has a strong memory model and there is no need of HW fences if just Write-Back (WB) memory is used
-#define mem_barrier() __asm__ __volatile__ ("":::"memory")
-#define read_barrier() __asm__ __volatile__("":::"memory")
-#define store_barrier() __asm__ __volatile__("":::"memory")
-
Review comment:
this is fine I think, we can just use newer gcc versions... it's just the compiler.
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