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Posted to commits@nuttx.apache.org by bt...@apache.org on 2020/06/11 00:51:59 UTC
[incubator-nuttx] branch pci updated (eb3a16d -> 49c2769)
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a change to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
omit eb3a16d pcie: create MSI/MSIX related marcos and simplify the msi/msix routines
omit 86025f3 pcie: cosmetic changes to fit check tools
omit dc58a0d pcie: make pcie enumerate routine as common instead of architecture dependent
omit 16f66bd pcie: qemu: return -EINVAL if buffer argument is NULL
omit ae06b45 pcie: qemu: remove not used header
omit 4c827b2 pcie: checking bar > 4 for 64bit bars are sufficient
omit 23c1afd pcie: enable don't take flags, hardcoded enabling flags
omit b91b546 pcie: types array should be null terminated
omit 1b5be61 virt: add qemu pci-testdev driver
omit ee5187a x86_64: qemu: implement pci-e functions and enumerate pci-e devices on boot
omit e4b9cec pcie: add framework
add 1414c55 boards/arm: Leverage PR 1150 to other ARM Make.defs
add 8190041 boards/mips: Leverage PR 1150 to MIPS make.defs.
add e018309 tools/Makefile*: Clean tools binaries at the end of distclean.
add 18e4ab9 Makefile: Build the tools/incdir binary immediately.
add 20615a9 Do not rewrite the root directory if it has not changed
add 198b8ae boards: Leverage PR 1150 to all remaining board Make.defs
add 0f7c2d6 fs/fat: Run all .c and .h files through nxstyle
add 06972c0 dps.h: Remove CONFIG_LIBM and CONFIG_ARCH_MATH_H
add 274ee57 x86_64: Use gcc compiler instead of clang for macOS
add f6a87c5 arch: Change dependence from ELF to LIBC_ARCH_ELF
add b932b65 arch: Select 64bit elf base on the architecture characteristic
add 9b87732 Fix wrong prefix on x86_64 builds in macOS
add 806710b drivers: wireless: New flow control based on total bulk size in gs2200m.c
add eac66d7 lib/stdlib: Change some macro to inline function
add b8b61dc lib/stdlib: Implement aligned_alloc and posix_memalign
add d1343df libc/time: Implement timespec_get for C11
add 1f8de34 net/inet/inet_sockif.c: Fix debugassert compilation
add 17e4582 net/inet/inet_sockif.c: Fix long lines
add ed0c38c arch/intel64: Don't include immintrin.h
add 43183e5 drivers/serial/pty.c: Correct returned number of bytes.
add 1041100 sched/task/task_spawn.c: Fix duplicate task_spawn()
add 0e42558 include/nuttx/video/video.h: Move global variable declaration out of header file
add 4fe0f3d stdint.h: Fix a comment
add 4f0957a threads.h: Support mtx_timedlock and recursive mutex
add d884dd3 Fix nxstyle complaints
add 86b7c20 Implement "j" modifier for printf format
add 4fe35cc boards: Remove OUTPUT_FORMAT and OUTPUT_ARCH from ld script
add 57caa4e libc: Move MB_LEN_MAX from lib_wctob.c to limits.h
add f1433ee libc: Fix the typo error in wcrtomb
add 7cbcbcd libc: Implement wcsrtombs, wcsnrtombs and mbsnrtowcs
add de50900 libc: Implement mblen, mbstowcs and wcstombs
add a7174ce libc: Unify the selection of inline or macro
add 9ff3242 libc: Implement tmpfile() function
add 6b3ac93 libc: Fix a typo error in tmpfile
add 0da3400 ez80: Fix ez80 build problems.
add 698ac72 stm32h7:stm32_sdmmc fix compiler error when SDMMC2 is enabled
add 1688440 mkdeps: Quote CFLAGS to be safe with the shell
add 44585ee mkdeps: Use %zu/%zd printf format instead of casts
add d05cca0 boards/mips: restore OUTPUT_FORMAT and OUTPUT_ARCH for mips link scripts
add a55f8d2 libc: Implement vscanf() function
add 29f9d97 libc: Call vdprintf in printf/vprintf for CONFIG_NFILE_STREAMS == 0
add 4029706 libc: tmpfile shouldn't hardcode the folder to /tmp
add c76443f libc: Remove CONFIG_LIBC_TMPDIR definition from lib_mkstemp.c
add 3c4fec8 libc: Fix warning: implicit declaration of function ‘strnlen’
add 91779e9 arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h: Fix nxstyle issues
add fe44ce0 arch/arm/src/stm32h7/stm32_spi.c: Corrections for SPI master driver
add 4935ab5 printf() and vprintf() must use C buffered I/O if available.
add 7575518 boards/Board.mk: Remove include $(TOPDIR)/Make.defs
add ff9d435 include/cxx/cwchar: include wctype.h to fix libcxx build break
add ac84a51 libc/time: call _NX_OPEN/_NX_CLOSE instead of open/close
add c45289e Fix typo in arch/arm/src/lpc17xx_40xx/Kconfig
add 85b859f arch: _exit should't call nxsched_resume_scheduler twice in SMP mode
add b4bd942 arch: Rename _exit to up_exit to follow the naming convention
add a696788 sched: Change the return type of nxtask_activate to void
add ef30832 include: audio: Remove CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS from audio.h
add 4b9886f drivers: audio: Return -ENOTTY in xxx_ioctl() if not handled
add 1c17e5f arch/arm/src/stm32/Kconfig: Fix a trivial typo (I2C -> I2S)
add a098e03 arch/arm/src/stm32/stm32_i2s.h: file hardware/stm32_i2s.h does not exist.
add a30b77c arch/arm/src/stm32/stm32.h: Include stm32_i2s.h
add 1ca5527 arch/arm/src/stm32/stm32_i2s: Change the initialize function from stm32_i2sdev_initialize to stm32_i2sbus_initiliaze, to be consistent with the way other buses are initialized. The stm32_i2sdev_initiliaze (similar to stm32_spidev_initialize for example) is a board specific function that does any necessary initialization that's board depedent.
add 871d5c6 Fix PR 1188 nxstyle issues
add b7ab9aa nuttx compiler.h: Add location directive for code and data
add 36ae29c sim: Fix hostfs errno
add 368fbd0 cxd56: Fix lock issue in Spresense audio driver
add 3409c98 sched/task: Simplify atexit and onexit implementation
add 09f64dd sched/task: Avoid the cast in atexit when CONFIG_SCHED_ONEXIT is defined
add d065bbe audio/pcm_decode.c: Fix #endif position when excluding stop and pause/resume.
add 8da4b02 drivers/audio: Add CS4344 driver.
add d001c82 boards/arm/stm32/olimex-stm32-p407: Add support for the CS4344 audio driver.
add 36f54e2 Fix PR1201 nxstyle issues.
add ddf2704 stm32h7:Kconfig limit STM32H7_SPIn_COMMTYPE range to valid values
add b191714 stm32h7 boards:Emit the the D3 power domain section for locating BDMA data
add a254023 stm32h7:SPI Locate SPI6 DMA buffers in sram4
add a7a2726 Char drivers should return -ENOTTY if CMD is not recognized
add a793369 stm32h7:DMA Add BDMA support
add 465a13c arch/arm/src: Return ENOTTY when the ioctl command is not recognized.
add a90f657 arch/arm/src/stm32/stm32_hrtim.c: Fix nxstyle issues.
add 4037669 boards/sim: Break out the thread loop instead calling pthread_exit
add 9718611 Fix lpc17_40_ubxmdm.c board driver to return -ENOTTY
add 0020091 Run nxstyle on lpc17_40_ubxmdm.c
add d41a2f8 Add support to STM32F411CE
add 1e8cd3f Add initial support to STM32F411-Minimum board (aka BlackPill)
add f227b65 Fix nxstyle issues
add a673086 Add Apache license to Make.defs as well
add 4fce224 Add LED support to stm32f411-minimum board
add 73fc437 Fix nxstyle errors
add 1b47aa1 drivers/button: Let board_button_initialize return the button number
add a61b8a1 Fix nxstyle issue
add 1ba1c34 drivers/led: Decopule USERLED from ARCH_HAVE_LEDS
add 7696547 drivers/led: Let board_userled_initialize return the led number
add 7a18ebe drivers/led: Extend userled_set_t from 8bits to 32bits
add 24262a4 Fix nxstyle issue
add bcd7ccc arch/risc-v/src/k210: Add basic gpiohs support
add 2b0324c boards/risc-v/k210/maix-bit: Add initial autoled support
add d0158fe boards: Fix Kconfig for maix-bit with QEMU
add 6f3cef8 libc: Add the remaining wscanf series declaration
add f4a9c45 Move Serial Console to USART1 to keep compatibility with BluePill
add 2af72cc eagle100: add the missing NXFLAT macros
add e661ac5 eagle100: disable CONFIG_BOARD_LATE_INITIALIZE since board_late_initialize not defined
add 8708e34 arch/arm/src/nrf52/nrf52_idle.c: disable WFI in up_idle
add 7e3c341 stm32h7:Fix compiler error stm32_bdma_capable
add 7758eb8 arch: Define INTx_C and UINTx_C macro
add 4fbbd2e arch: Move PRIxMAX and SCNxMAX definition to include/stdint.h
add 43d7c1e libc: Add IPTR for puts/fputs
add 0317eae libc: support CONFIG_ARCH_ROMGETC for scanf function series
add 8a60cc0 drivers: audio: Send stop message when received the final buffer
add 958ddc1 drivers: audio: Add a buffering feature to cxd56
add 8ae0a13 boards: spresense: Change audio buffer size and mq size for wifi
add 0430c6c Add problem matching for gcc and nxstyle to github actions
new a9f98b8 pcie: add framework
new 5516251 x86_64: qemu: implement pci-e functions and enumerate pci-e devices on boot
new d714782 virt: add qemu pci-testdev driver
new 669be1f pcie: types array should be null terminated
new 68f2bf5 pcie: enable don't take flags, hardcoded enabling flags
new a0e4d9e pcie: checking bar > 4 for 64bit bars are sufficient
new 228acef pcie: qemu: remove not used header
new 370d0fe pcie: qemu: return -EINVAL if buffer argument is NULL
new 8cd64f6 pcie: make pcie enumerate routine as common instead of architecture dependent
new 870dbea pcie: cosmetic changes to fit check tools
new 49c2769 pcie: create MSI/MSIX related marcos and simplify the msi/msix routines
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
* -- * -- B -- O -- O -- O (eb3a16d)
\
N -- N -- N refs/heads/pci (49c2769)
You should already have received notification emails for all of the O
revisions, and so the following emails describe only the N revisions
from the common base, B.
Any revisions marked "omit" are not gone; other references still
refer to them. Any revisions marked "discard" are gone forever.
The 11 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
.github/gcc.json | 28 +
.github/nxstyle.json | 28 +
.github/workflows/build.yml | 2 +
.github/workflows/check.yml | 1 +
Documentation/NuttxPortingGuide.html | 6 +-
Makefile | 57 +-
arch/Kconfig | 1 +
arch/arm/include/inttypes.h | 21 +-
arch/arm/include/stm32/chip.h | 25 +
arch/arm/src/armv7-m/Kconfig | 2 +-
arch/arm/src/armv8-m/Kconfig | 2 +-
arch/arm/src/common/arm_exit.c | 12 +-
arch/arm/src/cxd56xx/cxd56_adc.c | 2 +-
arch/arm/src/lpc17xx_40xx/Kconfig | 2 +-
arch/arm/src/nrf52/nrf52_idle.c | 8 +-
arch/arm/src/stm32/Kconfig | 9 +-
arch/arm/src/stm32/stm32.h | 5 +-
arch/arm/src/stm32/stm32_hrtim.c | 468 ++++++++----
arch/arm/src/stm32/stm32_i2s.c | 6 +-
arch/arm/src/stm32/stm32_i2s.h | 5 +-
arch/arm/src/stm32f7/Kconfig | 2 +-
arch/arm/src/stm32h7/Kconfig | 8 +-
arch/arm/src/stm32h7/hardware/stm32_bdma.h | 40 +-
arch/arm/src/stm32h7/hardware/stm32_dma.h | 18 +-
arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h | 41 +-
arch/arm/src/stm32h7/stm32_dma.c | 235 +++++-
arch/arm/src/stm32h7/stm32_sdmmc.c | 5 +
arch/arm/src/stm32h7/stm32_spi.c | 156 ++--
arch/avr/include/avr/inttypes.h | 21 +-
arch/avr/include/avr32/inttypes.h | 21 +-
arch/avr/src/common/up_exit.c | 12 +-
arch/hc/include/inttypes.h | 42 +-
arch/hc/src/common/up_exit.c | 12 +-
arch/mips/include/inttypes.h | 21 +-
arch/mips/src/common/mips_exit.c | 12 +-
arch/misoc/include/inttypes.h | 21 +-
arch/misoc/src/lm32/lm32_exit.c | 12 +-
arch/misoc/src/minerva/minerva_exit.c | 12 +-
arch/or1k/include/inttypes.h | 21 +-
arch/or1k/src/common/up_exit.c | 12 +-
arch/renesas/include/m16c/inttypes.h | 21 +-
arch/renesas/include/rx65n/inttypes.h | 21 +-
arch/renesas/include/sh1/inttypes.h | 21 +-
arch/renesas/src/common/up_exit.c | 12 +-
arch/risc-v/Kconfig | 1 +
arch/risc-v/include/inttypes.h | 21 +-
arch/risc-v/src/common/riscv_exit.c | 12 +-
arch/risc-v/src/k210/Make.defs | 5 +-
arch/risc-v/src/k210/hardware/k210_memorymap.h | 3 +-
.../{hardware/k210_memorymap.h => k210_fpioa.c} | 39 +-
arch/risc-v/src/k210/k210_fpioa.h | 92 +++
.../risc-v/src/k210/k210_gpiohs.c | 79 +-
.../risc-v/src/k210/k210_gpiohs.h | 91 ++-
arch/sim/Kconfig | 1 +
arch/sim/include/inttypes.h | 34 +-
arch/sim/src/sim/up_exit.c | 12 +-
arch/sim/src/sim/up_hostfs.c | 100 ++-
arch/x86/include/i486/inttypes.h | 21 +-
arch/x86/src/common/up_exit.c | 12 +-
arch/x86_64/include/intel64/inttypes.h | 21 +-
arch/x86_64/src/common/up_exit.c | 11 +-
arch/x86_64/src/intel64/intel64_rng.c | 10 +-
arch/xtensa/include/inttypes.h | 21 +-
arch/xtensa/src/common/xtensa_exit.c | 12 +-
arch/z16/include/inttypes.h | 19 +-
arch/z16/src/common/z16_exit.c | 12 +-
arch/z80/include/ez80/inttypes.h | 37 +-
arch/z80/include/z180/inttypes.h | 19 +-
arch/z80/include/z8/inttypes.h | 19 +-
arch/z80/include/z80/inttypes.h | 19 +-
arch/z80/src/Makefile | 1 -
arch/z80/src/common/z80_exit.c | 12 +-
arch/z80/src/ez80/Toolchain.defs | 2 +-
audio/pcm_decode.c | 4 +-
binfmt/Kconfig | 7 -
binfmt/binfmt_execmodule.c | 11 +-
boards/Board.mk | 2 -
boards/Kconfig | 14 +
boards/arm/a1x/pcduino-a10/scripts/Make.defs | 7 +-
boards/arm/a1x/pcduino-a10/scripts/sdram.ld | 2 -
boards/arm/a1x/pcduino-a10/src/a1x_buttons.c | 2 +-
boards/arm/a1x/pcduino-a10/src/a1x_leds.c | 12 +-
.../arm/am335x/beaglebone-black/scripts/Make.defs | 7 +-
.../arm/am335x/beaglebone-black/scripts/sdram.ld | 2 -
.../am335x/beaglebone-black/src/am335x_buttons.c | 2 +-
.../arm/am335x/beaglebone-black/src/am335x_leds.c | 6 +-
boards/arm/c5471/c5471evm/scripts/Make.defs | 7 +-
.../arm/cxd56xx/spresense/configs/wifi/defconfig | 2 +-
boards/arm/cxd56xx/spresense/scripts/Make.defs | 7 +-
boards/arm/cxd56xx/spresense/src/cxd56_buttons.c | 3 +-
boards/arm/cxd56xx/spresense/src/cxd56_userleds.c | 5 +-
boards/arm/dm320/ntosd-dm320/scripts/Make.defs | 7 +-
boards/arm/efm32/efm32-g8xx-stk/scripts/Make.defs | 7 +-
.../arm/efm32/efm32-g8xx-stk/src/efm32_userleds.c | 5 +-
boards/arm/efm32/efm32gg-stk3700/scripts/Make.defs | 7 +-
.../arm/efm32/efm32gg-stk3700/src/efm32_userleds.c | 6 +-
.../olimex-efm32g880f128-stk/scripts/Make.defs | 7 +-
.../olimex-efm32g880f128-stk/src/efm32_buttons.c | 5 +-
boards/arm/imx6/sabre-6quad/scripts/Make.defs | 7 +-
boards/arm/imx6/sabre-6quad/scripts/dramboot.ld | 2 -
boards/arm/imx6/sabre-6quad/src/imx_userleds.c | 5 +-
boards/arm/imxrt/imxrt1020-evk/scripts/Make.defs | 7 +-
boards/arm/imxrt/imxrt1020-evk/src/imxrt_buttons.c | 3 +-
.../arm/imxrt/imxrt1020-evk/src/imxrt_userleds.c | 5 +-
.../arm/imxrt/imxrt1050-evk/configs/knsh/Make.defs | 7 +-
.../imxrt1050-evk/configs/libcxxtest/Make.defs | 7 +-
boards/arm/imxrt/imxrt1050-evk/scripts/Make.defs | 7 +-
boards/arm/imxrt/imxrt1050-evk/src/imxrt_buttons.c | 3 +-
.../arm/imxrt/imxrt1050-evk/src/imxrt_userleds.c | 5 +-
.../arm/imxrt/imxrt1060-evk/configs/knsh/Make.defs | 7 +-
.../imxrt1060-evk/configs/libcxxtest/Make.defs | 7 +-
boards/arm/imxrt/imxrt1060-evk/scripts/Make.defs | 7 +-
boards/arm/imxrt/imxrt1060-evk/src/imxrt_buttons.c | 3 +-
.../arm/imxrt/imxrt1060-evk/src/imxrt_userleds.c | 5 +-
boards/arm/kinetis/freedom-k28f/scripts/Make.defs | 7 +-
boards/arm/kinetis/freedom-k28f/src/k28_userleds.c | 5 +-
boards/arm/kinetis/freedom-k64f/scripts/Make.defs | 7 +-
boards/arm/kinetis/freedom-k64f/src/k64_buttons.c | 11 +-
boards/arm/kinetis/freedom-k64f/src/k64_userleds.c | 5 +-
boards/arm/kinetis/freedom-k66f/scripts/Make.defs | 7 +-
boards/arm/kinetis/freedom-k66f/src/k66_buttons.c | 11 +-
boards/arm/kinetis/freedom-k66f/src/k66_userleds.c | 5 +-
boards/arm/kinetis/kwikstik-k40/scripts/Make.defs | 7 +-
boards/arm/kinetis/kwikstik-k40/src/k40_buttons.c | 12 +-
boards/arm/kinetis/teensy-3.x/scripts/Make.defs | 7 +-
boards/arm/kinetis/teensy-3.x/src/k20_userleds.c | 5 +-
boards/arm/kinetis/twr-k60n512/scripts/Make.defs | 7 +-
boards/arm/kinetis/twr-k60n512/src/k60_buttons.c | 4 +-
boards/arm/kinetis/twr-k64f120m/scripts/Make.defs | 7 +-
boards/arm/kl/freedom-kl25z/scripts/Make.defs | 7 +-
boards/arm/kl/freedom-kl26z/scripts/Make.defs | 7 +-
boards/arm/kl/teensy-lc/scripts/Make.defs | 7 +-
.../arm/lc823450/lc823450-xgevk/scripts/Make.defs | 7 +-
boards/arm/lpc17xx_40xx/lincoln60/include/board.h | 21 +-
.../arm/lpc17xx_40xx/lincoln60/scripts/Make.defs | 7 +-
.../lpc17xx_40xx/lincoln60/src/lpc17_40_buttons.c | 9 +-
.../lpc4088-devkit/configs/knsh/Make.defs | 7 +-
.../lpc17xx_40xx/lpc4088-devkit/scripts/Make.defs | 7 +-
.../lpc4088-devkit/src/lpc17_40_buttons.c | 8 +-
.../lpc4088-devkit/src/lpc17_40_userleds.c | 5 +-
.../lpc4088-quickstart/configs/knsh/Make.defs | 7 +-
.../lpc4088-quickstart/scripts/Make.defs | 7 +-
.../lpc4088-quickstart/src/lpc17_40_buttons.c | 4 +-
.../lpc4088-quickstart/src/lpc17_40_userleds.c | 5 +-
.../lpcxpresso-lpc1768/configs/thttpd/Make.defs | 7 +-
.../lpcxpresso-lpc1768/scripts/Make.defs | 7 +-
boards/arm/lpc17xx_40xx/lx_cpu/scripts/Make.defs | 7 +-
.../lpc17xx_40xx/lx_cpu/src/lpc17_40_userleds.c | 5 +-
boards/arm/lpc17xx_40xx/mbed/scripts/Make.defs | 7 +-
boards/arm/lpc17xx_40xx/mcb1700/scripts/Make.defs | 7 +-
.../configs/thttpd-binfs/Make.defs | 7 +-
.../configs/thttpd-nxflat/Make.defs | 7 +-
.../olimex-lpc1766stk/scripts/Make.defs | 7 +-
.../olimex-lpc1766stk/src/lpc17_40_buttons.c | 13 +-
.../olimex-lpc1766stk/src/lpc17_40_leds.c | 7 +-
.../lpc17xx_40xx/open1788/configs/knsh/Make.defs | 7 +-
.../open1788/configs/knxterm/Make.defs | 7 +-
boards/arm/lpc17xx_40xx/open1788/scripts/Make.defs | 7 +-
.../lpc17xx_40xx/open1788/src/lpc17_40_buttons.c | 16 +-
.../lpc17xx_40xx/open1788/src/lpc17_40_userleds.c | 5 +-
.../lpc17xx_40xx/pnev5180b/configs/knsh/Make.defs | 7 +-
boards/arm/lpc17xx_40xx/pnev5180b/include/board.h | 46 +-
.../arm/lpc17xx_40xx/pnev5180b/scripts/Make.defs | 7 +-
.../arm/lpc17xx_40xx/u-blox-c027/scripts/Make.defs | 7 +-
.../lpc17xx_40xx/u-blox-c027/src/lpc17_40_ubxmdm.c | 232 ++++--
.../lpc17xx_40xx/zkit-arm-1769/scripts/Make.defs | 7 +-
.../zkit-arm-1769/src/lpc17_40_buttons.c | 5 +-
.../arm/lpc214x/mcu123-lpc214x/scripts/Make.defs | 7 +-
boards/arm/lpc214x/zp214xpa/scripts/Make.defs | 7 +-
.../arm/lpc2378/olimex-lpc2378/scripts/Make.defs | 7 +-
boards/arm/lpc31xx/ea3131/configs/pgnsh/Make.defs | 7 +-
boards/arm/lpc31xx/ea3131/scripts/Make.defs | 7 +-
boards/arm/lpc31xx/ea3131/src/lpc31_buttons.c | 3 +-
boards/arm/lpc31xx/ea3152/scripts/Make.defs | 7 +-
boards/arm/lpc31xx/ea3152/src/lpc31_buttons.c | 3 +-
.../arm/lpc31xx/olimex-lpc-h3131/scripts/Make.defs | 7 +-
.../arm/lpc31xx/olimex-lpc-h3131/src/lpc31_leds.c | 6 +-
.../lpc43xx/bambino-200e/configs/netnsh/Make.defs | 9 +-
boards/arm/lpc43xx/bambino-200e/include/board.h | 28 +-
boards/arm/lpc43xx/bambino-200e/scripts/Make.defs | 8 +-
.../arm/lpc43xx/bambino-200e/src/lpc43_autoleds.c | 6 +-
.../arm/lpc43xx/bambino-200e/src/lpc43_buttons.c | 6 +-
.../arm/lpc43xx/bambino-200e/src/lpc43_userleds.c | 7 +-
boards/arm/lpc43xx/lpc4330-xplorer/include/board.h | 26 +-
.../arm/lpc43xx/lpc4330-xplorer/scripts/Make.defs | 7 +-
.../lpc43xx/lpc4330-xplorer/src/lpc43_autoleds.c | 4 +-
.../lpc43xx/lpc4330-xplorer/src/lpc43_buttons.c | 8 +-
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boards/arm/lpc43xx/lpc4337-ws/README.txt | 4 +-
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boards/arm/stm32/stm32f334-disco/scripts/Make.defs | 7 +-
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boards/arm/stm32/stm32f411-minimum/include/board.h | 331 ++++++++
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boards/arm/stm32/stm32f411-minimum/src/stm32_usb.c | 340 +++++++++
.../stm32f411-minimum/src/stm32f411-minimum.h | 170 +++++
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.../stm32f0l0g0/nucleo-g070rb/scripts/Make.defs | 7 +-
.../stm32f0l0g0/nucleo-g070rb/src/stm32_buttons.c | 12 +-
.../stm32f0l0g0/nucleo-g071rb/scripts/Make.defs | 7 +-
.../stm32f0l0g0/nucleo-g071rb/src/stm32_buttons.c | 30 +-
.../stm32f0l0g0/nucleo-l073rz/scripts/Make.defs | 7 +-
.../stm32f0l0g0/nucleo-l073rz/src/stm32_buttons.c | 30 +-
.../stm32f051-discovery/scripts/Make.defs | 7 +-
.../stm32f051-discovery/src/stm32_buttons.c | 58 +-
.../stm32f051-discovery/src/stm32_userleds.c | 5 +-
.../stm32f072-discovery/scripts/Make.defs | 7 +-
.../stm32f072-discovery/src/stm32_buttons.c | 58 +-
.../stm32f072-discovery/src/stm32_userleds.c | 5 +-
.../stm32f7/nucleo-144/configs/f722-nsh/Make.defs | 7 +-
.../nucleo-144/configs/f746-evalos/Make.defs | 7 +-
.../stm32f7/nucleo-144/configs/f746-nsh/Make.defs | 7 +-
.../nucleo-144/configs/f767-evalos/Make.defs | 7 +-
.../nucleo-144/configs/f767-netnsh/Make.defs | 7 +-
.../stm32f7/nucleo-144/configs/f767-nsh/Make.defs | 7 +-
boards/arm/stm32f7/nucleo-144/src/stm32_buttons.c | 30 +-
boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c | 10 +-
boards/arm/stm32f7/stm32f746-ws/scripts/Make.defs | 7 +-
.../arm/stm32f7/stm32f746g-disco/scripts/Make.defs | 7 +-
.../stm32f7/stm32f746g-disco/src/stm32_buttons.c | 30 +-
.../stm32f7/stm32f746g-disco/src/stm32_userleds.c | 9 +-
.../arm/stm32f7/stm32f769i-disco/scripts/Make.defs | 7 +-
.../stm32f7/stm32f769i-disco/src/stm32_buttons.c | 27 +-
.../stm32f7/stm32f769i-disco/src/stm32_userleds.c | 9 +-
boards/arm/stm32h7/nucleo-h743zi/scripts/Make.defs | 7 +-
boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld | 6 +
.../stm32h7/nucleo-h743zi/scripts/kernel.space.ld | 6 +
.../arm/stm32h7/nucleo-h743zi/src/stm32_buttons.c | 6 +-
.../arm/stm32h7/nucleo-h743zi/src/stm32_userleds.c | 10 +-
.../arm/stm32h7/stm32h747i-disco/scripts/Make.defs | 7 +-
.../arm/stm32h7/stm32h747i-disco/scripts/flash.ld | 6 +
.../stm32h747i-disco/scripts/kernel.space.ld | 7 +
.../stm32h7/stm32h747i-disco/src/stm32_buttons.c | 3 +-
.../stm32h7/stm32h747i-disco/src/stm32_userleds.c | 10 +-
.../arm/stm32l4/b-l475e-iot01a/scripts/Make.defs | 7 +-
.../stm32l4/b-l475e-iot01a/src/stm32_userleds.c | 7 +-
boards/arm/stm32l4/nucleo-l432kc/scripts/Make.defs | 7 +-
.../arm/stm32l4/nucleo-l432kc/src/stm32_buttons.c | 19 +-
.../arm/stm32l4/nucleo-l432kc/src/stm32_userleds.c | 10 +-
boards/arm/stm32l4/nucleo-l452re/scripts/Make.defs | 7 +-
.../arm/stm32l4/nucleo-l452re/src/stm32_buttons.c | 30 +-
.../arm/stm32l4/nucleo-l452re/src/stm32_userleds.c | 10 +-
boards/arm/stm32l4/nucleo-l476rg/scripts/Make.defs | 49 +-
.../arm/stm32l4/nucleo-l476rg/src/stm32_buttons.c | 30 +-
.../arm/stm32l4/nucleo-l476rg/src/stm32_userleds.c | 10 +-
boards/arm/stm32l4/nucleo-l496zg/scripts/Make.defs | 7 +-
.../arm/stm32l4/nucleo-l496zg/src/stm32_buttons.c | 30 +-
.../arm/stm32l4/nucleo-l496zg/src/stm32_userleds.c | 10 +-
boards/arm/stm32l4/stm32l476-mdk/scripts/Make.defs | 7 +-
.../arm/stm32l4/stm32l476-mdk/src/stm32_buttons.c | 24 +-
.../arm/stm32l4/stm32l476-mdk/src/stm32_userleds.c | 5 +-
.../stm32l476vg-disco/configs/knsh/Make.defs | 7 +-
.../stm32l4/stm32l476vg-disco/scripts/Make.defs | 7 +-
.../stm32l4/stm32l476vg-disco/src/stm32_buttons.c | 53 +-
.../stm32l4/stm32l476vg-disco/src/stm32_userleds.c | 14 +-
.../stm32l4r9ai-disco/configs/knsh/Make.defs | 7 +-
.../stm32l4/stm32l4r9ai-disco/scripts/Make.defs | 7 +-
.../stm32l4/stm32l4r9ai-disco/src/stm32_buttons.c | 53 +-
.../stm32l4/stm32l4r9ai-disco/src/stm32_userleds.c | 13 +-
boards/arm/str71x/olimex-strp711/scripts/Make.defs | 7 +-
.../arm/str71x/olimex-strp711/src/str71_buttons.c | 4 +-
boards/arm/tiva/dk-tm4c129x/scripts/Make.defs | 7 +-
boards/arm/tiva/dk-tm4c129x/src/tm4c_buttons.c | 8 +-
boards/arm/tiva/dk-tm4c129x/src/tm4c_userleds.c | 6 +-
boards/arm/tiva/eagle100/configs/nxflat/defconfig | 1 -
boards/arm/tiva/eagle100/scripts/Make.defs | 10 +-
boards/arm/tiva/ekk-lm3s9b96/scripts/Make.defs | 7 +-
boards/arm/tiva/launchxl-cc1310/scripts/Make.defs | 7 +-
.../arm/tiva/launchxl-cc1310/src/cc1310_buttons.c | 3 +-
.../arm/tiva/launchxl-cc1310/src/cc1310_userleds.c | 5 +-
.../arm/tiva/launchxl-cc1312r1/scripts/Make.defs | 7 +-
.../tiva/launchxl-cc1312r1/src/cc1312_buttons.c | 3 +-
.../tiva/launchxl-cc1312r1/src/cc1312_userleds.c | 5 +-
boards/arm/tiva/lm3s6432-s2e/scripts/Make.defs | 7 +-
boards/arm/tiva/lm3s6965-ek/scripts/Make.defs | 7 +-
boards/arm/tiva/lm3s8962-ek/scripts/Make.defs | 7 +-
.../arm/tiva/lm4f120-launchpad/scripts/Make.defs | 7 +-
.../arm/tiva/tm4c123g-launchpad/scripts/Make.defs | 7 +-
.../arm/tiva/tm4c123g-launchpad/src/tm4c_buttons.c | 7 +-
.../arm/tiva/tm4c1294-launchpad/scripts/Make.defs | 7 +-
.../arm/tiva/tm4c1294-launchpad/src/tm4c_buttons.c | 4 +-
.../tiva/tm4c1294-launchpad/src/tm4c_userleds.c | 6 +-
.../arm/tms570/launchxl-tms57004/scripts/Make.defs | 7 +-
.../tms570/launchxl-tms57004/scripts/flash-sram.ld | 2 -
.../tms570/launchxl-tms57004/src/tms570_buttons.c | 7 +-
.../tms570/launchxl-tms57004/src/tms570_userleds.c | 5 +-
.../tms570/tms570ls31x-usb-kit/scripts/Make.defs | 7 +-
.../tms570ls31x-usb-kit/scripts/flash-sram.ld | 2 -
.../tms570ls31x-usb-kit/src/tms570_buttons.c | 7 +-
.../tms570ls31x-usb-kit/src/tms570_userleds.c | 5 +-
boards/arm/xmc4/xmc4500-relax/scripts/Make.defs | 7 +-
boards/arm/xmc4/xmc4500-relax/src/xmc4_buttons.c | 3 +-
boards/arm/xmc4/xmc4500-relax/src/xmc4_userleds.c | 5 +-
boards/arm/xmc4/xmc4700-relax/scripts/Make.defs | 7 +-
boards/arm/xmc4/xmc4700-relax/src/xmc4_buttons.c | 3 +-
boards/arm/xmc4/xmc4700-relax/src/xmc4_userleds.c | 5 +-
boards/avr/at32uc3/avr32dev1/scripts/avr32dev1.ld | 2 -
boards/avr/at32uc3/avr32dev1/src/avr32_buttons.c | 3 +-
boards/avr/at90usb/micropendous3/scripts/Make.defs | 7 +-
.../at90usb/micropendous3/scripts/micropendous3.ld | 2 -
boards/avr/at90usb/teensy-2.0/scripts/Make.defs | 7 +-
boards/avr/at90usb/teensy-2.0/scripts/flash.ld | 2 -
boards/avr/atmega/amber/scripts/Make.defs | 7 +-
boards/avr/atmega/amber/scripts/amber.ld | 2 -
.../avr/atmega/arduino-mega2560/scripts/Make.defs | 7 +-
.../avr/atmega/arduino-mega2560/scripts/flash.ld | 2 -
boards/avr/atmega/moteino-mega/scripts/Make.defs | 7 +-
boards/avr/atmega/moteino-mega/scripts/ld.script | 2 -
boards/hc/m9s12/demo9s12ne64/scripts/Make.defs | 7 +-
boards/hc/m9s12/demo9s12ne64/src/m9s12_buttons.c | 3 +-
boards/hc/m9s12/ne64badge/scripts/Make.defs | 7 +-
boards/hc/m9s12/ne64badge/src/m9s12_buttons.c | 4 +-
boards/mips/pic32mx/mirtoo/scripts/Make.defs | 7 +-
boards/mips/pic32mx/mirtoo/src/pic32_leds.c | 11 +-
.../pic32mx/pic32mx-starterkit/scripts/Make.defs | 7 +-
.../pic32mx/pic32mx-starterkit/src/pic32mx_leds.c | 5 +-
boards/mips/pic32mx/pic32mx7mmb/scripts/Make.defs | 7 +-
boards/mips/pic32mx/pic32mx7mmb/src/pic32_leds.c | 5 +-
boards/mips/pic32mx/sure-pic32mx/scripts/Make.defs | 7 +-
.../pic32mx/sure-pic32mx/src/pic32mx_buttons.c | 24 +-
boards/mips/pic32mx/ubw32/scripts/Make.defs | 7 +-
boards/mips/pic32mx/ubw32/src/pic32_buttons.c | 4 +-
boards/mips/pic32mx/ubw32/src/pic32_leds.c | 5 +-
.../pic32mz/flipnclick-pic32mz/scripts/Make.defs | 7 +-
.../flipnclick-pic32mz/src/pic32mz_buttons.c | 4 +-
.../flipnclick-pic32mz/src/pic32mz_userleds.c | 5 +-
.../pic32mz/pic32mz-starterkit/scripts/Make.defs | 7 +-
.../pic32mz-starterkit/src/pic32mz_buttons.c | 4 +-
.../pic32mz-starterkit/src/pic32mz_userleds.c | 6 +-
boards/misoc/lm32/misoc/scripts/Make.defs | 7 +-
boards/misoc/lm32/misoc/scripts/lm32.ld | 1 -
boards/misoc/lm32/misoc/scripts/minerva.ld | 2 -
boards/or1k/mor1kx/or1k/scripts/Make.defs | 7 +-
boards/renesas/m16c/skp16c26/src/m16c_buttons.c | 4 +-
.../renesas/rx65n/rx65n-grrose/scripts/Make.defs | 7 +-
.../renesas/rx65n/rx65n-rsk1mb/scripts/Make.defs | 7 +-
.../renesas/rx65n/rx65n-rsk2mb/scripts/Make.defs | 7 +-
boards/renesas/rx65n/rx65n/include/board.h | 14 +-
boards/renesas/rx65n/rx65n/scripts/Make.defs | 7 +-
boards/renesas/sh1/us7032evb1/scripts/Make.defs | 43 +-
boards/risc-v/fe310/hifive1-revb/scripts/Make.defs | 7 +-
.../risc-v/fe310/hifive1-revb/src/fe310_buttons.c | 7 +-
boards/risc-v/gap8/gapuino/scripts/Make.defs | 7 +-
boards/risc-v/k210/maix-bit/configs/elf/defconfig | 1 -
.../risc-v/k210/maix-bit/configs/module/defconfig | 1 -
.../k210/maix-bit/configs/posix_spawn/defconfig | 1 -
boards/risc-v/k210/maix-bit/include/board.h | 22 +
boards/risc-v/k210/maix-bit/scripts/Make.defs | 7 +-
boards/risc-v/k210/maix-bit/src/Makefile | 4 +
boards/risc-v/k210/maix-bit/src/k210_boot.c | 2 +
.../k210/maix-bit/src/k210_leds.c} | 44 +-
boards/risc-v/litex/arty_a7/scripts/Make.defs | 7 +-
.../nr5m100/nr5m100-nexys4/scripts/Make.defs | 7 +-
boards/sim/sim/sim/configs/module/defconfig | 1 -
boards/sim/sim/sim/scripts/gnu-elf.ld | 3 -
boards/sim/sim/sim/src/sim_touchscreen.c | 4 +-
boards/x86/qemu/qemu-i486/scripts/Make.defs | 7 +-
.../x86_64/intel64/qemu-intel64/scripts/Make.defs | 15 +-
boards/xtensa/esp32/esp32-core/scripts/Make.defs | 7 +-
boards/z80/ez80/ez80f910200zco/src/ez80_buttons.c | 4 +-
drivers/audio/Kconfig | 33 +
drivers/audio/Make.defs | 4 +
drivers/audio/audio_null.c | 4 +-
drivers/audio/{wm8776.c => cs4344.c} | 839 ++++++++++-----------
drivers/audio/cs4344.h | 98 +++
drivers/audio/cs43l22.c | 4 +-
drivers/audio/cxd56.c | 101 ++-
drivers/audio/cxd56.h | 1 +
drivers/audio/vs1053.c | 4 +-
drivers/audio/wm8776.c | 4 +-
drivers/audio/wm8904.c | 4 +-
drivers/contactless/pn532.c | 58 +-
drivers/eeprom/i2c_xx24xx.c | 2 +-
drivers/eeprom/spi_xx25xx.c | 2 +-
drivers/input/Kconfig | 9 +-
drivers/input/button_lower.c | 19 +-
drivers/leds/Kconfig | 9 +-
drivers/leds/userled_lower.c | 11 +-
drivers/modem/altair/altmdm.c | 1 +
drivers/modem/u-blox.c | 57 +-
drivers/mtd/mtd_config.c | 57 +-
drivers/net/tun.c | 2 +-
drivers/serial/pty.c | 8 +-
drivers/timers/timer.c | 36 +-
drivers/timers/watchdog.c | 5 +-
drivers/usbhost/usbhost_xboxcontroller.c | 2 +-
drivers/video/video.c | 6 +
drivers/wireless/gs2200m.c | 88 ++-
fs/fat/fs_fat32.c | 86 +--
fs/fat/fs_fat32.h | 40 +-
fs/fat/fs_fat32attrib.c | 39 +-
fs/fat/fs_fat32dirent.c | 343 +++++----
fs/fat/fs_fat32util.c | 78 +-
include/ctype.h | 37 +-
include/cxx/cwchar | 1 +
include/dsp.h | 4 -
include/elf.h | 2 +-
include/limits.h | 10 +
include/nuttx/arch.h | 4 +-
include/nuttx/audio/audio.h | 2 -
include/nuttx/audio/cs4344.h | 141 ++++
include/nuttx/board.h | 34 +-
include/nuttx/compiler.h | 16 +
include/nuttx/leds/userled.h | 14 +-
include/nuttx/sched.h | 56 +-
include/nuttx/video/video.h | 23 +-
include/stdint.h | 57 +-
include/stdio.h | 8 +-
include/stdlib.h | 66 +-
include/strings.h | 20 +-
include/threads.h | 26 +-
include/time.h | 15 +
include/wchar.h | 8 +-
libs/libc/libc.csv | 42 +-
libs/libc/machine/Kconfig | 5 +
libs/libc/stdio/Make.defs | 2 +-
libs/libc/stdio/lib_fputs.c | 10 +-
libs/libc/stdio/lib_libvscanf.c | 88 +--
libs/libc/stdio/lib_libvsprintf.c | 64 +-
libs/libc/stdio/lib_printf.c | 49 +-
libs/libc/stdio/lib_puts.c | 2 +-
.../libc/stdio/lib_tmpfile.c | 45 +-
libs/libc/stdio/lib_vprintf.c | 47 +-
.../xmc4_buttons.c => libs/libc/stdio/lib_vscanf.c | 35 +-
libs/libc/stdio/lib_vsscanf.c | 3 +-
libs/libc/stdlib/Make.defs | 3 +-
.../xmc4_buttons.c => libs/libc/stdlib/lib_mblen.c | 40 +-
.../libc/stdlib/lib_mbstowcs.c | 40 +-
libs/libc/stdlib/lib_mbtowc.c | 4 +-
libs/libc/stdlib/lib_mkstemp.c | 4 -
.../libc/stdlib/lib_wcstombs.c | 36 +-
libs/libc/time/lib_localtime.c | 4 +-
libs/libc/wchar/Make.defs | 2 +-
libs/libc/wchar/lib_mbrlen.c | 4 +-
libs/libc/wchar/lib_mbsnrtowcs.c | 21 +-
libs/libc/wchar/lib_mbsrtowcs.c | 3 +-
libs/libc/wchar/lib_wcrtomb.c | 10 +-
libs/libc/wchar/lib_wcsnrtombs.c | 49 +-
.../libc/wchar/lib_wcsrtombs.c | 39 +-
libs/libc/wchar/lib_wctob.c | 12 +-
net/inet/inet_sockif.c | 21 +-
sched/pthread/pthread_create.c | 5 +-
sched/task/exit.c | 16 +
sched/task/task_activate.c | 5 +-
sched/task/task_atexit.c | 39 +-
sched/task/task_create.c | 7 +-
sched/task/task_exit.c | 6 +-
sched/task/task_exithook.c | 54 +-
sched/task/task_onexit.c | 33 +-
sched/task/task_restart.c | 12 +-
sched/task/task_spawn.c | 17 +-
sched/task/task_vfork.c | 8 +-
tools/Makefile.host | 4 +-
tools/Makefile.unix | 11 +-
tools/Makefile.win | 13 +-
tools/checkpatch.sh | 2 +-
tools/incdir.c | 8 +-
tools/mkdeps.c | 96 ++-
721 files changed, 7952 insertions(+), 5066 deletions(-)
create mode 100644 .github/gcc.json
create mode 100644 .github/nxstyle.json
copy arch/risc-v/src/k210/{hardware/k210_memorymap.h => k210_fpioa.c} (62%)
create mode 100644 arch/risc-v/src/k210/k210_fpioa.h
copy boards/arm/xmc4/xmc4700-relax/src/xmc4_userleds.c => arch/risc-v/src/k210/k210_gpiohs.c (54%)
copy boards/arm/xmc4/xmc4700-relax/src/xmc4_userleds.c => arch/risc-v/src/k210/k210_gpiohs.h (63%)
copy boards/arm/stm32/olimex-stm32-p407/configs/{module => audio}/defconfig (59%)
create mode 100644 boards/arm/stm32/olimex-stm32-p407/src/stm32_cs4344.c
create mode 100644 boards/arm/stm32/stm32f411-minimum/Kconfig
create mode 100644 boards/arm/stm32/stm32f411-minimum/README.txt
copy boards/arm/stm32/{stm32f4discovery/configs/module => stm32f411-minimum/configs/nsh}/defconfig (61%)
create mode 100644 boards/arm/stm32/stm32f411-minimum/include/board.h
copy boards/arm/stm32/{nucleo-f429zi => stm32f411-minimum}/scripts/Make.defs (89%)
create mode 100644 boards/arm/stm32/stm32f411-minimum/scripts/stm32f411ce.ld
copy {libs/libc/stdlib => boards/arm/stm32/stm32f411-minimum/src}/Make.defs (58%)
copy sched/task/task_activate.c => boards/arm/stm32/stm32f411-minimum/src/stm32_appinit.c (53%)
copy boards/arm/{xmc4/xmc4700-relax/src/xmc4_userleds.c => stm32/stm32f411-minimum/src/stm32_autoleds.c} (58%)
create mode 100644 boards/arm/stm32/stm32f411-minimum/src/stm32_boot.c
copy sched/task/task_activate.c => boards/arm/stm32/stm32f411-minimum/src/stm32_bringup.c (59%)
create mode 100644 boards/arm/stm32/stm32f411-minimum/src/stm32_usb.c
create mode 100644 boards/arm/stm32/stm32f411-minimum/src/stm32f411-minimum.h
copy boards/{arm/xmc4/xmc4700-relax/src/xmc4_buttons.c => risc-v/k210/maix-bit/src/k210_leds.c} (59%)
copy drivers/audio/{wm8776.c => cs4344.c} (59%)
create mode 100644 drivers/audio/cs4344.h
create mode 100644 include/nuttx/audio/cs4344.h
copy arch/risc-v/src/k210/hardware/k210_memorymap.h => libs/libc/stdio/lib_tmpfile.c (62%)
copy boards/arm/xmc4/xmc4700-relax/src/xmc4_buttons.c => libs/libc/stdio/lib_vscanf.c (63%)
copy boards/arm/xmc4/xmc4700-relax/src/xmc4_buttons.c => libs/libc/stdlib/lib_mblen.c (63%)
copy boards/arm/xmc4/xmc4700-relax/src/xmc4_buttons.c => libs/libc/stdlib/lib_mbstowcs.c (63%)
copy boards/arm/xmc4/xmc4700-relax/src/xmc4_buttons.c => libs/libc/stdlib/lib_wcstombs.c (63%)
copy boards/arm/xmc4/xmc4700-relax/src/xmc4_buttons.c => libs/libc/wchar/lib_wcsrtombs.c (63%)
[incubator-nuttx] 09/11: pcie: make pcie enumerate routine as
common instead of architecture dependent
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 8cd64f6717523b5d7393d43f2217ecc7bcff152d
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 20:28:41 2020 +0900
pcie: make pcie enumerate routine as common instead of architecture dependent
---
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c | 82 -------------------
drivers/pcie/Kconfig | 11 ++-
drivers/pcie/pcie_root.c | 92 +++++++++++++++++++++-
3 files changed, 101 insertions(+), 84 deletions(-)
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
index 5670fdd..f23bec9 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
@@ -74,15 +74,10 @@
* Pre-processor Definitions
****************************************************************************/
-#define QEMU_PCIE_MAX_BDF 0x10000
-
/****************************************************************************
* Private Functions Definitions
****************************************************************************/
-static int qemu_pci_enumerate(FAR struct pcie_bus_s *bus,
- FAR struct pcie_dev_type_s **types);
-
static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr,
FAR const void *buffer, unsigned int size);
@@ -107,7 +102,6 @@ static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev,
struct pcie_bus_ops_s qemu_pcie_bus_ops =
{
- .pcie_enumerate = qemu_pci_enumerate,
.pci_cfg_write = qemu_pci_cfg_write,
.pci_cfg_read = qemu_pci_cfg_read,
.pci_map_bar = qemu_pci_map_bar,
@@ -126,82 +120,6 @@ struct pcie_bus_s qemu_pcie_bus =
****************************************************************************/
/****************************************************************************
- * Name: qemu_pci_enumerate
- *
- * Description:
- * Scan the PCI bus and enumerate the devices.
- * Initialize any recognized devices, given in types.
- *
- * Input Parameters:
- * bus - PCI-E bus structure
- * type - List of pointers to devices types recognized, NULL terminated
- *
- * Returned Value:
- * 0: success, <0: A negated errno
- *
- ****************************************************************************/
-
-static int qemu_pci_enumerate(FAR struct pcie_bus_s *bus,
- FAR struct pcie_dev_type_s **types)
-{
- unsigned int bdf;
- uint16_t vid;
- uint16_t id;
- uint16_t rev;
-
- if (!bus)
- return -EINVAL;
- if (!types)
- return -EINVAL;
-
- for (bdf = 0; bdf < QEMU_PCIE_MAX_BDF; bdf++)
- {
- __qemu_pci_cfg_read(bdf, PCI_CFG_VENDOR_ID, &vid, 2);
- __qemu_pci_cfg_read(bdf, PCI_CFG_DEVICE_ID, &id, 2);
- __qemu_pci_cfg_read(bdf, PCI_CFG_REVERSION, &rev, 2);
-
- if (vid == PCI_ID_ANY)
- continue;
-
- pciinfo("[%02x:%02x.%x] Found %04x:%04x, class/reversion %08x\n",
- bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3,
- vid, id, rev);
-
- for (int i = 0; types[i] != NULL; i++)
- {
- if (types[i]->vendor == PCI_ID_ANY ||
- types[i]->vendor == vid)
- {
- if (types[i]->device == PCI_ID_ANY ||
- types[i]->device == id)
- {
- if (types[i]->class_rev == PCI_ID_ANY ||
- types[i]->class_rev == rev)
- {
- if (types[i]->probe)
- {
- pciinfo("[%02x:%02x.%x] %s\n",
- bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3,
- types[i]->name);
- types[i]->probe(bus, types[i], bdf);
- }
- else
- {
- pcierr("[%02x:%02x.%x] Error: Invalid \
- device probe function\n",
- bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3);
- }
- break;
- }
- }
- }
- }
- }
-
- return OK;
-}
-
-/****************************************************************************
* Name: qemu_pci_cfg_write
*
* Description:
diff --git a/drivers/pcie/Kconfig b/drivers/pcie/Kconfig
index d4138ff..7ac9db5 100644
--- a/drivers/pcie/Kconfig
+++ b/drivers/pcie/Kconfig
@@ -3,9 +3,18 @@
# see the file kconfig-language.txt in the NuttX tools repository.
#
-config PCIE
+menuconfig PCIE
bool "Support for PCI-E Bus"
default n
---help---
Enables support for the PCI-E bus.
Backend bust be provided by per-arch or per-board implementation..
+
+if PCIE
+config PCIE_MAX_BDF
+ hex "Maximum bdf to scan on PCI-E bus"
+ default 0x10000
+ ---help---
+ The maximum bdf number to be scaned on PCI-E bus
+
+endif
diff --git a/drivers/pcie/pcie_root.c b/drivers/pcie/pcie_root.c
index 362e677..2b420e1 100644
--- a/drivers/pcie/pcie_root.c
+++ b/drivers/pcie/pcie_root.c
@@ -52,6 +52,96 @@ struct pcie_dev_type_s *pci_device_types[] =
****************************************************************************/
/****************************************************************************
+ * Name: pci_enumerate
+ *
+ * Description:
+ * Scan the PCI bus and enumerate the devices.
+ * Initialize any recognized devices, given in types.
+ *
+ * Input Parameters:
+ * bus - PCI-E bus structure
+ * type - List of pointers to devices types recognized, NULL terminated
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_enumerate(FAR struct pcie_bus_s *bus,
+ FAR struct pcie_dev_type_s **types)
+{
+ unsigned int bdf;
+ uint16_t vid;
+ uint16_t id;
+ uint16_t rev;
+ struct pcie_dev_s tmp_dev;
+ struct pcie_dev_type_s tmp_type =
+ {
+ .name = "Unknown",
+ .vendor = PCI_ID_ANY,
+ .device = PCI_ID_ANY,
+ .class_rev = PCI_ID_ANY,
+ .probe = NULL,
+ };
+
+ if (!bus)
+ return -EINVAL;
+ if (!types)
+ return -EINVAL;
+
+ for (bdf = 0; bdf < CONFIG_PCIE_MAX_BDF; bdf++)
+ {
+ tmp_dev.bus = bus;
+ tmp_dev.type = &tmp_type;
+ tmp_dev.bdf = bdf;
+
+ bus->ops->pci_cfg_read(&tmp_dev, PCI_CFG_VENDOR_ID, &vid, 2);
+ bus->ops->pci_cfg_read(&tmp_dev, PCI_CFG_DEVICE_ID, &id, 2);
+ bus->ops->pci_cfg_read(&tmp_dev, PCI_CFG_REVERSION, &rev, 2);
+
+ if (vid == PCI_ID_ANY)
+ continue;
+
+ pciinfo("[%02x:%02x.%x] Found %04x:%04x, class/reversion %08x\n",
+ bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3,
+ vid, id, rev);
+
+ for (int i = 0; types[i] != NULL; i++)
+ {
+ if (types[i]->vendor == PCI_ID_ANY ||
+ types[i]->vendor == vid)
+ {
+ if (types[i]->device == PCI_ID_ANY ||
+ types[i]->device == id)
+ {
+ if (types[i]->class_rev == PCI_ID_ANY ||
+ types[i]->class_rev == rev)
+ {
+ if (types[i]->probe)
+ {
+ pciinfo("[%02x:%02x.%x] %s\n",
+ bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3,
+ types[i]->name);
+ types[i]->probe(bus, types[i], bdf);
+ }
+ else
+ {
+ pcierr("[%02x:%02x.%x] Error: Invalid \
+ device probe function\n",
+ bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3);
+ }
+ break;
+ }
+ }
+ }
+ }
+ }
+
+ return OK;
+}
+
+
+/****************************************************************************
* Name: pcie_initialize
*
* Description:
@@ -71,7 +161,7 @@ struct pcie_dev_type_s *pci_device_types[] =
int pcie_initialize(FAR struct pcie_bus_s *bus)
{
- return bus->ops->pcie_enumerate(bus, pci_device_types);
+ return pci_enumerate(bus, pci_device_types);
}
/****************************************************************************
[incubator-nuttx] 08/11: pcie: qemu: return -EINVAL if buffer
argument is NULL
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 370d0fe744d9eb44e27aa16da1aff8e004bc2778
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 20:09:07 2020 +0900
pcie: qemu: return -EINVAL if buffer argument is NULL
---
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c | 6 ++++++
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h | 12 ++++++++++++
2 files changed, 18 insertions(+)
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
index 1308e22..5670fdd 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
@@ -221,6 +221,9 @@ static int qemu_pci_enumerate(FAR struct pcie_bus_s *bus,
static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr,
FAR const void *buffer, unsigned int size)
{
+ if(!buffer)
+ return -EINVAL;
+
switch (size)
{
case 1:
@@ -254,6 +257,9 @@ static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr,
static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr,
FAR void *buffer, unsigned int size)
{
+ if(!buffer)
+ return -EINVAL;
+
switch (size)
{
case 1:
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
index 2e0c392..0665d83 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
@@ -107,6 +107,9 @@ static inline int __qemu_pci_cfg_write(uint16_t bfd, uintptr_t addr,
FAR const void *buffer,
unsigned int size)
{
+ if(!buffer)
+ return -EINVAL;
+
outl(PCI_CONE | ((uint32_t)bfd << 8) | (addr & 0xfc), PCI_REG_ADDR_PORT);
switch (size)
@@ -149,6 +152,9 @@ static inline int __qemu_pci_cfg_write64(uint16_t bfd, uintptr_t addr,
{
int ret;
+ if(!buffer)
+ return -EINVAL;
+
ret = __qemu_pci_cfg_write(bfd, addr + 4, buffer + 4, 4);
ret |= __qemu_pci_cfg_write(bfd, addr, buffer, 4);
@@ -175,6 +181,9 @@ static inline int __qemu_pci_cfg_write64(uint16_t bfd, uintptr_t addr,
static inline int __qemu_pci_cfg_read(uint16_t bfd, uintptr_t addr,
FAR void *buffer, unsigned int size)
{
+ if(!buffer)
+ return -EINVAL;
+
outl(PCI_CONE | ((uint32_t)bfd << 8) | (addr & 0xfc), PCI_REG_ADDR_PORT);
switch (size)
@@ -219,6 +228,9 @@ static inline int __qemu_pci_cfg_read64(uint16_t bfd,
{
int ret;
+ if(!buffer)
+ return -EINVAL;
+
ret = __qemu_pci_cfg_read(bfd, addr + 4, buffer + 4, 4);
ret |= __qemu_pci_cfg_read(bfd, addr, buffer, 4);
[incubator-nuttx] 03/11: virt: add qemu pci-testdev driver
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit d71478288b7add67f27bbbe9b96186ca60171e3f
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 01:02:38 2020 +0900
virt: add qemu pci-testdev driver
---
drivers/Kconfig | 1 +
drivers/Makefile | 1 +
drivers/pcie/pcie_root.c | 5 +-
drivers/virt/Kconfig | 22 +++++++
drivers/virt/Make.defs | 37 ++++++++++++
drivers/virt/qemu_pci_test.c | 130 ++++++++++++++++++++++++++++++++++++++++++
include/nuttx/virt/qemu_pci.h | 53 +++++++++++++++++
7 files changed, 248 insertions(+), 1 deletion(-)
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 513d3ea..aa11b3c 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -108,3 +108,4 @@ source drivers/syslog/Kconfig
source drivers/platform/Kconfig
source drivers/rf/Kconfig
source drivers/pcie/Kconfig
+source drivers/virt/Kconfig
diff --git a/drivers/Makefile b/drivers/Makefile
index fb143df..57515f5 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -74,6 +74,7 @@ include contactless/Make.defs
include 1wire/Make.defs
include rf/Make.defs
include pcie/Make.defs
+include virt/Make.defs
ifeq ($(CONFIG_SPECIFIC_DRIVERS),y)
include platform/Make.defs
diff --git a/drivers/pcie/pcie_root.c b/drivers/pcie/pcie_root.c
index 8764492..1fe2181 100644
--- a/drivers/pcie/pcie_root.c
+++ b/drivers/pcie/pcie_root.c
@@ -29,6 +29,7 @@
#include <debug.h>
#include <nuttx/pcie/pcie.h>
+#include <nuttx/virt/qemu_pci.h>
/****************************************************************************
* Pre-processor Definitions
@@ -40,7 +41,9 @@
struct pcie_dev_type_s *pci_device_types[] =
{
- NULL,
+#ifdef CONFIG_VIRT_QEMU_PCI_TEST
+ &pcie_type_qemu_pci_test,
+#endif /* CONFIG_VIRT_QEMU_PCI_TEST */
};
/****************************************************************************
diff --git a/drivers/virt/Kconfig b/drivers/virt/Kconfig
new file mode 100644
index 0000000..bf8fb85
--- /dev/null
+++ b/drivers/virt/Kconfig
@@ -0,0 +1,22 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+#
+#
+menuconfig VIRT
+ bool "Virtualization"
+ default n
+ ---help---
+ Drivers for virtualized and emulated devices
+
+if VIRT
+
+config VIRT_QEMU_PCI_TEST
+ bool "Driver for QEMU PCI test device"
+ default n
+ select PCIE
+ ---help---
+ Driver for QEMU PCI test device
+
+endif # VIRT
diff --git a/drivers/virt/Make.defs b/drivers/virt/Make.defs
new file mode 100644
index 0000000..8ccfbe0
--- /dev/null
+++ b/drivers/virt/Make.defs
@@ -0,0 +1,37 @@
+############################################################################
+# drivers/pcie/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+# Don't build anything if there is no CAN support
+
+ifeq ($(CONFIG_VIRT_QEMU_PCI_TEST),y)
+
+CSRCS += qemu_pci_test.c
+
+endif
+
+# Include virt device driver build support
+#
+ifeq ($(CONFIG_VIRT),y)
+
+DEPPATH += --dep-path virt
+VPATH += :virt
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)virt}
+
+endif
diff --git a/drivers/virt/qemu_pci_test.c b/drivers/virt/qemu_pci_test.c
new file mode 100644
index 0000000..ff1af63
--- /dev/null
+++ b/drivers/virt/qemu_pci_test.c
@@ -0,0 +1,130 @@
+/*****************************************************************************
+ * drivers/virt/qemu_pci_test.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ *****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/arch.h>
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <math.h>
+#include <unistd.h>
+#include <errno.h>
+#include <sched.h>
+
+#include <nuttx/pcie/pcie.h>
+#include <nuttx/virt/qemu_pci.h>
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Private Types
+ *****************************************************************************/
+
+struct pci_test_dev_hdr_s
+{
+ volatile uint8_t test; /* write-only, starts a given test number */
+ volatile uint8_t width_type; /* read-only, type and width of access for a given test.
+ * 1,2,4 for byte,word or long write.
+ * any other value if test not supported on this BAR */
+ volatile uint8_t pad0[2];
+ volatile uint32_t offset; /* read-only, offset in this BAR for a given test */
+ volatile uint32_t data; /* read-only, data to use for a given test */
+ volatile uint32_t count; /* for debugging. number of writes detected. */
+ volatile uint8_t name[]; /* for debugging. 0-terminated ASCII string. */
+};
+
+/*****************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Name: qemu_pci_test_probe
+ *
+ * Description:
+ * Initialize device
+ *****************************************************************************/
+
+int qemu_pci_test_probe(FAR struct pcie_bus_s *bus,
+ FAR struct pcie_dev_type_s *type, uint16_t bdf)
+{
+ uint32_t bar[2];
+ struct pcie_dev_s dev =
+ {
+ .bus = bus,
+ .type = type,
+ .bdf = bdf,
+ };
+
+ pci_enable_device(&dev, (PCI_CMD_MASTER | PCI_CMD_MEM));
+
+ for (int ii = 0; ii < 2; ii++)
+ {
+ pci_get_bar(&dev, ii, bar + ii);
+
+ if ((bar[ii] & PCI_BAR_IO) != PCI_BAR_IO)
+ {
+ pciinfo("Mapping BAR%d: %x\n", ii, bar[ii]);
+
+ pci_map_bar(&dev, ii, 0x1000, NULL);
+
+ struct pci_test_dev_hdr_s *ptr =
+ (struct pci_test_dev_hdr_s *)(uintptr_t)bar[ii];
+
+ int i = 0;
+ while (1)
+ {
+ ptr->test = i;
+
+ if (ptr->width_type != 1 &&
+ ptr->width_type != 2 &&
+ ptr->width_type != 4)
+ break;
+
+ pciinfo("Test[%d] Size:%d %s\n",
+ i, ptr->width_type,
+ ptr->name);
+
+ i++;
+ }
+ }
+ }
+
+ return OK;
+}
+
+/*****************************************************************************
+ * Public Data
+ *****************************************************************************/
+
+struct pcie_dev_type_s pcie_type_qemu_pci_test =
+{
+ .vendor = 0x1b36,
+ .device = 0x0005,
+ .class_rev = PCI_ID_ANY,
+ .name = "Qemu PCI test device",
+ .probe = qemu_pci_test_probe
+};
diff --git a/include/nuttx/virt/qemu_pci.h b/include/nuttx/virt/qemu_pci.h
new file mode 100644
index 0000000..f8e38f9
--- /dev/null
+++ b/include/nuttx/virt/qemu_pci.h
@@ -0,0 +1,53 @@
+/****************************************************************************
+ * include/nuttx/serial/uart_mcs99xx.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_VIRT_QEMU_PCI_TEST_H
+#define __INCLUDE_NUTTX_VIRT_QEMU_PCI_TEST_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#ifdef CONFIG_VIRT_QEMU_PCI_TEST
+extern struct pcie_dev_type_s pcie_type_qemu_pci_test;
+#endif /* CONFIG_VIRT_QEMU_PCI_TEST */
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_VIRT_QEMU_PCI_TEST_H */
[incubator-nuttx] 04/11: pcie: types array should be null terminated
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 669be1fe2e14be6fd49547e1f68102e08b309391
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 15:07:41 2020 +0900
pcie: types array should be null terminated
---
drivers/pcie/pcie_root.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pcie/pcie_root.c b/drivers/pcie/pcie_root.c
index 1fe2181..c5ee688 100644
--- a/drivers/pcie/pcie_root.c
+++ b/drivers/pcie/pcie_root.c
@@ -44,6 +44,7 @@ struct pcie_dev_type_s *pci_device_types[] =
#ifdef CONFIG_VIRT_QEMU_PCI_TEST
&pcie_type_qemu_pci_test,
#endif /* CONFIG_VIRT_QEMU_PCI_TEST */
+ NULL,
};
/****************************************************************************
[incubator-nuttx] 01/11: pcie: add framework
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit a9f98b88072794610f13dc0326de562bbb923ff9
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Mon May 4 18:44:11 2020 +0900
pcie: add framework
---
Kconfig | 35 +++++
drivers/Kconfig | 1 +
drivers/Makefile | 1 +
drivers/pcie/Kconfig | 11 ++
drivers/pcie/Make.defs | 32 +++++
drivers/pcie/pcie_root.c | 354 ++++++++++++++++++++++++++++++++++++++++++++++
include/debug.h | 18 +++
include/nuttx/pcie/pcie.h | 324 ++++++++++++++++++++++++++++++++++++++++++
8 files changed, 776 insertions(+)
diff --git a/Kconfig b/Kconfig
index 85ee240..008eaee 100644
--- a/Kconfig
+++ b/Kconfig
@@ -1669,6 +1669,41 @@ config DEBUG_WATCHDOG_INFO
Enable watchdog time informational output to SYSLOG.
endif # DEBUG_WATCHDOG
+
+config DEBUG_PCIE
+ bool "PCI-E Debug Features"
+ default n
+ depends on PCIE
+ ---help---
+ Enable PCIE driver debug features.
+
+ Support for this debug option is architecture-specific and may not
+ be available for some MCUs.
+
+if DEBUG_PCIE
+
+config DEBUG_PCIE_ERROR
+ bool "PCI-E Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable PCI-E driver error output to SYSLOG.
+
+config DEBUG_PCIE_WARN
+ bool "PCI-E Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable PCI-E driver warning output to SYSLOG.
+
+config DEBUG_PCIE_INFO
+ bool "PCI-E Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable PCI-E driver informational output to SYSLOG.
+
+endif # DEBUG_PCIE
endif # DEBUG_FEATURES
config ARCH_HAVE_STACKCHECK
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 5220a94..513d3ea 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -107,3 +107,4 @@ source drivers/1wire/Kconfig
source drivers/syslog/Kconfig
source drivers/platform/Kconfig
source drivers/rf/Kconfig
+source drivers/pcie/Kconfig
diff --git a/drivers/Makefile b/drivers/Makefile
index 8bd419b..fb143df 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -73,6 +73,7 @@ include wireless/Make.defs
include contactless/Make.defs
include 1wire/Make.defs
include rf/Make.defs
+include pcie/Make.defs
ifeq ($(CONFIG_SPECIFIC_DRIVERS),y)
include platform/Make.defs
diff --git a/drivers/pcie/Kconfig b/drivers/pcie/Kconfig
new file mode 100644
index 0000000..d4138ff
--- /dev/null
+++ b/drivers/pcie/Kconfig
@@ -0,0 +1,11 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config PCIE
+ bool "Support for PCI-E Bus"
+ default n
+ ---help---
+ Enables support for the PCI-E bus.
+ Backend bust be provided by per-arch or per-board implementation..
diff --git a/drivers/pcie/Make.defs b/drivers/pcie/Make.defs
new file mode 100644
index 0000000..68efee8
--- /dev/null
+++ b/drivers/pcie/Make.defs
@@ -0,0 +1,32 @@
+############################################################################
+# drivers/pcie/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+# Don't build anything if there is no CAN support
+
+ifeq ($(CONFIG_PCIE),y)
+
+CSRCS += pcie_root.c
+
+# Include PCIE device driver build support
+
+DEPPATH += --dep-path pcie
+VPATH += :pcie
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)pcie}
+endif
diff --git a/drivers/pcie/pcie_root.c b/drivers/pcie/pcie_root.c
new file mode 100644
index 0000000..8764492
--- /dev/null
+++ b/drivers/pcie/pcie_root.c
@@ -0,0 +1,354 @@
+/****************************************************************************
+ * nuttx/drivers/pcie/pcie_root.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <assert.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/pcie/pcie.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+struct pcie_dev_type_s *pci_device_types[] =
+{
+ NULL,
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pcie_initialize
+ *
+ * Description:
+ * Initialize the PCI-E bus and enumerate the devices with give devices
+ * type array
+ *
+ * Input Parameters:
+ * bus - An PCIE bus
+ * types - A array of PCIE device types
+ * num - Number of device types
+ *
+ * Returned Value:
+ * OK if the driver was successfully register; A negated errno value is
+ * returned on any failure.
+ *
+ ****************************************************************************/
+
+int pcie_initialize(FAR struct pcie_bus_s *bus)
+{
+ return bus->ops->pcie_enumerate(bus, pci_device_types);
+}
+
+/****************************************************************************
+ * Name: pci_enable_device
+ *
+ * Description:
+ * Enable device with flags
+ *
+ * Input Parameters:
+ * bdf - device BDF
+ * flags - device ability to be enabled
+ *
+ * Return value:
+ * -EINVAL: error
+ * OK: OK
+ *
+ ****************************************************************************/
+
+int pci_enable_device(FAR struct pcie_dev_s *dev, uint32_t flags)
+{
+ uint16_t old_cmd;
+ uint16_t cmd;
+
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_COMMAND, &old_cmd, 2);
+
+ cmd = old_cmd | flags;
+
+ dev->bus->ops->pci_cfg_write(dev, PCI_CFG_COMMAND, &cmd, 2);
+
+ pciinfo("%02x:%02x.%x, CMD: %x -> %x\n",
+ dev->bdf >> 8, (dev->bdf >> 3) & 0x1f, dev->bdf & 0x3,
+ old_cmd, cmd);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pci_find_cap
+ *
+ * Description:
+ * Search through the PCI-e device capability list to find given capability.
+ *
+ * Input Parameters:
+ * dev - Device
+ * cap - Bitmask of capability
+ *
+ * Returned Value:
+ * -1: Capability not supported
+ * other: the offset in PCI configuration space to the capability structure
+ *
+ ****************************************************************************/
+
+int pci_find_cap(FAR struct pcie_dev_s *dev, uint16_t cap)
+{
+ uint8_t pos = PCI_CFG_CAP_PTR - 1;
+ uint16_t status;
+ uint8_t rcap;
+
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_STATUS, &status, 2);
+
+ if (!(status & PCI_STS_CAPS))
+ return -EINVAL;
+
+ while (1)
+ {
+ dev->bus->ops->pci_cfg_read(dev, pos + 1, &pos, 1);
+ if (pos == 0)
+ return -EINVAL;
+
+ dev->bus->ops->pci_cfg_read(dev, pos, &rcap, 1);
+
+ if (rcap == cap)
+ return pos;
+ }
+}
+
+/****************************************************************************
+ * Name: pci_get_bar
+ *
+ * Description:
+ * Get a 32 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * ret - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_get_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint32_t *ret)
+{
+ if (bar > 5)
+ return -EINVAL;
+
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_BAR + bar * 4, ret, 4);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pci_get_bar64
+ *
+ * Description:
+ * Get a 64 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * ret - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_get_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint64_t *ret)
+{
+ if (bar > 5 || ((bar % 2) != 0))
+ return -EINVAL;
+
+ uint32_t barmem1;
+ uint32_t barmem2;
+
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_BAR + bar * 4, &barmem1, 4);
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_BAR + bar * 4 + 4, &barmem2, 4);
+
+ *ret = ((uint64_t)barmem2 << 32) | barmem1;
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pci_set_bar
+ *
+ * Description:
+ * Set a 32 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * val - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_set_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint32_t val)
+{
+ if (bar > 5)
+ return -EINVAL;
+
+ dev->bus->ops->pci_cfg_write(dev, PCI_CFG_BAR + bar * 4, &val, 4);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pci_set_bar64
+ *
+ * Description:
+ * Set a 64 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * val - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_set_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint64_t val)
+{
+ if (bar > 5 || ((bar % 2) != 0))
+ return -EINVAL;
+
+ uint32_t barmem1 = (uint32_t)val;
+ uint32_t barmem2 = (uint32_t)(val >> 32);
+
+ dev->bus->ops->pci_cfg_write(dev, PCI_CFG_BAR + bar * 4, &barmem1, 4);
+ dev->bus->ops->pci_cfg_write(dev, PCI_CFG_BAR + bar * 4 + 4, &barmem2, 4);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pci_map_bar
+ *
+ * Description:
+ * Map address in a 32 bits bar in the flat memory address space
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * length - Map length, multiple of PAGE_SIZE
+ * ret - Bar Content if not NULL
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
+ unsigned long length, uint32_t *ret)
+{
+ if (bar > 5)
+ return -EINVAL;
+
+ uint32_t barmem;
+
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_BAR + bar * 4, &barmem, 4);
+
+ if (((bar % 2) == 0 &&
+ (barmem & PCI_BAR_64BIT) == PCI_BAR_64BIT) ||
+ (barmem & PCI_BAR_IO) == PCI_BAR_IO)
+ return -EINVAL;
+
+ if (!dev->bus->ops->pci_map_bar)
+ return -EINVAL;
+
+ dev->bus->ops->pci_map_bar(dev, barmem, length);
+
+ if (ret)
+ *ret = barmem;
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pci_map_bar64
+ *
+ * Description:
+ * Map address in a 64 bits bar in the flat memory address space
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * length - Map length, multiple of PAGE_SIZE
+ * ret - Bar Content if not NULL
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_map_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
+ unsigned long length, uint64_t *ret)
+{
+ if (bar > 5 || ((bar % 2) != 0))
+ return -EINVAL;
+
+ uint32_t barmem1;
+ uint32_t barmem2;
+ uint64_t barmem;
+
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_BAR + bar * 4, &barmem1, 4);
+
+ if ((barmem1 & PCI_BAR_64BIT) != PCI_BAR_64BIT ||
+ (barmem1 & PCI_BAR_IO) == PCI_BAR_IO)
+ return -EINVAL;
+
+ dev->bus->ops->pci_cfg_read(dev, PCI_CFG_BAR + bar * 4 + 4, &barmem2, 4);
+
+ barmem = ((uint64_t)barmem2 << 32) | barmem1;
+
+ if (!dev->bus->ops->pci_map_bar64)
+ return -EINVAL;
+
+ dev->bus->ops->pci_map_bar64(dev, barmem, length);
+
+ if (ret)
+ *ret = barmem;
+
+ return OK;
+}
diff --git a/include/debug.h b/include/debug.h
index f4bc4d3..07a83b2 100644
--- a/include/debug.h
+++ b/include/debug.h
@@ -721,6 +721,24 @@
# define wdinfo _none
#endif
+#ifdef CONFIG_DEBUG_PCIE_ERROR
+# define pcierr _err
+#else
+# define pcierr _none
+#endif
+
+#ifdef CONFIG_DEBUG_PCIE_WARN
+# define pciwarn _warn
+#else
+# define pciwarn _none
+#endif
+
+#ifdef CONFIG_DEBUG_PCIE_INFO
+# define pciinfo _info
+#else
+# define pciinfo _none
+#endif
+
/* Buffer dumping macros do not depend on varargs */
#ifdef CONFIG_DEBUG_ERROR
diff --git a/include/nuttx/pcie/pcie.h b/include/nuttx/pcie/pcie.h
new file mode 100644
index 0000000..62adbb7
--- /dev/null
+++ b/include/nuttx/pcie/pcie.h
@@ -0,0 +1,324 @@
+/****************************************************************************
+ * include/nuttx/pcie/pcie.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_PCIE_PCIE_H
+#define __INCLUDE_NUTTX_PCIE_PCIE_H
+
+#ifdef CONFIG_PCIE
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+
+#include <nuttx/fs/ioctl.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PCI_CFG_VENDOR_ID 0x000
+#define PCI_CFG_DEVICE_ID 0x002
+#define PCI_CFG_COMMAND 0x004
+# define PCI_CMD_IO (1 << 0)
+# define PCI_CMD_MEM (1 << 1)
+# define PCI_CMD_MASTER (1 << 2)
+# define PCI_CMD_INTX_OFF (1 << 10)
+#define PCI_CFG_STATUS 0x006
+# define PCI_STS_INT (1 << 3)
+# define PCI_STS_CAPS (1 << 4)
+#define PCI_CFG_REVERSION 0x008
+#define PCI_CFG_BAR 0x010
+# define PCI_BAR_IO 0x1
+# define PCI_BAR_1M 0x2
+# define PCI_BAR_64BIT 0x4
+#define PCI_CFG_CAP_PTR 0x034
+
+#define PCI_ID_ANY 0xffff
+#define PCI_DEV_CLASS_OTHER 0xff
+
+#define PCI_CAP_PM 0x01
+#define PCI_CAP_MSI 0x05
+#define PCI_CAP_MSIX 0x11
+# define MSIX_CTRL_ENABLE 0x8000
+# define MSIX_CTRL_FMASK 0x4000
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* The PCIE driver interface */
+
+struct pcie_bus_s;
+struct pcie_dev_type_s;
+struct pcie_dev_s;
+
+/* Bus related operations */
+
+struct pcie_bus_ops_s
+{
+ CODE int (*pcie_enumerate)(FAR struct pcie_bus_s *bus,
+ FAR struct pcie_dev_type_s **types);
+
+ CODE int (*pci_cfg_write)(FAR struct pcie_dev_s *dev, uintptr_t addr,
+ FAR const void *buffer, unsigned int size);
+
+ CODE int (*pci_cfg_read)(FAR struct pcie_dev_s *dev, uintptr_t addr,
+ FAR void *buffer, unsigned int size);
+
+ CODE int (*pci_map_bar)(FAR struct pcie_dev_s *dev, uint32_t addr,
+ unsigned long length);
+
+ CODE int (*pci_map_bar64)(FAR struct pcie_dev_s *dev, uint64_t addr,
+ unsigned long length);
+
+ CODE int (*pci_msi_register)(FAR struct pcie_dev_s *dev,
+ uint16_t vector);
+
+ CODE int (*pci_msix_register)(FAR struct pcie_dev_s *dev,
+ uint32_t vector, uint32_t index);
+};
+
+/* PCIE bus private data. */
+
+struct pcie_bus_s
+{
+ FAR const struct pcie_bus_ops_s *ops; /* operations */
+};
+
+/* PCIE device type, defines by vendor ID and device ID */
+
+struct pcie_dev_type_s
+{
+ uint16_t vendor; /* Device vendor ID */
+ uint16_t device; /* Device ID */
+ uint32_t class_rev; /* Device reversion */
+ const char *name; /* Human readable name */
+
+ /* Call back function when a device is probed */
+
+ CODE int (*probe)(FAR struct pcie_bus_s *bus,
+ FAR struct pcie_dev_type_s *type, uint16_t bdf);
+};
+
+/* PCIE device private data. */
+
+struct pcie_dev_s
+{
+ FAR struct pcie_bus_s *bus;
+ FAR struct pcie_dev_type_s *type;
+ uint16_t bdf;
+};
+
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: pcie_initialize
+ *
+ * Description:
+ * Initialize the PCI-E bus and enumerate the devices with give devices
+ * type array
+ *
+ * Input Parameters:
+ * bus - An PCIE bus
+ * types - A array of PCIE device types
+ * num - Number of device types
+ *
+ * Returned Value:
+ * OK if the driver was successfully register; A negated errno value is
+ * returned on any failure.
+ *
+ ****************************************************************************/
+
+int pcie_initialize(FAR struct pcie_bus_s *bus);
+
+/****************************************************************************
+ * Name: pci_enable_device
+ *
+ * Description:
+ * Enable device with flags
+ *
+ * Input Parameters:
+ * dev - device
+ * flags - device ability to be enabled
+ *
+ * Return value:
+ * -EINVAL: error
+ * OK: OK
+ *
+ ****************************************************************************/
+
+int pci_enable_device(FAR struct pcie_dev_s *dev, uint32_t flags);
+
+/****************************************************************************
+ * Name: pci_find_cap
+ *
+ * Description:
+ * Search through the PCI-e device capability list to find given capability.
+ *
+ * Input Parameters:
+ * dev - Device
+ * cap - Bitmask of capability
+ *
+ * Returned Value:
+ * -1: Capability not supported
+ * other: the offset in PCI configuration space to the capability structure
+ *
+ ****************************************************************************/
+
+int pci_find_cap(FAR struct pcie_dev_s *dev, uint16_t cap);
+
+/****************************************************************************
+ * Name: pci_map_bar
+ *
+ * Description:
+ * Map address in a 32 bits bar in the flat memory address space
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * length - Map length, multiple of PAGE_SIZE
+ * ret - Bar Contentif not NULL
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
+ unsigned long length, uint32_t *ret);
+
+/****************************************************************************
+ * Name: pci_map_bar64
+ *
+ * Description:
+ * Map address in a 64 bits bar in the flat memory address space
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * length - Map length, multiple of PAGE_SIZE
+ * ret - Bar Content if not NULL
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_map_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
+ unsigned long length, uint64_t *ret);
+
+/****************************************************************************
+ * Name: pci_get_bar
+ *
+ * Description:
+ * Get a 32 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * ret - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_get_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint32_t *ret);
+
+/****************************************************************************
+ * Name: pci_get_bar64
+ *
+ * Description:
+ * Get a 64 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * ret - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_get_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint64_t *ret);
+
+/****************************************************************************
+ * Name: pci_set_bar
+ *
+ * Description:
+ * Set a 32 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * val - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_set_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint32_t val);
+
+/****************************************************************************
+ * Name: pci_set_bar64
+ *
+ * Description:
+ * Set a 64 bits bar
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * val - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+int pci_set_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
+ uint64_t val);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+#endif
+#endif /* __INCLUDE_NUTTX_I2C_I2C_MASTER_H */
[incubator-nuttx] 07/11: pcie: qemu: remove not used header
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 228acefde4203afb36bde8970ad03576e605494f
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 19:03:11 2020 +0900
pcie: qemu: remove not used header
---
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
index f754e66..2e0c392 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
@@ -72,7 +72,6 @@
#include <nuttx/pcie/pcie.h>
#include <nuttx/board.h>
-#include <nuttx/serial/uart_16550.h>
#include <arch/board/board.h>
#include "up_arch.h"
[incubator-nuttx] 11/11: pcie: create MSI/MSIX related marcos and
simplify the msi/msix routines
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 49c276974753737812036540a4b00f2511bcad3f
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 21:35:42 2020 +0900
pcie: create MSI/MSIX related marcos and simplify the msi/msix routines
---
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c | 79 +++++++++++++---------
include/nuttx/pcie/pcie.h | 33 ++++++++-
2 files changed, 77 insertions(+), 35 deletions(-)
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
index 439532c..0580593 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
@@ -266,53 +266,62 @@ static int qemu_pci_msix_register(FAR struct pcie_dev_s *dev,
unsigned int bar;
uint16_t message_control;
uint32_t table_bar_ind;
- uint32_t lo_table_addr;
- uint32_t hi_table_addr;
+ uint32_t table_addr_32;
uint64_t msix_table_addr = 0;
int cap = pci_find_cap(dev, PCI_CAP_MSIX);
if (cap < 0)
return -EINVAL;
- __qemu_pci_cfg_read(dev->bdf, cap + 2, &message_control, 2);
+ __qemu_pci_cfg_read(dev->bdf, cap + PCI_MSIX_MCR,
+ &message_control, PCI_MSIX_MCR_SIZE);
/* bounds check */
- if (index > (message_control & 0x3ff))
+ if (index > (message_control & PCI_MSIX_MCR_TBL_MASK))
return -EINVAL;
- __qemu_pci_cfg_read(dev->bdf, cap + 4, &table_bar_ind, 4);
+ __qemu_pci_cfg_read(dev->bdf, cap + PCI_MSIX_TBL,
+ &table_bar_ind, PCI_MSIX_TBL_SIZE);
- bar = (table_bar_ind & 7) * 4 + PCI_CFG_BAR;
+ bar = (table_bar_ind & PCI_MSIX_BIR_MASK);
- __qemu_pci_cfg_read(dev->bdf, bar, &lo_table_addr, 4);
+ if (!pci_get_bar(dev, bar, &table_addr_32))
+ {
+ /* 32 bit bar */
- if ((lo_table_addr & 6) == PCI_BAR_64BIT)
+ msix_table_addr = table_addr_32;
+ }
+ else
{
- __qemu_pci_cfg_read(dev->bdf, bar + 4, &hi_table_addr, 4);
- msix_table_addr = (uint64_t)hi_table_addr << 32;
+ pci_get_bar64(dev, bar, &msix_table_addr);
}
- msix_table_addr |= lo_table_addr & ~0xf;
- msix_table_addr += table_bar_ind & ~0x7;
+ msix_table_addr &= ~0xf;
+ msix_table_addr += table_bar_ind & ~PCI_MSIX_BIR_MASK;
/* enable and mask */
- message_control |= (MSIX_CTRL_ENABLE | MSIX_CTRL_FMASK);
- __qemu_pci_cfg_write(dev->bdf, cap + 2, &message_control, 2);
+ message_control |= (PCI_MSIX_MCR_EN | PCI_MSIX_MCR_FMASK);
+ __qemu_pci_cfg_write(dev->bdf, cap + PCI_MSIX_MCR,
+ &message_control, PCI_MSIX_MCR_SIZE);
- msix_table_addr += 16 * index;
- mmio_write32((uint32_t *)(msix_table_addr),
- 0xfee00000 | up_apic_cpu_id() << 12);
- mmio_write32((uint32_t *)(msix_table_addr + 4), 0);
- mmio_write32((uint32_t *)(msix_table_addr + 8), vector);
- mmio_write32((uint32_t *)(msix_table_addr + 12), 0);
+ msix_table_addr += PCI_MSIX_TBL_ENTRY_SIZE * index;
+ mmio_write32((uint32_t *)(msix_table_addr + PCI_MSIX_TBL_LO_ADDR),
+ 0xfee00000 | up_apic_cpu_id() << PCI_MSIX_APIC_ID_OFFSET);
+ mmio_write32((uint32_t *)(msix_table_addr + PCI_MSIX_TBL_HI_ADDR),
+ 0);
+ mmio_write32((uint32_t *)(msix_table_addr + PCI_MSIX_TBL_MSG_DATA),
+ vector);
+ mmio_write32((uint32_t *)(msix_table_addr + PCI_MSIX_TBL_VEC_CTL),
+ 0);
/* enable and unmask */
- message_control &= ~MSIX_CTRL_FMASK;
+ message_control &= ~PCI_MSIX_MCR_FMASK;
- __qemu_pci_cfg_write(dev->bdf, cap + 2, &message_control, 2);
+ __qemu_pci_cfg_write(dev->bdf, cap + PCI_MSIX_MCR,
+ &message_control, PCI_MSIX_MCR_SIZE);
return 0;
}
@@ -342,27 +351,31 @@ static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev, uint16_t vector)
if (cap < 0)
return -1;
- uint32_t dest = 0xfee00000 | (up_apic_cpu_id() << 12);
- __qemu_pci_cfg_write(dev->bdf, cap + 4, &dest, 4);
+ uint32_t dest = 0xfee00000 | (up_apic_cpu_id() << PCI_MSI_APIC_ID_OFFSET);
+ __qemu_pci_cfg_write(dev->bdf, cap + PCI_MSI_MAR, &dest, PCI_MSI_MAR_SIZE);
- __qemu_pci_cfg_read(dev->bdf, cap + 2, &ctl, 2);
- if (ctl & (1 << 7))
+ __qemu_pci_cfg_read(dev->bdf, cap + PCI_MSI_MCR, &ctl, PCI_MSI_MCR_SIZE);
+ if ((ctl & PCI_MSI_MCR_64) == PCI_MSI_MCR_64)
{
uint32_t tmp = 0;
- __qemu_pci_cfg_write(dev->bdf, cap + 8, &tmp, 4);
- data = cap + 0x0c;
+ __qemu_pci_cfg_write(dev->bdf,
+ cap + PCI_MSI_MAR64_HI, &tmp,
+ PCI_MSI_MAR64_HI_SIZE);
+ data = cap + PCI_MSI_MDR64;
}
else
{
- data = cap + 0x08;
+ data = cap + PCI_MSI_MDR;
}
- __qemu_pci_cfg_write(dev->bdf, data, &vector, 2);
+ __qemu_pci_cfg_write(dev->bdf, data, &vector, PCI_MSI_MDR_SIZE);
+
+ __qemu_pci_cfg_write(dev->bdf, cap + PCI_MSI_MCR, &vector,
+ PCI_MSI_MCR_SIZE);
- __qemu_pci_cfg_write(dev->bdf, cap + 2, &vector, 2);
+ uint16_t tmp = PCI_MSI_MCR_EN;
- uint16_t en = 0x0001;
- __qemu_pci_cfg_write(dev->bdf, cap + 2, &en, 2);
+ __qemu_pci_cfg_write(dev->bdf, cap + PCI_MSI_MCR, &tmp, PCI_MSI_MCR_SIZE);
return OK;
}
diff --git a/include/nuttx/pcie/pcie.h b/include/nuttx/pcie/pcie.h
index 8b5b98e..fffc791 100644
--- a/include/nuttx/pcie/pcie.h
+++ b/include/nuttx/pcie/pcie.h
@@ -59,10 +59,39 @@
#define PCI_DEV_CLASS_OTHER 0xff
#define PCI_CAP_PM 0x01
+
#define PCI_CAP_MSI 0x05
+# define PCI_MSI_MCR 0x02
+# define PCI_MSI_MCR_SIZE 2
+# define PCI_MSI_MCR_EN (1 << 0)
+# define PCI_MSI_MCR_64 (1 << 7)
+# define PCI_MSI_MAR 0x04
+# define PCI_MSI_MAR_SIZE 4
+# define PCI_MSI_MDR 0x08
+# define PCI_MSI_MDR_SIZE 2
+# define PCI_MSI_MAR64_HI 0x08
+# define PCI_MSI_MAR64_HI_SIZE 4
+# define PCI_MSI_MDR64 0x0c
+# define PCI_MSI_MDR64_SIZE 2
+# define PCI_MSI_APIC_ID_OFFSET 0xc
+
#define PCI_CAP_MSIX 0x11
-# define MSIX_CTRL_ENABLE 0x8000
-# define MSIX_CTRL_FMASK 0x4000
+# define PCI_MSIX_MCR 0x02
+# define PCI_MSIX_MCR_SIZE 2
+# define PCI_MSIX_MCR_EN (1 << 15)
+# define PCI_MSIX_MCR_FMASK 0x4000
+# define PCI_MSIX_MCR_TBL_MASK 0x03ff
+# define PCI_MSIX_TBL 0x04
+# define PCI_MSIX_TBL_SIZE 4
+# define PCI_MSIX_PBA 0x08
+# define PCI_MSIX_PBA_SIZE 4
+# define PCI_MSIX_BIR_MASK 0x07
+# define PCI_MSIX_TBL_ENTRY_SIZE 0x10
+# define PCI_MSIX_TBL_LO_ADDR 0x0
+# define PCI_MSIX_TBL_HI_ADDR 0x4
+# define PCI_MSIX_TBL_MSG_DATA 0x8
+# define PCI_MSIX_TBL_VEC_CTL 0xc
+# define PCI_MSIX_APIC_ID_OFFSET 0xc
/****************************************************************************
* Public Types
[incubator-nuttx] 02/11: x86_64: qemu: implement pci-e functions
and enumerate pci-e devices on boot
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 5516251d91181c0124f689e27f641d0054123fc6
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Mon May 4 18:45:22 2020 +0900
x86_64: qemu: implement pci-e functions and enumerate pci-e devices on
boot
---
boards/x86_64/intel64/qemu-intel64/Kconfig | 8 +
boards/x86_64/intel64/qemu-intel64/include/board.h | 2 +
boards/x86_64/intel64/qemu-intel64/src/Makefile | 4 +
boards/x86_64/intel64/qemu-intel64/src/qemu_boot.c | 6 +
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c | 461 +++++++++++++++++++++
.../intel64/qemu-intel64/src/qemu_pcie_readwrite.h | 229 ++++++++++
6 files changed, 710 insertions(+)
diff --git a/boards/x86_64/intel64/qemu-intel64/Kconfig b/boards/x86_64/intel64/qemu-intel64/Kconfig
index f72f3c0..5951271 100644
--- a/boards/x86_64/intel64/qemu-intel64/Kconfig
+++ b/boards/x86_64/intel64/qemu-intel64/Kconfig
@@ -2,3 +2,11 @@
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
+#
+config QEMU_PCIE
+ bool "Initialize and enumerate PCI-E Bus"
+ default n
+ select PCIE
+
+ ---help---
+ Enables initialization and scaning of standard x86-64 pcie bus.
diff --git a/boards/x86_64/intel64/qemu-intel64/include/board.h b/boards/x86_64/intel64/qemu-intel64/include/board.h
index 22b12cb..0bca067 100644
--- a/boards/x86_64/intel64/qemu-intel64/include/board.h
+++ b/boards/x86_64/intel64/qemu-intel64/include/board.h
@@ -66,6 +66,8 @@ extern "C"
* Public Function Prototypes
****************************************************************************/
+void qemu_pcie_init(void);
+
#undef EXTERN
#if defined(__cplusplus)
}
diff --git a/boards/x86_64/intel64/qemu-intel64/src/Makefile b/boards/x86_64/intel64/qemu-intel64/src/Makefile
index fcb378b..19287bd 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/Makefile
+++ b/boards/x86_64/intel64/qemu-intel64/src/Makefile
@@ -26,4 +26,8 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += qemu_appinit.c
endif
+ifeq ($(CONFIG_QEMU_PCIE),y)
+ CSRCS += qemu_pcie.c
+endif
+
include $(TOPDIR)/boards/Board.mk
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_boot.c b/boards/x86_64/intel64/qemu-intel64/src/qemu_boot.c
index d80e905..fb7807c 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_boot.c
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_boot.c
@@ -68,6 +68,12 @@ void x86_64_boardinitialize(void)
uart_putreg(CONFIG_16550_UART1_BASE, UART_MCR_OFFSET, UART_MCR_OUT2);
#endif
+#ifdef CONFIG_QEMU_PCIE
+ /* Initialization of system */
+
+ qemu_pcie_init();
+#endif
+
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
new file mode 100644
index 0000000..1308e22
--- /dev/null
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
@@ -0,0 +1,461 @@
+/****************************************************************************
+ * boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The MSI and MSI-X vector setup function are taken from Jailhouse inmate
+ * library
+ *
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) Siemens AG, 2014
+ *
+ * Authors:
+ * Jan Kiszka <ja...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ * Alternatively, you can use or redistribute this file under the following
+ * BSD license:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <assert.h>
+
+#include <nuttx/pcie/pcie.h>
+
+#include "qemu_pcie_readwrite.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define QEMU_PCIE_MAX_BDF 0x10000
+
+/****************************************************************************
+ * Private Functions Definitions
+ ****************************************************************************/
+
+static int qemu_pci_enumerate(FAR struct pcie_bus_s *bus,
+ FAR struct pcie_dev_type_s **types);
+
+static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr,
+ FAR const void *buffer, unsigned int size);
+
+static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr,
+ FAR void *buffer, unsigned int size);
+
+static int qemu_pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t addr,
+ unsigned long length);
+
+static int qemu_pci_map_bar64(FAR struct pcie_dev_s *dev, uint64_t addr,
+ unsigned long length);
+
+static int qemu_pci_msix_register(FAR struct pcie_dev_s *dev,
+ uint32_t vector, uint32_t index);
+
+static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev,
+ uint16_t vector);
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+struct pcie_bus_ops_s qemu_pcie_bus_ops =
+{
+ .pcie_enumerate = qemu_pci_enumerate,
+ .pci_cfg_write = qemu_pci_cfg_write,
+ .pci_cfg_read = qemu_pci_cfg_read,
+ .pci_map_bar = qemu_pci_map_bar,
+ .pci_map_bar64 = qemu_pci_map_bar64,
+ .pci_msix_register = qemu_pci_msix_register,
+ .pci_msi_register = qemu_pci_msi_register,
+};
+
+struct pcie_bus_s qemu_pcie_bus =
+{
+ .ops = &qemu_pcie_bus_ops,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: qemu_pci_enumerate
+ *
+ * Description:
+ * Scan the PCI bus and enumerate the devices.
+ * Initialize any recognized devices, given in types.
+ *
+ * Input Parameters:
+ * bus - PCI-E bus structure
+ * type - List of pointers to devices types recognized, NULL terminated
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static int qemu_pci_enumerate(FAR struct pcie_bus_s *bus,
+ FAR struct pcie_dev_type_s **types)
+{
+ unsigned int bdf;
+ uint16_t vid;
+ uint16_t id;
+ uint16_t rev;
+
+ if (!bus)
+ return -EINVAL;
+ if (!types)
+ return -EINVAL;
+
+ for (bdf = 0; bdf < QEMU_PCIE_MAX_BDF; bdf++)
+ {
+ __qemu_pci_cfg_read(bdf, PCI_CFG_VENDOR_ID, &vid, 2);
+ __qemu_pci_cfg_read(bdf, PCI_CFG_DEVICE_ID, &id, 2);
+ __qemu_pci_cfg_read(bdf, PCI_CFG_REVERSION, &rev, 2);
+
+ if (vid == PCI_ID_ANY)
+ continue;
+
+ pciinfo("[%02x:%02x.%x] Found %04x:%04x, class/reversion %08x\n",
+ bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3,
+ vid, id, rev);
+
+ for (int i = 0; types[i] != NULL; i++)
+ {
+ if (types[i]->vendor == PCI_ID_ANY ||
+ types[i]->vendor == vid)
+ {
+ if (types[i]->device == PCI_ID_ANY ||
+ types[i]->device == id)
+ {
+ if (types[i]->class_rev == PCI_ID_ANY ||
+ types[i]->class_rev == rev)
+ {
+ if (types[i]->probe)
+ {
+ pciinfo("[%02x:%02x.%x] %s\n",
+ bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3,
+ types[i]->name);
+ types[i]->probe(bus, types[i], bdf);
+ }
+ else
+ {
+ pcierr("[%02x:%02x.%x] Error: Invalid \
+ device probe function\n",
+ bdf >> 8, (bdf >> 3) & 0x1f, bdf & 0x3);
+ }
+ break;
+ }
+ }
+ }
+ }
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: qemu_pci_cfg_write
+ *
+ * Description:
+ * Write 8, 16, 32, 64 bits data to PCI-E configuration space of device
+ * specified by dev
+ *
+ * Input Parameters:
+ * bdf - Device private data
+ * buffer - A pointer to the read-only buffer of data to be written
+ * size - The number of bytes to send from the buffer
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr,
+ FAR const void *buffer, unsigned int size)
+{
+ switch (size)
+ {
+ case 1:
+ case 2:
+ case 4:
+ return __qemu_pci_cfg_write(dev->bdf, addr, buffer, size);
+ case 8:
+ return __qemu_pci_cfg_write(dev->bdf, addr, buffer, size);
+ default:
+ return -EINVAL;
+ }
+}
+
+/****************************************************************************
+ * Name: qemu_pci_cfg_read
+ *
+ * Description:
+ * Read 8, 16, 32, 64 bits data from PCI-E configuration space of device
+ * specified by dev
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * buffer - A pointer to a buffer to receive the data from the device
+ * size - The requested number of bytes to be read
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr,
+ FAR void *buffer, unsigned int size)
+{
+ switch (size)
+ {
+ case 1:
+ case 2:
+ case 4:
+ return __qemu_pci_cfg_read(dev->bdf, addr, buffer, size);
+ case 8:
+ return __qemu_pci_cfg_read64(dev->bdf, addr, buffer, size);
+ default:
+ return -EINVAL;
+ }
+}
+
+/****************************************************************************
+ * Name: qemu_pci_map_bar
+ *
+ * Description:
+ * Map address in a 32 bits bar in the memory address space
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * length - Map length, multiple of PAGE_SIZE
+ * ret - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static int qemu_pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t addr,
+ unsigned long length)
+{
+ up_map_region((void *)((uintptr_t)addr), length,
+ X86_PAGE_WR | X86_PAGE_PRESENT | X86_PAGE_NOCACHE | X86_PAGE_GLOBAL);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: qemu_pci_map_bar64
+ *
+ * Description:
+ * Map address in a 64 bits bar in the memory address space
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * bar - Bar number
+ * length - Map length, multiple of PAGE_SIZE
+ * ret - Bar Content
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static int qemu_pci_map_bar64(FAR struct pcie_dev_s *dev, uint64_t addr,
+ unsigned long length)
+{
+ up_map_region((void *)((uintptr_t)addr), length,
+ X86_PAGE_WR | X86_PAGE_PRESENT | X86_PAGE_NOCACHE | X86_PAGE_GLOBAL);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: qemu_pci_msix_register
+ *
+ * Description:
+ * Map a device MSI-X vector to a platform IRQ vector
+ *
+ * Input Parameters:
+ * dev - Device
+ * vector - IRQ number of the platform
+ * index - Device MSI-X vector number
+ *
+ * Returned Value:
+ * <0: Mapping failed
+ * 0: Mapping succeed
+ *
+ ****************************************************************************/
+
+static int qemu_pci_msix_register(FAR struct pcie_dev_s *dev,
+ uint32_t vector, uint32_t index)
+{
+ unsigned int bar;
+ uint16_t message_control;
+ uint32_t table_bar_ind;
+ uint32_t lo_table_addr;
+ uint32_t hi_table_addr;
+ uint64_t msix_table_addr = 0;
+
+ int cap = pci_find_cap(dev, PCI_CAP_MSIX);
+ if (cap < 0)
+ return -EINVAL;
+
+ __qemu_pci_cfg_read(dev->bdf, cap + 2, &message_control, 2);
+
+ /* bounds check */
+
+ if (index > (message_control & 0x3ff))
+ return -EINVAL;
+
+ __qemu_pci_cfg_read(dev->bdf, cap + 4, &table_bar_ind, 4);
+
+ bar = (table_bar_ind & 7) * 4 + PCI_CFG_BAR;
+
+ __qemu_pci_cfg_read(dev->bdf, bar, &lo_table_addr, 4);
+
+ if ((lo_table_addr & 6) == PCI_BAR_64BIT)
+ {
+ __qemu_pci_cfg_read(dev->bdf, bar + 4, &hi_table_addr, 4);
+ msix_table_addr = (uint64_t)hi_table_addr << 32;
+ }
+
+ msix_table_addr |= lo_table_addr & ~0xf;
+ msix_table_addr += table_bar_ind & ~0x7;
+
+ /* enable and mask */
+
+ message_control |= (MSIX_CTRL_ENABLE | MSIX_CTRL_FMASK);
+ __qemu_pci_cfg_write(dev->bdf, cap + 2, &message_control, 2);
+
+ msix_table_addr += 16 * index;
+ mmio_write32((uint32_t *)(msix_table_addr),
+ 0xfee00000 | up_apic_cpu_id() << 12);
+ mmio_write32((uint32_t *)(msix_table_addr + 4), 0);
+ mmio_write32((uint32_t *)(msix_table_addr + 8), vector);
+ mmio_write32((uint32_t *)(msix_table_addr + 12), 0);
+
+ /* enable and unmask */
+
+ message_control &= ~MSIX_CTRL_FMASK;
+
+ __qemu_pci_cfg_write(dev->bdf, cap + 2, &message_control, 2);
+
+ return 0;
+}
+
+/****************************************************************************
+ * Name: qemu_pci_msi_register
+ *
+ * Description:
+ * Map device MSI vectors to a platform IRQ vector
+ *
+ * Input Parameters:
+ * dev - Device
+ * vector - IRQ number of the platform
+ *
+ * Returned Value:
+ * <0: Mapping failed
+ * 0: Mapping succeed
+ *
+ ****************************************************************************/
+
+static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev, uint16_t vector)
+{
+ uint16_t ctl;
+ uint16_t data;
+
+ int cap = pci_find_cap(dev, PCI_CAP_MSI);
+ if (cap < 0)
+ return -1;
+
+ uint32_t dest = 0xfee00000 | (up_apic_cpu_id() << 12);
+ __qemu_pci_cfg_write(dev->bdf, cap + 4, &dest, 4);
+
+ __qemu_pci_cfg_read(dev->bdf, cap + 2, &ctl, 2);
+ if (ctl & (1 << 7))
+ {
+ uint32_t tmp = 0;
+ __qemu_pci_cfg_write(dev->bdf, cap + 8, &tmp, 4);
+ data = cap + 0x0c;
+ }
+ else
+ {
+ data = cap + 0x08;
+ }
+
+ __qemu_pci_cfg_write(dev->bdf, data, &vector, 2);
+
+ __qemu_pci_cfg_write(dev->bdf, cap + 2, &vector, 2);
+
+ uint16_t en = 0x0001;
+ __qemu_pci_cfg_write(dev->bdf, cap + 2, &en, 2);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: qemu_pcie_init
+ *
+ * Description:
+ * Initialize the PCI-E bus *
+ *
+ ****************************************************************************/
+
+void qemu_pcie_init(void)
+{
+ pcie_initialize(&qemu_pcie_bus);
+}
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
new file mode 100644
index 0000000..f754e66
--- /dev/null
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
@@ -0,0 +1,229 @@
+/****************************************************************************
+ * boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The PCI-E Definitions and part of the access routines are taken from
+ * Jailhouse inmate library
+ *
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) Siemens AG, 2014
+ *
+ * Authors:
+ * Jan Kiszka <ja...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ * Alternatively, you can use or redistribute this file under the following
+ * BSD license:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __INCLUDE_NUTTX_PCIE_PCIE_READWRITE_H
+#define __INCLUDE_NUTTX_PCIE_PCIE_READWRITE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <assert.h>
+
+#include <nuttx/pcie/pcie.h>
+
+#include <nuttx/board.h>
+#include <nuttx/serial/uart_16550.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PCI_REG_ADDR_PORT 0xcf8
+#define PCI_REG_DATA_PORT 0xcfc
+
+#define PCI_CONE (1 << 31)
+
+/****************************************************************************
+ * Name: __qemu_pci_cfg_write
+ *
+ * Description:
+ * Write 8, 16, 32 bits data to PCI-E configuration space of device
+ * specified by dev
+ *
+ * Input Parameters:
+ * bfd - Device private data
+ * buffer - A pointer to the read-only buffer of data to be written
+ * size - The number of bytes to send from the buffer
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static inline int __qemu_pci_cfg_write(uint16_t bfd, uintptr_t addr,
+ FAR const void *buffer,
+ unsigned int size)
+{
+ outl(PCI_CONE | ((uint32_t)bfd << 8) | (addr & 0xfc), PCI_REG_ADDR_PORT);
+
+ switch (size)
+ {
+ case 1:
+ outb(*(uint8_t *)(buffer), PCI_REG_DATA_PORT + (addr & 0x3));
+ break;
+ case 2:
+ outw(*(uint16_t *)(buffer), PCI_REG_DATA_PORT + (addr & 0x3));
+ break;
+ case 4:
+ outl(*(uint32_t *)(buffer), PCI_REG_DATA_PORT);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return OK;
+}
+
+/****************************************************************************
+ * Name: __qemu_pci_cfg_write64
+ *
+ * Description:
+ * Write 64 bits data to PCI-E configuration space of device
+ * specified by dev
+ *
+ * Input Parameters:
+ * bfd - Device private data
+ * buffer - A pointer to the read-only buffer of data to be written
+ * size - The number of bytes to send from the buffer
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static inline int __qemu_pci_cfg_write64(uint16_t bfd, uintptr_t addr,
+ FAR const void *buffer,
+ unsigned int size)
+{
+ int ret;
+
+ ret = __qemu_pci_cfg_write(bfd, addr + 4, buffer + 4, 4);
+ ret |= __qemu_pci_cfg_write(bfd, addr, buffer, 4);
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: __qemu_pci_cfg_read
+ *
+ * Description:
+ * Read 8, 16, 32 bits data from PCI-E configuration space of device
+ * specified by dev
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * buffer - A pointer to a buffer to receive the data from the device
+ * size - The requested number of bytes to be read
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static inline int __qemu_pci_cfg_read(uint16_t bfd, uintptr_t addr,
+ FAR void *buffer, unsigned int size)
+{
+ outl(PCI_CONE | ((uint32_t)bfd << 8) | (addr & 0xfc), PCI_REG_ADDR_PORT);
+
+ switch (size)
+ {
+ case 1:
+ *(uint8_t *)(buffer) = inb(PCI_REG_DATA_PORT + (addr & 0x3));
+ break;
+ case 2:
+ *(uint16_t *)(buffer) = inw(PCI_REG_DATA_PORT + (addr & 0x3));
+ break;
+ case 4:
+ *(uint32_t *)(buffer) = inl(PCI_REG_DATA_PORT);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: __qemu_pci_cfg_read
+ *
+ * Description:
+ * Read 64 bits data from PCI-E configuration space of device
+ * specified by dev
+ *
+ * Input Parameters:
+ * dev - Device private data
+ * buffer - A pointer to a buffer to receive the data from the device
+ * size - The requested number of bytes to be read
+ *
+ * Returned Value:
+ * 0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+static inline int __qemu_pci_cfg_read64(uint16_t bfd,
+ uintptr_t addr,
+ FAR void *buffer,
+ unsigned int size)
+{
+ int ret;
+
+ ret = __qemu_pci_cfg_read(bfd, addr + 4, buffer + 4, 4);
+ ret |= __qemu_pci_cfg_read(bfd, addr, buffer, 4);
+
+ return ret;
+}
+
+#endif /* __INCLUDE_NUTTX_PCIE_PCIE_READWRITE_H */
[incubator-nuttx] 06/11: pcie: checking bar > 4 for 64bit bars are
sufficient
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit a0e4d9e00790753be650de56e0227a38a5165eeb
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 18:20:20 2020 +0900
pcie: checking bar > 4 for 64bit bars are sufficient
---
drivers/pcie/pcie_root.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pcie/pcie_root.c b/drivers/pcie/pcie_root.c
index 2592fbb..362e677 100644
--- a/drivers/pcie/pcie_root.c
+++ b/drivers/pcie/pcie_root.c
@@ -193,7 +193,7 @@ int pci_get_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
int pci_get_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
uint64_t *ret)
{
- if (bar > 5 || ((bar % 2) != 0))
+ if (bar > 4 || ((bar % 2) != 0))
return -EINVAL;
uint32_t barmem1;
@@ -253,7 +253,7 @@ int pci_set_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
int pci_set_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
uint64_t val)
{
- if (bar > 5 || ((bar % 2) != 0))
+ if (bar > 4 || ((bar % 2) != 0))
return -EINVAL;
uint32_t barmem1 = (uint32_t)val;
@@ -328,7 +328,7 @@ int pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
int pci_map_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
unsigned long length, uint64_t *ret)
{
- if (bar > 5 || ((bar % 2) != 0))
+ if (bar > 4 || ((bar % 2) != 0))
return -EINVAL;
uint32_t barmem1;
[incubator-nuttx] 05/11: pcie: enable don't take flags,
hardcoded enabling flags
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 68f2bf5c472a5dc2af349d0bd287559da841b02a
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 18:19:56 2020 +0900
pcie: enable don't take flags, hardcoded enabling flags
---
drivers/pcie/pcie_root.c | 9 ++++-----
drivers/virt/qemu_pci_test.c | 2 +-
include/nuttx/pcie/pcie.h | 5 ++---
3 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/pcie/pcie_root.c b/drivers/pcie/pcie_root.c
index c5ee688..2592fbb 100644
--- a/drivers/pcie/pcie_root.c
+++ b/drivers/pcie/pcie_root.c
@@ -78,11 +78,10 @@ int pcie_initialize(FAR struct pcie_bus_s *bus)
* Name: pci_enable_device
*
* Description:
- * Enable device with flags
+ * Enable device with MMIO
*
* Input Parameters:
- * bdf - device BDF
- * flags - device ability to be enabled
+ * dev - device
*
* Return value:
* -EINVAL: error
@@ -90,14 +89,14 @@ int pcie_initialize(FAR struct pcie_bus_s *bus)
*
****************************************************************************/
-int pci_enable_device(FAR struct pcie_dev_s *dev, uint32_t flags)
+int pci_enable_device(FAR struct pcie_dev_s *dev)
{
uint16_t old_cmd;
uint16_t cmd;
dev->bus->ops->pci_cfg_read(dev, PCI_CFG_COMMAND, &old_cmd, 2);
- cmd = old_cmd | flags;
+ cmd = old_cmd | (PCI_CMD_MASTER | PCI_CMD_MEM);
dev->bus->ops->pci_cfg_write(dev, PCI_CFG_COMMAND, &cmd, 2);
diff --git a/drivers/virt/qemu_pci_test.c b/drivers/virt/qemu_pci_test.c
index ff1af63..d0df753 100644
--- a/drivers/virt/qemu_pci_test.c
+++ b/drivers/virt/qemu_pci_test.c
@@ -79,7 +79,7 @@ int qemu_pci_test_probe(FAR struct pcie_bus_s *bus,
.bdf = bdf,
};
- pci_enable_device(&dev, (PCI_CMD_MASTER | PCI_CMD_MEM));
+ pci_enable_device(&dev);
for (int ii = 0; ii < 2; ii++)
{
diff --git a/include/nuttx/pcie/pcie.h b/include/nuttx/pcie/pcie.h
index 62adbb7..8b5b98e 100644
--- a/include/nuttx/pcie/pcie.h
+++ b/include/nuttx/pcie/pcie.h
@@ -168,11 +168,10 @@ int pcie_initialize(FAR struct pcie_bus_s *bus);
* Name: pci_enable_device
*
* Description:
- * Enable device with flags
+ * Enable device with MMIO
*
* Input Parameters:
* dev - device
- * flags - device ability to be enabled
*
* Return value:
* -EINVAL: error
@@ -180,7 +179,7 @@ int pcie_initialize(FAR struct pcie_bus_s *bus);
*
****************************************************************************/
-int pci_enable_device(FAR struct pcie_dev_s *dev, uint32_t flags);
+int pci_enable_device(FAR struct pcie_dev_s *dev);
/****************************************************************************
* Name: pci_find_cap
[incubator-nuttx] 10/11: pcie: cosmetic changes to fit check tools
Posted by bt...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
btashton pushed a commit to branch pci
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 870dbea8337ded4fd4bfc88d7d436648d2bd4232
Author: Yang Chung-Fan <so...@gmail.com>
AuthorDate: Wed May 6 20:31:01 2020 +0900
pcie: cosmetic changes to fit check tools
---
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c | 4 ++--
boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h | 8 ++++----
drivers/pcie/pcie_root.c | 1 -
3 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
index f23bec9..439532c 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c
@@ -139,7 +139,7 @@ struct pcie_bus_s qemu_pcie_bus =
static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr,
FAR const void *buffer, unsigned int size)
{
- if(!buffer)
+ if (!buffer)
return -EINVAL;
switch (size)
@@ -175,7 +175,7 @@ static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr,
static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr,
FAR void *buffer, unsigned int size)
{
- if(!buffer)
+ if (!buffer)
return -EINVAL;
switch (size)
diff --git a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
index 0665d83..01fc271 100644
--- a/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
+++ b/boards/x86_64/intel64/qemu-intel64/src/qemu_pcie_readwrite.h
@@ -107,7 +107,7 @@ static inline int __qemu_pci_cfg_write(uint16_t bfd, uintptr_t addr,
FAR const void *buffer,
unsigned int size)
{
- if(!buffer)
+ if (!buffer)
return -EINVAL;
outl(PCI_CONE | ((uint32_t)bfd << 8) | (addr & 0xfc), PCI_REG_ADDR_PORT);
@@ -152,7 +152,7 @@ static inline int __qemu_pci_cfg_write64(uint16_t bfd, uintptr_t addr,
{
int ret;
- if(!buffer)
+ if (!buffer)
return -EINVAL;
ret = __qemu_pci_cfg_write(bfd, addr + 4, buffer + 4, 4);
@@ -181,7 +181,7 @@ static inline int __qemu_pci_cfg_write64(uint16_t bfd, uintptr_t addr,
static inline int __qemu_pci_cfg_read(uint16_t bfd, uintptr_t addr,
FAR void *buffer, unsigned int size)
{
- if(!buffer)
+ if (!buffer)
return -EINVAL;
outl(PCI_CONE | ((uint32_t)bfd << 8) | (addr & 0xfc), PCI_REG_ADDR_PORT);
@@ -228,7 +228,7 @@ static inline int __qemu_pci_cfg_read64(uint16_t bfd,
{
int ret;
- if(!buffer)
+ if (!buffer)
return -EINVAL;
ret = __qemu_pci_cfg_read(bfd, addr + 4, buffer + 4, 4);
diff --git a/drivers/pcie/pcie_root.c b/drivers/pcie/pcie_root.c
index 2b420e1..b85c586 100644
--- a/drivers/pcie/pcie_root.c
+++ b/drivers/pcie/pcie_root.c
@@ -140,7 +140,6 @@ int pci_enumerate(FAR struct pcie_bus_s *bus,
return OK;
}
-
/****************************************************************************
* Name: pcie_initialize
*