You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/02/13 15:31:57 UTC
[incubator-nuttx] 01/02: boards/arm/tiva/lm3s6965-ek/README.txt:
Replace a few non-ascii characters
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 7df273baf9e9a4fa83f50bcc6f1e9cad327fc9b5
Author: YAMAMOTO Takashi <ya...@midokura.com>
AuthorDate: Sat Feb 13 21:49:25 2021 +0900
boards/arm/tiva/lm3s6965-ek/README.txt: Replace a few non-ascii characters
0xae -> (R)
0x99 -> removed
0x96 -> -
---
boards/arm/tiva/lm3s6965-ek/README.txt | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/boards/arm/tiva/lm3s6965-ek/README.txt b/boards/arm/tiva/lm3s6965-ek/README.txt
index 22cdeb7..35efe7f 100644
--- a/boards/arm/tiva/lm3s6965-ek/README.txt
+++ b/boards/arm/tiva/lm3s6965-ek/README.txt
@@ -26,17 +26,17 @@ The Stellaris LM3S6965 Evaluation Board includes the following features:
o User LED, navigation switches, and select pushbuttons
o Magnetic speaker
o LM3S6965 I/O available on labeled break-out pads
- o Standard ARM� 20-pin JTAG debug connector with input and output modes
+ o Standard ARM(R) 20-pin JTAG debug connector with input and output modes
o USB interface for debugging and power supply
o MicroSD card slot
Features of the LM3S6965 Microcontroller
- o 32-bit RISC performance using ARM� Cortex�-M3 v7M architecture
- � 50-MHz operation
- � Hardware-division and single-cycle-multiplication
- � Integrated Nested Vectored Interrupt Controller (NVIC)
- � 42 interrupt channels with eight priority levels
+ o 32-bit RISC performance using ARM(R) Cortex-M3 v7M architecture
+ - 50-MHz operation
+ - Hardware-division and single-cycle-multiplication
+ - Integrated Nested Vectored Interrupt Controller (NVIC)
+ - 42 interrupt channels with eight priority levels
o 256 KB single-cycle flash
o 64 KB single-cycle SRAM
o Four general-purpose 32-bit timers
@@ -46,10 +46,10 @@ Features of the LM3S6965 Microcontroller
o Two independent integrated analog comparators
o Two I2C modules
o Three PWM generator blocks
- � One 16-bit counter
- � Two comparators
- � Produces two independent PWM signals
- � One dead-band generator
+ - One 16-bit counter
+ - Two comparators
+ - Produces two independent PWM signals
+ - One dead-band generator
o Two QEI modules with position integrator for tracking encoder position
o 0 to 42 GPIOs, depending on user configuration
o On-chip low drop-out (LDO) voltage regulator