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Posted to commits@mynewt.apache.org by GitBox <gi...@apache.org> on 2018/04/30 09:49:31 UTC
[GitHub] utzig closed pull request #1039: Add stm32 common hal_timer
(f4/f7/f3/l1)
utzig closed pull request #1039: Add stm32 common hal_timer (f4/f7/f3/l1)
URL: https://github.com/apache/mynewt-core/pull/1039
This is a PR merged from a forked repository.
As GitHub hides the original diff on merge, it is displayed below for
the sake of provenance:
As this is a foreign pull request (from a fork), the diff is supplied
below (as it won't show otherwise due to GitHub magic):
diff --git a/hw/bsp/olimex-p103/include/bsp/bsp.h b/hw/bsp/olimex-p103/include/bsp/bsp.h
index f0dc724af..ba3b128bc 100644
--- a/hw/bsp/olimex-p103/include/bsp/bsp.h
+++ b/hw/bsp/olimex-p103/include/bsp/bsp.h
@@ -40,6 +40,8 @@ extern uint8_t _ram_start;
/* LED pins */
#define LED_BLINK_PIN MCU_GPIO_PORTC(12)
+/* NOTE: no LED is installed here */
+#define LED_2 MCU_GPIO_PORTC(0)
/* UART */
#define UART_CNT 1
diff --git a/hw/bsp/olimex-p103/src/hal_bsp.c b/hw/bsp/olimex-p103/src/hal_bsp.c
index a68c512d9..e25affefd 100644
--- a/hw/bsp/olimex-p103/src/hal_bsp.c
+++ b/hw/bsp/olimex-p103/src/hal_bsp.c
@@ -180,7 +180,15 @@ hal_bsp_init(void)
#endif
#if MYNEWT_VAL(TIMER_0)
- hal_timer_init(0, TIM9);
+ hal_timer_init(0, TIM2);
+#endif
+
+#if MYNEWT_VAL(TIMER_1)
+ hal_timer_init(1, TIM3);
+#endif
+
+#if MYNEWT_VAL(TIMER_2)
+ hal_timer_init(2, TIM4);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
diff --git a/hw/bsp/olimex-p103/syscfg.yml b/hw/bsp/olimex-p103/syscfg.yml
index 5df91a7e9..153623531 100644
--- a/hw/bsp/olimex-p103/syscfg.yml
+++ b/hw/bsp/olimex-p103/syscfg.yml
@@ -21,10 +21,19 @@ syscfg.defs:
UART_0:
description: 'UART 0'
value: 1
+
TIMER_0:
description: 'Timer 0'
value: 0
+ TIMER_1:
+ description: 'Timer 1'
+ value: 0
+
+ TIMER_2:
+ description: 'Timer 2'
+ value: 0
+
syscfg.vals:
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/sensorhub/include/bsp/stm32f4xx_hal_conf.h b/hw/bsp/sensorhub/include/bsp/stm32f4xx_hal_conf.h
index a9ffb1764..3071ef730 100644
--- a/hw/bsp/sensorhub/include/bsp/stm32f4xx_hal_conf.h
+++ b/hw/bsp/sensorhub/include/bsp/stm32f4xx_hal_conf.h
@@ -80,7 +80,6 @@
/* #define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
-#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED
#define HAL_IRDA_MODULE_ENABLED
@@ -99,6 +98,7 @@
#define HAL_RCC_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
#endif
/* ########################## HSE/HSI Values adaptation ##################### */
diff --git a/hw/bsp/stm32f3discovery/include/bsp/bsp.h b/hw/bsp/stm32f3discovery/include/bsp/bsp.h
index 2744c6af5..c791f6b0f 100644
--- a/hw/bsp/stm32f3discovery/include/bsp/bsp.h
+++ b/hw/bsp/stm32f3discovery/include/bsp/bsp.h
@@ -45,6 +45,7 @@ extern uint8_t _ccram_start;
#define CCRAM_SIZE (8 * 1024)
#define LED_BLINK_PIN MCU_GPIO_PORTE(9)
+#define LED_2 MCU_GPIO_PORTE(8)
#define BTN_USER_1 MCU_GPIO_PORTA(0)
diff --git a/hw/bsp/stm32f3discovery/src/hal_bsp.c b/hw/bsp/stm32f3discovery/src/hal_bsp.c
index 687f9202e..21815be2d 100644
--- a/hw/bsp/stm32f3discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32f3discovery/src/hal_bsp.c
@@ -179,6 +179,16 @@ hal_bsp_init(void)
assert(rc == 0);
#endif
+#if MYNEWT_VAL(TIMER_1)
+ rc = hal_timer_init(1, TIM16);
+ assert(rc == 0);
+#endif
+
+#if MYNEWT_VAL(TIMER_2)
+ rc = hal_timer_init(2, TIM17);
+ assert(rc == 0);
+#endif
+
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
diff --git a/hw/bsp/stm32f3discovery/syscfg.yml b/hw/bsp/stm32f3discovery/syscfg.yml
index 1dbf5583c..dc199f8d3 100644
--- a/hw/bsp/stm32f3discovery/syscfg.yml
+++ b/hw/bsp/stm32f3discovery/syscfg.yml
@@ -30,8 +30,19 @@ syscfg.defs:
description: 'Support for timer 0'
value: 1
+ TIMER_1:
+ description: 'Support for timer 1'
+ value: 0
+
+ TIMER_2:
+ description: 'Support for timer 2'
+ value: 0
+
syscfg.vals:
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
NFFS_FLASH_AREA: FLASH_AREA_NFFS
COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1
+ BOOT_SERIAL_DETECT_PIN: 0 # USER button
+ BOOT_SERIAL_DETECT_PIN_CFG: 'HAL_GPIO_PULL_NONE'
+ BOOT_SERIAL_DETECT_PIN_VAL: 1
diff --git a/hw/bsp/stm32f429discovery/src/hal_bsp.c b/hw/bsp/stm32f429discovery/src/hal_bsp.c
index a72014422..4d82ebe55 100644
--- a/hw/bsp/stm32f429discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32f429discovery/src/hal_bsp.c
@@ -42,17 +42,18 @@
#if MYNEWT_VAL(UART_0)
static struct uart_dev hal_uart0;
+/* UART connected to st-link */
static const struct stm32_uart_cfg uart_cfg[UART_CNT] = {
[0] = {
- .suc_uart = USART2,
- .suc_rcc_reg = &RCC->APB1ENR,
- .suc_rcc_dev = RCC_APB1ENR_USART2EN,
- .suc_pin_tx = MCU_GPIO_PORTD(5), /* PD5 */
- .suc_pin_rx = MCU_GPIO_PORTD(6), /* PD6 */
+ .suc_uart = USART1,
+ .suc_rcc_reg = &RCC->APB2ENR,
+ .suc_rcc_dev = RCC_APB2ENR_USART1EN,
+ .suc_pin_tx = MCU_GPIO_PORTA(9),
+ .suc_pin_rx = MCU_GPIO_PORTA(10),
.suc_pin_rts = -1,
.suc_pin_cts = -1,
- .suc_pin_af = GPIO_AF7_USART2,
- .suc_irqn = USART2_IRQn
+ .suc_pin_af = GPIO_AF7_USART1,
+ .suc_irqn = USART1_IRQn
}
};
#endif
@@ -99,11 +100,17 @@ hal_bsp_init(void)
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
+
#if MYNEWT_VAL(TIMER_0)
- hal_timer_init(0, TIM1);
+ hal_timer_init(0, TIM9);
#endif
+
#if MYNEWT_VAL(TIMER_1)
- hal_timer_init(1, TIM9);
+ hal_timer_init(1, TIM10);
+#endif
+
+#if MYNEWT_VAL(TIMER_2)
+ hal_timer_init(2, TIM11);
#endif
}
diff --git a/hw/bsp/stm32f429discovery/syscfg.yml b/hw/bsp/stm32f429discovery/syscfg.yml
index 4c046e247..d2eecb330 100644
--- a/hw/bsp/stm32f429discovery/syscfg.yml
+++ b/hw/bsp/stm32f429discovery/syscfg.yml
@@ -20,13 +20,16 @@
syscfg.defs:
UART_0:
description: 'UART 0'
- value: 1
+ value: 1
TIMER_0:
description: 'Timer 0'
- value: 1
+ value: 1
TIMER_1:
description: 'Timer 1'
- value: 1
+ value: 0
+ TIMER_2:
+ description: 'Timer 2'
+ value: 0
syscfg.vals:
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
diff --git a/hw/bsp/stm32f4discovery/include/bsp/bsp.h b/hw/bsp/stm32f4discovery/include/bsp/bsp.h
index e888c0efa..87b64b4bd 100644
--- a/hw/bsp/stm32f4discovery/include/bsp/bsp.h
+++ b/hw/bsp/stm32f4discovery/include/bsp/bsp.h
@@ -42,6 +42,7 @@ extern uint8_t _ccram_start;
/* LED pins */
#define LED_BLINK_PIN MCU_GPIO_PORTD(12)
+#define LED_2 MCU_GPIO_PORTD(13)
/* UART */
#define UART_CNT 1
diff --git a/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h
index a9ffb1764..6f3a2ebce 100644
--- a/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h
@@ -80,7 +80,6 @@
/* #define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
-#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED
#define HAL_IRDA_MODULE_ENABLED
@@ -90,6 +89,7 @@
#define HAL_PCD_MODULE_ENABLED
#define HAL_HCD_MODULE_ENABLED
#else
+#define HAL_TIM_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
diff --git a/hw/bsp/stm32f4discovery/src/hal_bsp.c b/hw/bsp/stm32f4discovery/src/hal_bsp.c
index ef92c39b5..a37825ad0 100644
--- a/hw/bsp/stm32f4discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32f4discovery/src/hal_bsp.c
@@ -129,6 +129,14 @@ hal_bsp_init(void)
hal_timer_init(0, TIM9);
#endif
+#if MYNEWT_VAL(TIMER_1)
+ hal_timer_init(1, TIM10);
+#endif
+
+#if MYNEWT_VAL(TIMER_2)
+ hal_timer_init(2, TIM11);
+#endif
+
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
diff --git a/hw/bsp/stm32f4discovery/syscfg.yml b/hw/bsp/stm32f4discovery/syscfg.yml
index 5df91a7e9..e6e6299fa 100644
--- a/hw/bsp/stm32f4discovery/syscfg.yml
+++ b/hw/bsp/stm32f4discovery/syscfg.yml
@@ -24,6 +24,12 @@ syscfg.defs:
TIMER_0:
description: 'Timer 0'
value: 0
+ TIMER_1:
+ description: 'Timer 1'
+ value: 0
+ TIMER_2:
+ description: 'Timer 2'
+ value: 0
syscfg.vals:
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
diff --git a/hw/bsp/stm32f767-nucleo/src/hal_bsp.c b/hw/bsp/stm32f767-nucleo/src/hal_bsp.c
index 62aaf9701..1b3523f0d 100644
--- a/hw/bsp/stm32f767-nucleo/src/hal_bsp.c
+++ b/hw/bsp/stm32f767-nucleo/src/hal_bsp.c
@@ -197,15 +197,15 @@ hal_bsp_init(void)
#endif
#if MYNEWT_VAL(TIMER_0)
- hal_timer_init(0, TIM1);
+ hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(TIMER_1)
- hal_timer_init(1, TIM8);
+ hal_timer_init(1, TIM10);
#endif
#if MYNEWT_VAL(TIMER_2)
- hal_timer_init(2, TIM9);
+ hal_timer_init(2, TIM11);
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
diff --git a/hw/bsp/stm32f767-nucleo/syscfg.yml b/hw/bsp/stm32f767-nucleo/syscfg.yml
index 706c33e25..2069d494d 100644
--- a/hw/bsp/stm32f767-nucleo/syscfg.yml
+++ b/hw/bsp/stm32f767-nucleo/syscfg.yml
@@ -21,12 +21,15 @@ syscfg.defs:
UART_0:
description: 'Uart 0'
value: 1
+
TIMER_0:
description: 'Timer 0'
value: 1
+
TIMER_1:
description: 'Timer 1'
value: 1
+
TIMER_2:
description: 'Timer 2'
value: 1
diff --git a/hw/bsp/stm32l152discovery/include/bsp/bsp.h b/hw/bsp/stm32l152discovery/include/bsp/bsp.h
index 26b589534..9dad50ec8 100644
--- a/hw/bsp/stm32l152discovery/include/bsp/bsp.h
+++ b/hw/bsp/stm32l152discovery/include/bsp/bsp.h
@@ -40,6 +40,7 @@ extern uint8_t _ram_start;
/* LED pins */
#define LED_BLINK_PIN MCU_GPIO_PORTB(7)
+#define LED_2 MCU_GPIO_PORTB(6)
/* UART */
#define UART_CNT 1
diff --git a/hw/bsp/stm32l152discovery/include/bsp/stm32l1xx_hal_conf.h b/hw/bsp/stm32l152discovery/include/bsp/stm32l1xx_hal_conf.h
index fd36d6d8c..098d4ac0c 100644
--- a/hw/bsp/stm32l152discovery/include/bsp/stm32l1xx_hal_conf.h
+++ b/hw/bsp/stm32l152discovery/include/bsp/stm32l1xx_hal_conf.h
@@ -73,7 +73,7 @@
/* #define HAL_SMARTCARD_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_TIM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
/* #define HAL_UART_MODULE_ENABLED */
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
diff --git a/hw/bsp/stm32l152discovery/src/hal_bsp.c b/hw/bsp/stm32l152discovery/src/hal_bsp.c
index 8f51d1ec0..c5521b888 100644
--- a/hw/bsp/stm32l152discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32l152discovery/src/hal_bsp.c
@@ -171,10 +171,19 @@ hal_bsp_init(void)
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
+
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
+#if MYNEWT_VAL(TIMER_1)
+ hal_timer_init(1, TIM10);
+#endif
+
+#if MYNEWT_VAL(TIMER_2)
+ hal_timer_init(2, TIM11);
+#endif
+
#if MYNEWT_VAL(SPI_1_MASTER)
rc = hal_spi_init(1, &spi1_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
diff --git a/hw/bsp/stm32l152discovery/syscfg.yml b/hw/bsp/stm32l152discovery/syscfg.yml
index 5df91a7e9..153623531 100644
--- a/hw/bsp/stm32l152discovery/syscfg.yml
+++ b/hw/bsp/stm32l152discovery/syscfg.yml
@@ -21,10 +21,19 @@ syscfg.defs:
UART_0:
description: 'UART 0'
value: 1
+
TIMER_0:
description: 'Timer 0'
value: 0
+ TIMER_1:
+ description: 'Timer 1'
+ value: 0
+
+ TIMER_2:
+ description: 'Timer 2'
+ value: 0
+
syscfg.vals:
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/mcu/stm/stm32f7xx/src/hal_timer.c b/hw/mcu/stm/stm32_common/src/hal_timer.c
similarity index 63%
rename from hw/mcu/stm/stm32f7xx/src/hal_timer.c
rename to hw/mcu/stm/stm32_common/src/hal_timer.c
index 458667b71..c80f7b2b7 100644
--- a/hw/mcu/stm/stm32f7xx/src/hal_timer.c
+++ b/hw/mcu/stm/stm32_common/src/hal_timer.c
@@ -25,58 +25,53 @@
#include <mcu/cmsis_nvic.h>
#include <hal/hal_timer.h>
+#include "mcu/stm32_hal.h"
-#include "stm32f7xx.h"
-#include "stm32f7xx_hal_dma.h"
-#include "stm32f7xx_hal_tim.h"
-#include "stm32f7xx_hal_rcc.h"
+#define STM32_OFLOW_VALUE (0x10000UL)
+#define STM32_NSEC_PER_SEC (1000000000UL)
-#include "mcu/stm32f7xx_mynewt_hal.h"
-
-#define STM32F7_HAL_TIMER_MAX (3)
-
-struct stm32f7_hal_tmr {
- TIM_TypeDef *sht_regs; /* Pointer to timer registers */
- uint32_t sht_oflow; /* 16 bits of overflow to make timer 32bits */
+struct stm32_hal_tmr {
+ TIM_TypeDef *sht_regs; /* Pointer to timer registers */
+ uint32_t sht_oflow; /* 16 bits of overflow to make timer 32bits */
TAILQ_HEAD(hal_timer_qhead, hal_timer) sht_timers;
};
#if MYNEWT_VAL(TIMER_0)
-struct stm32f7_hal_tmr stm32f7_tmr0;
+struct stm32_hal_tmr stm32_tmr0;
#endif
#if MYNEWT_VAL(TIMER_1)
-struct stm32f7_hal_tmr stm32f7_tmr1;
+struct stm32_hal_tmr stm32_tmr1;
#endif
#if MYNEWT_VAL(TIMER_2)
-struct stm32f7_hal_tmr stm32f7_tmr2;
+struct stm32_hal_tmr stm32_tmr2;
#endif
-static struct stm32f7_hal_tmr *stm32f7_tmr_devs[STM32F7_HAL_TIMER_MAX] = {
+static struct stm32_hal_tmr *stm32_tmr_devs[STM32_HAL_TIMER_MAX] = {
#if MYNEWT_VAL(TIMER_0)
- &stm32f7_tmr0,
+ &stm32_tmr0,
#else
NULL,
#endif
#if MYNEWT_VAL(TIMER_1)
- &stm32f7_tmr1,
+ &stm32_tmr1,
#else
NULL,
#endif
#if MYNEWT_VAL(TIMER_2)
- &stm32f7_tmr2,
+ &stm32_tmr2,
#else
NULL,
#endif
};
-static uint32_t hal_timer_cnt(struct stm32f7_hal_tmr *tmr);
+static uint32_t hal_timer_cnt(struct stm32_hal_tmr *tmr);
#if (MYNEWT_VAL(TIMER_0) || MYNEWT_VAL(TIMER_1) || MYNEWT_VAL(TIMER_2))
/*
* Call expired timer callbacks, and reprogram timer with new expiry time.
*/
static void
-stm32f7_tmr_cbs(struct stm32f7_hal_tmr *tmr)
+stm32_tmr_cbs(struct stm32_hal_tmr *tmr)
{
uint32_t cnt;
struct hal_timer *ht;
@@ -108,7 +103,7 @@ stm32f7_tmr_cbs(struct stm32f7_hal_tmr *tmr)
* @param tmr
*/
static void
-stm32f7_tmr_irq(struct stm32f7_hal_tmr *tmr)
+stm32_tmr_irq(struct stm32_hal_tmr *tmr)
{
uint32_t sr;
uint32_t clr = 0;
@@ -118,7 +113,7 @@ stm32f7_tmr_irq(struct stm32f7_hal_tmr *tmr)
/*
* Overflow interrupt
*/
- tmr->sht_oflow += 0x10000;
+ tmr->sht_oflow += STM32_OFLOW_VALUE;
clr |= TIM_SR_UIF;
}
if (sr & TIM_SR_CC1IF) {
@@ -126,7 +121,7 @@ stm32f7_tmr_irq(struct stm32f7_hal_tmr *tmr)
* Capture event
*/
clr |= TIM_SR_CC1IF;
- stm32f7_tmr_cbs(tmr);
+ stm32_tmr_cbs(tmr);
}
tmr->sht_regs->SR = ~clr;
@@ -135,30 +130,30 @@ stm32f7_tmr_irq(struct stm32f7_hal_tmr *tmr)
#if MYNEWT_VAL(TIMER_0)
static void
-stm32f7_tmr0_irq(void)
+stm32_tmr0_irq(void)
{
- stm32f7_tmr_irq(&stm32f7_tmr0);
+ stm32_tmr_irq(&stm32_tmr0);
}
#endif
#if MYNEWT_VAL(TIMER_1)
static void
-stm32f7_tmr1_irq(void)
+stm32_tmr1_irq(void)
{
- stm32f7_tmr_irq(&stm32f7_tmr1);
+ stm32_tmr_irq(&stm32_tmr1);
}
#endif
#if MYNEWT_VAL(TIMER_2)
static void
-stm32f7_tmr2_irq(void)
+stm32_tmr2_irq(void)
{
- stm32f7_tmr_irq(&stm32f7_tmr2);
+ stm32_tmr_irq(&stm32_tmr2);
}
#endif
static void
-stm32f7_tmr_reg_irq(IRQn_Type irqn, uint32_t func)
+stm32_tmr_reg_irq(IRQn_Type irqn, uint32_t func)
{
NVIC_SetPriority(irqn, (1 << __NVIC_PRIO_BITS) - 1);
NVIC_SetVector(irqn, func);
@@ -166,7 +161,7 @@ stm32f7_tmr_reg_irq(IRQn_Type irqn, uint32_t func)
}
static uint32_t
-stm32f7_base_freq(TIM_TypeDef *regs)
+stm32_base_freq(TIM_TypeDef *regs)
{
RCC_ClkInitTypeDef clocks;
uint32_t fl;
@@ -193,12 +188,35 @@ stm32f7_base_freq(TIM_TypeDef *regs)
#endif
#ifdef TIM11
case (uint32_t)TIM11:
+#endif
+#ifdef TIM15
+ case (uint32_t)TIM15:
+#endif
+#ifdef TIM16
+ case (uint32_t)TIM16:
+#endif
+#ifdef TIM17
+ case (uint32_t)TIM17:
#endif
freq = HAL_RCC_GetPCLK2Freq();
if (clocks.APB2CLKDivider) {
freq *= 2;
}
break;
+#ifdef TIM2
+ case (uint32_t)TIM2:
+#endif
+#ifdef TIM3
+ case (uint32_t)TIM3:
+#endif
+#ifdef TIM4
+ case (uint32_t)TIM4:
+#endif
+ freq = HAL_RCC_GetPCLK1Freq();
+ if (clocks.APB1CLKDivider) {
+ freq *= 2;
+ }
+ break;
default:
return 0;
}
@@ -206,24 +224,24 @@ stm32f7_base_freq(TIM_TypeDef *regs)
}
static void
-stm32f7_hw_setup(int num, TIM_TypeDef *regs)
+stm32_hw_setup(int num, TIM_TypeDef *regs)
{
uint32_t func;
switch (num) {
#if MYNEWT_VAL(TIMER_0)
case 0:
- func = (uint32_t)stm32f7_tmr0_irq;
+ func = (uint32_t)stm32_tmr0_irq;
break;
#endif
#if MYNEWT_VAL(TIMER_1)
case 1:
- func = (uint32_t)stm32f7_tmr1_irq;
+ func = (uint32_t)stm32_tmr1_irq;
break;
#endif
#if MYNEWT_VAL(TIMER_2)
case 2:
- func = (uint32_t)stm32f7_tmr2_irq;
+ func = (uint32_t)stm32_tmr2_irq;
break;
#endif
default:
@@ -233,46 +251,117 @@ stm32f7_hw_setup(int num, TIM_TypeDef *regs)
#ifdef TIM1
if (regs == TIM1) {
- stm32f7_tmr_reg_irq(TIM1_CC_IRQn, func);
- stm32f7_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
+ stm32_tmr_reg_irq(TIM1_CC_IRQn, func);
+#if defined(STM32F3)
+ stm32_tmr_reg_irq(TIM1_UP_TIM16_IRQn, func);
+#else
+ stm32_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
+#endif
__HAL_RCC_TIM1_CLK_ENABLE();
}
#endif
+#ifdef TIM2
+ if (regs == TIM2) {
+ stm32_tmr_reg_irq(TIM2_IRQn, func);
+ __HAL_RCC_TIM2_CLK_ENABLE();
+ }
+#endif
+#ifdef TIM3
+ if (regs == TIM3) {
+ stm32_tmr_reg_irq(TIM3_IRQn, func);
+ __HAL_RCC_TIM3_CLK_ENABLE();
+ }
+#endif
+#ifdef TIM4
+ if (regs == TIM4) {
+ stm32_tmr_reg_irq(TIM4_IRQn, func);
+ __HAL_RCC_TIM4_CLK_ENABLE();
+ }
+#endif
#ifdef TIM8
if (regs == TIM8) {
- stm32f7_tmr_reg_irq(TIM8_CC_IRQn, func);
- stm32f7_tmr_reg_irq(TIM8_UP_TIM13_IRQn, func);
+ stm32_tmr_reg_irq(TIM8_CC_IRQn, func);
+#if defined(STM32F3)
+ stm32_tmr_reg_irq(TIM8_UP_IRQn, func);
+#else
+ stm32_tmr_reg_irq(TIM8_UP_TIM13_IRQn, func);
+#endif
__HAL_RCC_TIM8_CLK_ENABLE();
}
#endif
#ifdef TIM9
if (regs == TIM9) {
- stm32f7_tmr_reg_irq(TIM1_BRK_TIM9_IRQn, func);
+#if defined(STM32L1)
+ stm32_tmr_reg_irq(TIM9_IRQn, func);
+#else
+ stm32_tmr_reg_irq(TIM1_BRK_TIM9_IRQn, func);
+#endif
__HAL_RCC_TIM9_CLK_ENABLE();
}
#endif
#ifdef TIM10
if (regs == TIM10) {
- stm32f7_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
+#if defined(STM32L1)
+ stm32_tmr_reg_irq(TIM10_IRQn, func);
+#else
+ stm32_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
+#endif
__HAL_RCC_TIM10_CLK_ENABLE();
}
#endif
#ifdef TIM11
if (regs == TIM11) {
- stm32f7_tmr_reg_irq(TIM1_TRG_COM_TIM11_IRQn, func);
+#if defined(STM32L1)
+ stm32_tmr_reg_irq(TIM11_IRQn, func);
+#else
+ stm32_tmr_reg_irq(TIM1_TRG_COM_TIM11_IRQn, func);
+#endif
__HAL_RCC_TIM11_CLK_ENABLE();
}
#endif
+#ifdef TIM15
+ if (regs == TIM15) {
+ stm32_tmr_reg_irq(TIM1_BRK_TIM15_IRQn, func);
+ __HAL_RCC_TIM15_CLK_ENABLE();
+ }
+#endif
+#ifdef TIM16
+ if (regs == TIM16) {
+ stm32_tmr_reg_irq(TIM1_UP_TIM16_IRQn, func);
+ __HAL_RCC_TIM16_CLK_ENABLE();
+ }
+#endif
+#ifdef TIM17
+ if (regs == TIM17) {
+ stm32_tmr_reg_irq(TIM1_TRG_COM_TIM17_IRQn, func);
+ __HAL_RCC_TIM17_CLK_ENABLE();
+ }
+#endif
}
static void
-stm32f7_hw_setdown(TIM_TypeDef *regs)
+stm32_hw_setdown(TIM_TypeDef *regs)
{
#ifdef TIM1
if (regs == TIM1) {
__HAL_RCC_TIM1_CLK_DISABLE();
}
#endif
+#ifdef TIM2
+ if (regs == TIM2) {
+ __HAL_RCC_TIM2_CLK_DISABLE();
+ }
+#endif
+#ifdef TIM3
+ if (regs == TIM3) {
+ __HAL_RCC_TIM3_CLK_DISABLE();
+ }
+#endif
+#ifdef TIM4
+ if (regs == TIM4) {
+ __HAL_RCC_TIM4_CLK_DISABLE();
+ }
+#endif
#ifdef TIM8
if (regs == TIM8) {
__HAL_RCC_TIM8_CLK_DISABLE();
@@ -293,6 +382,21 @@ stm32f7_hw_setdown(TIM_TypeDef *regs)
__HAL_RCC_TIM11_CLK_DISABLE();
}
#endif
+#ifdef TIM15
+ if (regs == TIM15) {
+ __HAL_RCC_TIM15_CLK_DISABLE();
+ }
+#endif
+#ifdef TIM16
+ if (regs == TIM16) {
+ __HAL_RCC_TIM16_CLK_DISABLE();
+ }
+#endif
+#ifdef TIM17
+ if (regs == TIM17) {
+ __HAL_RCC_TIM17_CLK_DISABLE();
+ }
+#endif
}
/**
@@ -308,26 +412,80 @@ stm32f7_hw_setdown(TIM_TypeDef *regs)
int
hal_timer_init(int num, void *cfg)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
+ TIM_TypeDef *regs;
- if (num >= STM32F7_HAL_TIMER_MAX || !(tmr = stm32f7_tmr_devs[num]) ||
+ if (num >= STM32_HAL_TIMER_MAX || !(tmr = stm32_tmr_devs[num]) ||
(cfg == NULL)) {
return -1;
}
- tmr->sht_regs = (TIM_TypeDef *)cfg;
+ regs = tmr->sht_regs = (TIM_TypeDef *)cfg;
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
+ if (!IS_TIM_CC1_INSTANCE(regs)) {
return -1;
}
- stm32f7_hw_setup(num, tmr->sht_regs);
+ stm32_hw_setup(num, regs);
/*
- * Stop the timers at debugger. XXX Which TIM?
+ * Stop the timers at debugger.
*/
- DBGMCU->APB1FZ |= 0x1ff; /* TIM2 - TIM7, TIM12-TIM14 */
- DBGMCU->APB2FZ |= 0x70003; /* TIM1, TIM8-TIM11 */
+#ifdef TIM1
+ if (regs == TIM1) {
+ __HAL_DBGMCU_FREEZE_TIM1();
+ }
+#endif
+#ifdef TIM2
+ if (regs == TIM2) {
+ __HAL_DBGMCU_FREEZE_TIM2();
+ }
+#endif
+#ifdef TIM3
+ if (regs == TIM3) {
+ __HAL_DBGMCU_FREEZE_TIM3();
+ }
+#endif
+#ifdef TIM4
+ if (regs == TIM4) {
+ __HAL_DBGMCU_FREEZE_TIM4();
+ }
+#endif
+#ifdef TIM8
+ if (regs == TIM8) {
+ __HAL_DBGMCU_FREEZE_TIM8();
+ }
+#endif
+#ifdef TIM9
+ if (regs == TIM9) {
+ __HAL_DBGMCU_FREEZE_TIM9();
+ }
+#endif
+#ifdef TIM10
+ if (regs == TIM10) {
+ __HAL_DBGMCU_FREEZE_TIM10();
+ }
+#endif
+#ifdef TIM11
+ if (regs == TIM11) {
+ __HAL_DBGMCU_FREEZE_TIM11();
+ }
+#endif
+#ifdef TIM15
+ if (regs == TIM15) {
+ __HAL_DBGMCU_FREEZE_TIM15();
+ }
+#endif
+#ifdef TIM16
+ if (regs == TIM16) {
+ __HAL_DBGMCU_FREEZE_TIM16();
+ }
+#endif
+#ifdef TIM17
+ if (regs == TIM17) {
+ __HAL_DBGMCU_FREEZE_TIM17();
+ }
+#endif
return 0;
}
@@ -345,18 +503,18 @@ hal_timer_init(int num, void *cfg)
int
hal_timer_config(int num, uint32_t freq_hz)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
TIM_Base_InitTypeDef init;
uint32_t prescaler;
- if (num >= STM32F7_HAL_TIMER_MAX || !(tmr = stm32f7_tmr_devs[num])) {
+ if (num >= STM32_HAL_TIMER_MAX || !(tmr = stm32_tmr_devs[num])) {
return -1;
}
if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
return -1;
}
- prescaler = stm32f7_base_freq(tmr->sht_regs) / freq_hz;
+ prescaler = stm32_base_freq(tmr->sht_regs) / freq_hz;
if (prescaler > 0xffff) {
return -1;
}
@@ -393,10 +551,10 @@ hal_timer_config(int num, uint32_t freq_hz)
int
hal_timer_deinit(int num)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
int sr;
- if (num >= STM32F7_HAL_TIMER_MAX || !(tmr = stm32f7_tmr_devs[num])) {
+ if (num >= STM32_HAL_TIMER_MAX || !(tmr = stm32_tmr_devs[num])) {
return -1;
}
@@ -408,7 +566,7 @@ hal_timer_deinit(int num)
tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
__HAL_ENABLE_INTERRUPTS(sr);
- stm32f7_hw_setdown(tmr->sht_regs);
+ stm32_hw_setdown(tmr->sht_regs);
return 0;
}
@@ -425,28 +583,29 @@ hal_timer_deinit(int num)
uint32_t
hal_timer_get_resolution(int num)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
- if (num >= STM32F7_HAL_TIMER_MAX || !(tmr = stm32f7_tmr_devs[num])) {
+ if (num >= STM32_HAL_TIMER_MAX || !(tmr = stm32_tmr_devs[num])) {
return -1;
}
- return (1000000000 / (SystemCoreClock / tmr->sht_regs->PSC));
+ return (STM32_NSEC_PER_SEC / (SystemCoreClock / tmr->sht_regs->PSC));
}
static uint32_t
-hal_timer_cnt(struct stm32f7_hal_tmr *tmr)
+hal_timer_cnt(struct stm32_hal_tmr *tmr)
{
uint32_t cnt;
int sr;
__HAL_DISABLE_INTERRUPTS(sr);
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT;
if (tmr->sht_regs->SR & TIM_SR_UIF) {
/*
* Just overflowed
*/
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT + 0x10000;
+ tmr->sht_oflow += STM32_OFLOW_VALUE;
+ tmr->sht_regs->SR &= ~TIM_SR_UIF;
}
+ cnt = tmr->sht_oflow + tmr->sht_regs->CNT;
__HAL_ENABLE_INTERRUPTS(sr);
return cnt;
@@ -464,9 +623,9 @@ hal_timer_cnt(struct stm32f7_hal_tmr *tmr)
uint32_t
hal_timer_read(int num)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
- if (num >= STM32F7_HAL_TIMER_MAX || !(tmr = stm32f7_tmr_devs[num])) {
+ if (num >= STM32_HAL_TIMER_MAX || !(tmr = stm32_tmr_devs[num])) {
return -1;
}
return hal_timer_cnt(tmr);
@@ -485,10 +644,10 @@ hal_timer_read(int num)
int
hal_timer_delay(int num, uint32_t ticks)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
uint32_t until;
- if (num >= STM32F7_HAL_TIMER_MAX || !(tmr = stm32f7_tmr_devs[num])) {
+ if (num >= STM32_HAL_TIMER_MAX || !(tmr = stm32_tmr_devs[num])) {
return -1;
}
@@ -512,9 +671,9 @@ int
hal_timer_set_cb(int num, struct hal_timer *timer, hal_timer_cb cb_func,
void *arg)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
- if (num >= STM32F7_HAL_TIMER_MAX || !(tmr = stm32f7_tmr_devs[num])) {
+ if (num >= STM32_HAL_TIMER_MAX || !(tmr = stm32_tmr_devs[num])) {
return -1;
}
timer->cb_func = cb_func;
@@ -538,10 +697,10 @@ hal_timer_set_cb(int num, struct hal_timer *timer, hal_timer_cb cb_func,
int
hal_timer_start(struct hal_timer *timer, uint32_t ticks)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
uint32_t tick;
- tmr = (struct stm32f7_hal_tmr *)timer->bsp_timer;
+ tmr = (struct stm32_hal_tmr *)timer->bsp_timer;
tick = ticks + hal_timer_cnt(tmr);
return hal_timer_start_at(timer, tick);
@@ -560,11 +719,11 @@ hal_timer_start(struct hal_timer *timer, uint32_t ticks)
int
hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
struct hal_timer *ht;
int sr;
- tmr = (struct stm32f7_hal_tmr *)timer->bsp_timer;
+ tmr = (struct stm32_hal_tmr *)timer->bsp_timer;
timer->expiry = tick;
@@ -614,14 +773,14 @@ hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
int
hal_timer_stop(struct hal_timer *timer)
{
- struct stm32f7_hal_tmr *tmr;
+ struct stm32_hal_tmr *tmr;
struct hal_timer *ht;
int sr;
int reset_ocmp;
__HAL_DISABLE_INTERRUPTS(sr);
- tmr = (struct stm32f7_hal_tmr *)timer->bsp_timer;
+ tmr = (struct stm32_hal_tmr *)timer->bsp_timer;
if (timer->link.tqe_prev != NULL) {
reset_ocmp = 0;
if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
diff --git a/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h
index f880066da..975354795 100644
--- a/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h
@@ -62,6 +62,11 @@ struct stm32_hal_spi_cfg {
#include "stm32f1xx_hal_uart.h"
#include "mcu/stm32f1_bsp.h"
+/* hal_timer */
+#include "stm32f1xx_hal_tim.h"
+
+#define STM32_HAL_TIMER_MAX (3)
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32f1xx/src/hal_timer.c b/hw/mcu/stm/stm32f1xx/src/hal_timer.c
deleted file mode 100644
index c382d7897..000000000
--- a/hw/mcu/stm/stm32f1xx/src/hal_timer.c
+++ /dev/null
@@ -1,629 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <inttypes.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <mcu/cmsis_nvic.h>
-#include <hal/hal_timer.h>
-
-#if 0
-
-#include "stm32l1xx.h"
-#include "stm32l1xx_hal_dma.h"
-#include "stm32l1xx_hal_tim.h"
-#include "stm32l1xx_hal_rcc.h"
-
-#include "mcu/stm32l1xx_mynewt_hal.h"
-
-#define STM32L1_HAL_TIMER_MAX (2)
-
-struct stm32l1_hal_tmr {
- TIM_TypeDef *sht_regs; /* Pointer to timer registers */
- uint32_t sht_oflow; /* 16 bits of overflow to make timer 32bits */
- TAILQ_HEAD(hal_timer_qhead, hal_timer) sht_timers;
-};
-
-#if MYNEWT_VAL(TIMER_0)
-struct stm32l1_hal_tmr stm32l1_tmr0;
-#endif
-#if MYNEWT_VAL(TIMER_1)
-struct stm32l1_hal_tmr stm32l1_tmr1;
-#endif
-
-static struct stm32l1_hal_tmr *stm32l1_tmr_devs[STM32L1_HAL_TIMER_MAX] = {
-#if MYNEWT_VAL(TIMER_0)
- &stm32l1_tmr0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(TIMER_1)
- &stm32l1_tmr1,
-#else
- NULL,
-#endif
-};
-
-static uint32_t hal_timer_cnt(struct stm32l1_hal_tmr *tmr);
-
-#if (MYNEWT_VAL(TIMER_0) || MYNEWT_VAL(TIMER_1))
-/*
- * Call expired timer callbacks, and reprogram timer with new expiry time.
- */
-static void
-stm32l1_tmr_cbs(struct stm32l1_hal_tmr *tmr)
-{
- uint32_t cnt;
- struct hal_timer *ht;
-
- while ((ht = TAILQ_FIRST(&tmr->sht_timers)) != NULL) {
- cnt = hal_timer_cnt(tmr);
- if (((int32_t)(cnt - ht->expiry)) >= 0) {
- TAILQ_REMOVE(&tmr->sht_timers, ht, link);
- ht->link.tqe_prev = NULL;
- ht->cb_func(ht->cb_arg);
- } else {
- break;
- }
- }
- ht = TAILQ_FIRST(&tmr->sht_timers);
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
-}
-
-/*
- * timer irq handler
- *
- * Generic HAL timer irq handler.
- *
- * @param tmr
- */
-static void
-stm32l1_tmr_irq(struct stm32l1_hal_tmr *tmr)
-{
- uint32_t sr;
- uint32_t clr = 0;
-
- sr = tmr->sht_regs->SR;
- if (sr & TIM_SR_UIF) {
- /*
- * Overflow interrupt
- */
- tmr->sht_oflow += 0x10000;
- clr |= TIM_SR_UIF;
- }
- if (sr & TIM_SR_CC1IF) {
- /*
- * Capture event
- */
- clr |= TIM_SR_CC1IF;
- stm32l1_tmr_cbs(tmr);
- }
-
- tmr->sht_regs->SR = ~clr;
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_0)
-static void
-stm32l1_tmr0_irq(void)
-{
- stm32l1_tmr_irq(&stm32l1_tmr0);
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_1)
-static void
-stm32l1_tmr1_irq(void)
-{
- stm32l1_tmr_irq(&stm32l1_tmr1);
-}
-#endif
-
-static void
-stm32l1_tmr_reg_irq(IRQn_Type irqn, uint32_t func)
-{
- NVIC_SetPriority(irqn, (1 << __NVIC_PRIO_BITS) - 1);
- NVIC_SetVector(irqn, func);
- NVIC_EnableIRQ(irqn);
-}
-
-static uint32_t
-stm32l1_base_freq(TIM_TypeDef *regs)
-{
- RCC_ClkInitTypeDef clocks;
- uint32_t fl;
- uint32_t freq;
-
- HAL_RCC_GetClockConfig(&clocks, &fl);
-
- /*
- * Assuming RCC_DCKCFGR->TIMPRE is 0.
- * There's just APB2 timers here.
- */
- switch ((uint32_t)regs) {
-#ifdef TIM1
- case (uint32_t)TIM1:
-#endif
-#ifdef TIM8
- case (uint32_t)TIM8:
-#endif
-#ifdef TIM9
- case (uint32_t)TIM9:
-#endif
-#ifdef TIM10
- case (uint32_t)TIM10:
-#endif
-#ifdef TIM11
- case (uint32_t)TIM11:
-#endif
- freq = HAL_RCC_GetPCLK2Freq();
- if (clocks.APB2CLKDivider) {
- freq *= 2;
- }
- break;
- default:
- return 0;
- }
- return freq;
-}
-
-static void
-stm32l1_hw_setup(int num, TIM_TypeDef *regs)
-{
- uint32_t func;
-
- switch (num) {
-#if MYNEWT_VAL(TIMER_0)
- case 0:
- func = (uint32_t)stm32l1_tmr0_irq;
- break;
-#endif
-#if MYNEWT_VAL(TIMER_1)
- case 1:
- func = (uint32_t)stm32l1_tmr1_irq;
- break;
-#endif
- default:
- assert(0);
- return;
- }
-
-#ifdef TIM1
- if (regs == TIM1) {
- stm32l1_tmr_reg_irq(TIM1_CC_IRQn, func);
- stm32l1_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
- __HAL_RCC_TIM1_CLK_ENABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- stm32l1_tmr_reg_irq(TIM8_CC_IRQn, func);
- stm32l1_tmr_reg_irq(TIM8_UP_TIM13_IRQn, func);
- __HAL_RCC_TIM8_CLK_ENABLE();
- }
-#endif
-#ifdef TIM9
- if (regs == TIM9) {
- stm32l1_tmr_reg_irq(TIM1_BRK_TIM9_IRQn, func);
- __HAL_RCC_TIM9_CLK_ENABLE();
- }
-#endif
-#ifdef TIM10
- if (regs == TIM10) {
- stm32l1_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
- __HAL_RCC_TIM10_CLK_ENABLE();
- }
-#endif
-#ifdef TIM11
- if (regs == TIM11) {
- stm32l1_tmr_reg_irq(TIM1_TRG_COM_TIM11_IRQn, func);
- __HAL_RCC_TIM11_CLK_ENABLE();
- }
-#endif
-}
-
-static void
-stm32l1_hw_setdown(TIM_TypeDef *regs)
-{
-#ifdef TIM1
- if (regs == TIM1) {
- __HAL_RCC_TIM1_CLK_DISABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- __HAL_RCC_TIM8_CLK_DISABLE();
- }
-#endif
-#ifdef TIM9
- if (regs == TIM9) {
- __HAL_RCC_TIM9_CLK_DISABLE();
- }
-#endif
-#ifdef TIM10
- if (regs == TIM10) {
- __HAL_RCC_TIM10_CLK_DISABLE();
- }
-#endif
-#ifdef TIM11
- if (regs == TIM11) {
- __HAL_RCC_TIM11_CLK_DISABLE();
- }
-#endif
-}
-
-/**
- * hal timer init
- *
- * Initialize platform specific timer items
- *
- * @param timer_num Timer number to initialize
- * @param cfg Pointer to platform specific configuration
- *
- * @return int 0: success; error code otherwise
- */
-int
-hal_timer_init(int num, void *cfg)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num]) ||
- (cfg == NULL)) {
- return -1;
- }
-
- tmr->sht_regs = (TIM_TypeDef *)cfg;
-
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
- return -1;
- }
-
- stm32l1_hw_setup(num, tmr->sht_regs);
-
- /*
- * Stop the timers at debugger. XXX Which TIM?
- */
- DBGMCU->APB1FZ |= 0x1ff; /* TIM2 - TIM7, TIM12-TIM14 */
- DBGMCU->APB2FZ |= 0x70003; /* TIM1, TIM8-TIM11 */
-
- return 0;
-}
-
-/**
- * hal timer config
- *
- * Configure a timer to run at the desired frequency. This starts the timer.
- *
- * @param timer_num
- * @param freq_hz
- *
- * @return int
- */
-int
-hal_timer_config(int num, uint32_t freq_hz)
-{
- struct stm32l1_hal_tmr *tmr;
- TIM_Base_InitTypeDef init;
- uint32_t prescaler;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
- return -1;
- }
-
- prescaler = stm32l1_base_freq(tmr->sht_regs) / freq_hz;
- if (prescaler > 0xffff) {
- return -1;
- }
-
- memset(&init, 0, sizeof(init));
- init.Period = 0xffff;
- init.Prescaler = prescaler;
- init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- init.CounterMode = TIM_COUNTERMODE_UP;
-
- /*
- * Set up to count overflow interrupts.
- */
- tmr->sht_regs->CR1 = TIM_CR1_URS;
- tmr->sht_regs->DIER = TIM_DIER_UIE;
-
- TIM_Base_SetConfig(tmr->sht_regs, &init);
-
- tmr->sht_regs->SR = 0;
- tmr->sht_regs->CR1 |= TIM_CR1_CEN;
-
- return 0;
-}
-
-/**
- * hal timer deinit
- *
- * De-initialize a HW timer.
- *
- * @param timer_num
- *
- * @return int
- */
-int
-hal_timer_deinit(int num)
-{
- struct stm32l1_hal_tmr *tmr;
- int sr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
-
- __HAL_DISABLE_INTERRUPTS(sr);
- /*
- * Turn off CC1, and then turn off the timer.
- */
- tmr->sht_regs->CR1 &= ~TIM_CR1_CEN;
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- __HAL_ENABLE_INTERRUPTS(sr);
- stm32l1_hw_setdown(tmr->sht_regs);
-
- return 0;
-}
-
-/**
- * hal timer get resolution
- *
- * Get the resolution of the timer. This is the timer period, in nanoseconds
- *
- * @param timer_num
- *
- * @return uint32_t
- */
-uint32_t
-hal_timer_get_resolution(int num)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- return (1000000000 / (SystemCoreClock / tmr->sht_regs->PSC));
-}
-
-static uint32_t
-hal_timer_cnt(struct stm32l1_hal_tmr *tmr)
-{
- uint32_t cnt;
- int sr;
-
- __HAL_DISABLE_INTERRUPTS(sr);
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT;
- if (tmr->sht_regs->SR & TIM_SR_UIF) {
- /*
- * Just overflowed
- */
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT + 0x10000;
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return cnt;
-}
-
-/**
- * hal timer read
- *
- * Returns the timer counter. NOTE: if the timer is a 16-bit timer, only
- * the lower 16 bits are valid. If the timer is a 64-bit timer, only the
- * low 32-bits are returned.
- *
- * @return uint32_t The timer counter register.
- */
-uint32_t
-hal_timer_read(int num)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- return hal_timer_cnt(tmr);
-}
-
-/**
- * hal timer delay
- *
- * Blocking delay for n ticks
- *
- * @param timer_num
- * @param ticks
- *
- * @return int 0 on success; error code otherwise.
- */
-int
-hal_timer_delay(int num, uint32_t ticks)
-{
- struct stm32l1_hal_tmr *tmr;
- uint32_t until;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
-
- until = hal_timer_cnt(tmr) + ticks;
- while ((int32_t)(hal_timer_cnt(tmr) - until) <= 0) {
- ;
- }
- return 0;
-}
-
-/**
- *
- * Initialize the HAL timer structure with the callback and the callback
- * argument. Also initializes the HW specific timer pointer.
- *
- * @param cb_func
- *
- * @return int
- */
-int
-hal_timer_set_cb(int num, struct hal_timer *timer, hal_timer_cb cb_func,
- void *arg)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- timer->cb_func = cb_func;
- timer->cb_arg = arg;
- timer->bsp_timer = tmr;
- timer->link.tqe_prev = NULL;
-
- return 0;
-}
-
-/**
- * hal_timer_start()
- *
- * Start a timer. Timer fires 'ticks' ticks from now.
- *
- * @param timer
- * @param ticks
- *
- * @return int
- */
-int
-hal_timer_start(struct hal_timer *timer, uint32_t ticks)
-{
- struct stm32l1_hal_tmr *tmr;
- uint32_t tick;
-
- tmr = (struct stm32l1_hal_tmr *)timer->bsp_timer;
-
- tick = ticks + hal_timer_cnt(tmr);
- return hal_timer_start_at(timer, tick);
-}
-
-/**
- * hal_timer_start_at()
- *
- * Start a timer. Timer fires at tick 'tick'.
- *
- * @param timer
- * @param tick
- *
- * @return int
- */
-int
-hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
-{
- struct stm32l1_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
-
- tmr = (struct stm32l1_hal_tmr *)timer->bsp_timer;
-
- timer->expiry = tick;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- if (TAILQ_EMPTY(&tmr->sht_timers)) {
- TAILQ_INSERT_HEAD(&tmr->sht_timers, timer, link);
- } else {
- TAILQ_FOREACH(ht, &tmr->sht_timers, link) {
- if ((int32_t)(timer->expiry - ht->expiry) < 0) {
- TAILQ_INSERT_BEFORE(ht, timer, link);
- break;
- }
- }
- if (!ht) {
- TAILQ_INSERT_TAIL(&tmr->sht_timers, timer, link);
- }
- }
-
- if ((int32_t)(tick - hal_timer_cnt(tmr)) <= 0) {
- /*
- * Event in the past (should be the case if it was just inserted).
- */
- tmr->sht_regs->EGR |= TIM_EGR_CC1G;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- } else {
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- tmr->sht_regs->CCR1 = timer->expiry;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return 0;
-}
-
-/**
- * hal_timer_stop()
- *
- * Cancels the timer.
- *
- * @param timer
- *
- * @return int
- */
-int
-hal_timer_stop(struct hal_timer *timer)
-{
- struct stm32l1_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
- int reset_ocmp;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- tmr = (struct stm32l1_hal_tmr *)timer->bsp_timer;
- if (timer->link.tqe_prev != NULL) {
- reset_ocmp = 0;
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- /* If first on queue, we will need to reset OCMP */
- ht = TAILQ_NEXT(timer, link);
- reset_ocmp = 1;
- }
- TAILQ_REMOVE(&tmr->sht_timers, timer, link);
- timer->link.tqe_prev = NULL;
- if (reset_ocmp) {
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1,
- TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return 0;
-}
-#endif
diff --git a/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h
index 01c64f1e0..18edb52a6 100644
--- a/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h
@@ -68,6 +68,11 @@ struct stm32_hal_spi_cfg {
#include "stm32f3xx_hal_uart.h"
#include "mcu/stm32f3_bsp.h"
+/* hal_timer */
+#include "stm32f3xx_hal_tim.h"
+
+#define STM32_HAL_TIMER_MAX (3)
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32f3xx/src/hal_timer.c b/hw/mcu/stm/stm32f3xx/src/hal_timer.c
deleted file mode 100644
index 4f9768089..000000000
--- a/hw/mcu/stm/stm32f3xx/src/hal_timer.c
+++ /dev/null
@@ -1,665 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <inttypes.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <mcu/cmsis_nvic.h>
-#include <hal/hal_timer.h>
-
-#include "stm32f3xx.h"
-#include "stm32f3xx_hal.h"
-#include "stm32f3xx_hal_dma.h"
-#include "stm32f3xx_hal_tim.h"
-#include "stm32f3xx_hal_rcc.h"
-
-#include "mcu/stm32f3xx_mynewt_hal.h"
-
-#define STM32F3_HAL_TIMER_MAX (2)
-#define STM32F3_OFLOW_VALUE (0x10000UL)
-#define STM32F3_NSEC_PER_SEC (1000000000UL)
-
-struct stm32f3_hal_tmr {
- TIM_TypeDef *sht_regs; /* Pointer to timer registers */
- uint32_t sht_oflow; /* 16 bits of overflow to make timer 32bits */
- TAILQ_HEAD(hal_timer_qhead, hal_timer) sht_timers;
-};
-
-#if MYNEWT_VAL(TIMER_0)
-struct stm32f3_hal_tmr stm32f3_tmr0;
-#endif
-#if MYNEWT_VAL(TIMER_1)
-struct stm32f3_hal_tmr stm32f3_tmr1;
-#endif
-
-static struct stm32f3_hal_tmr *stm32f3_tmr_devs[STM32F3_HAL_TIMER_MAX] = {
-#if MYNEWT_VAL(TIMER_0)
- &stm32f3_tmr0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(TIMER_1)
- &stm32f3_tmr1,
-#else
- NULL,
-#endif
-};
-
-static uint32_t hal_timer_cnt(struct stm32f3_hal_tmr *tmr);
-
-#if (MYNEWT_VAL(TIMER_0) || MYNEWT_VAL(TIMER_1))
-/*
- * Call expired timer callbacks, and reprogram timer with new expiry time.
- */
-static void
-stm32f3_tmr_cbs(struct stm32f3_hal_tmr *tmr)
-{
- uint32_t cnt;
- struct hal_timer *ht;
-
- while ((ht = TAILQ_FIRST(&tmr->sht_timers)) != NULL) {
- cnt = hal_timer_cnt(tmr);
- if (((int32_t)(cnt - ht->expiry)) >= 0) {
- TAILQ_REMOVE(&tmr->sht_timers, ht, link);
- ht->link.tqe_prev = NULL;
- ht->cb_func(ht->cb_arg);
- } else {
- break;
- }
- }
- ht = TAILQ_FIRST(&tmr->sht_timers);
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
-}
-
-/*
- * timer irq handler
- *
- * Generic HAL timer irq handler.
- *
- * @param tmr
- */
-static void
-stm32f3_tmr_irq(struct stm32f3_hal_tmr *tmr)
-{
- uint32_t sr;
- uint32_t clr = 0;
-
- sr = tmr->sht_regs->SR;
- if (sr & TIM_SR_UIF) {
- /*
- * Overflow interrupt
- */
- tmr->sht_oflow += STM32F3_OFLOW_VALUE;
- clr |= TIM_SR_UIF;
- }
- if (sr & TIM_SR_CC1IF) {
- /*
- * Capture event
- */
- clr |= TIM_SR_CC1IF;
- stm32f3_tmr_cbs(tmr);
- }
-
- tmr->sht_regs->SR = ~clr;
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_0)
-static void
-stm32f3_tmr0_irq(void)
-{
- stm32f3_tmr_irq(&stm32f3_tmr0);
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_1)
-static void
-stm32f3_tmr1_irq(void)
-{
- stm32f3_tmr_irq(&stm32f3_tmr1);
-}
-#endif
-
-static void
-stm32f3_tmr_reg_irq(IRQn_Type irqn, uint32_t func)
-{
- NVIC_SetPriority(irqn, (1 << __NVIC_PRIO_BITS) - 1);
- NVIC_SetVector(irqn, func);
- NVIC_EnableIRQ(irqn);
-}
-
-static uint32_t
-stm32f3_base_freq(TIM_TypeDef *regs)
-{
- RCC_ClkInitTypeDef clocks;
- uint32_t fl;
- uint32_t freq;
-
- HAL_RCC_GetClockConfig(&clocks, &fl);
-
- /*
- * Assuming RCC_DCKCFGR->TIMPRE is 0.
- * There's just APB2 timers here.
- */
- switch ((uint32_t)regs) {
-#ifdef TIM1
- case (uint32_t)TIM1:
-#endif
-#ifdef TIM8
- case (uint32_t)TIM8:
-#endif
-#ifdef TIM15
- case (uint32_t)TIM15:
-#endif
-#ifdef TIM16
- case (uint32_t)TIM16:
-#endif
-#ifdef TIM17
- case (uint32_t)TIM17:
-#endif
- freq = HAL_RCC_GetPCLK2Freq();
- if (clocks.APB2CLKDivider) {
- freq *= 2;
- }
- break;
- default:
- return 0;
- }
- return freq;
-}
-
-static void
-stm32f3_hw_setup(int num, TIM_TypeDef *regs)
-{
- uint32_t func;
-
- switch (num) {
-#if MYNEWT_VAL(TIMER_0)
- case 0:
- func = (uint32_t)stm32f3_tmr0_irq;
- break;
-#endif
-#if MYNEWT_VAL(TIMER_1)
- case 1:
- func = (uint32_t)stm32f3_tmr1_irq;
- break;
-#endif
- default:
- assert(0);
- return;
- }
-
-#ifdef TIM1
- if (regs == TIM1) {
- stm32f3_tmr_reg_irq(TIM1_CC_IRQn, func);
- stm32f3_tmr_reg_irq(TIM1_UP_TIM16_IRQn, func);
- __HAL_RCC_TIM1_CLK_ENABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- stm32f3_tmr_reg_irq(TIM8_CC_IRQn, func);
- stm32f3_tmr_reg_irq(TIM8_UP_IRQn, func);
- __HAL_RCC_TIM8_CLK_ENABLE();
- }
-#endif
-#ifdef TIM15
- if (regs == TIM15) {
- stm32f3_tmr_reg_irq(TIM1_BRK_TIM15_IRQn, func);
- __HAL_RCC_TIM15_CLK_ENABLE();
- }
-#endif
-#ifdef TIM16
- if (regs == TIM16) {
- stm32f3_tmr_reg_irq(TIM1_UP_TIM16_IRQn, func);
- __HAL_RCC_TIM16_CLK_ENABLE();
- }
-#endif
-#ifdef TIM17
- if (regs == TIM17) {
- stm32f3_tmr_reg_irq(TIM1_TRG_COM_TIM17_IRQn, func);
- __HAL_RCC_TIM17_CLK_ENABLE();
- }
-#endif
-}
-
-static void
-stm32f3_hw_setdown(TIM_TypeDef *regs)
-{
-#ifdef TIM1
- if (regs == TIM1) {
- __HAL_RCC_TIM1_CLK_DISABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- __HAL_RCC_TIM8_CLK_DISABLE();
- }
-#endif
-#ifdef TIM15
- if (regs == TIM15) {
- __HAL_RCC_TIM15_CLK_DISABLE();
- }
-#endif
-#ifdef TIM16
- if (regs == TIM16) {
- __HAL_RCC_TIM16_CLK_DISABLE();
- }
-#endif
-#ifdef TIM17
- if (regs == TIM17) {
- __HAL_RCC_TIM17_CLK_DISABLE();
- }
-#endif
-}
-
-/**
- * hal timer init
- *
- * Initialize platform specific timer items
- *
- * @param timer_num Timer number to initialize
- * @param cfg Pointer to platform specific configuration
- *
- * @return int 0: success; error code otherwise
- */
-int
-hal_timer_init(int num, void *cfg)
-{
- TIM_TypeDef *regs;
- struct stm32f3_hal_tmr *tmr;
-
- if (num >= STM32F3_HAL_TIMER_MAX || !(tmr = stm32f3_tmr_devs[num]) ||
- (cfg == NULL)) {
- return -1;
- }
-
- regs = (TIM_TypeDef *)cfg;
- tmr->sht_regs = regs;
-
- if (!IS_TIM_CC1_INSTANCE(regs)) {
- return -1;
- }
-
- stm32f3_hw_setup(num, regs);
-
- /*
- * Stop the timers at debugger.
- */
-#ifdef TIM1
- if (regs == TIM1) {
- __HAL_DBGMCU_FREEZE_TIM1();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- __HAL_DBGMCU_FREEZE_TIM8();
- }
-#endif
-#ifdef TIM15
- if (regs == TIM15) {
- __HAL_DBGMCU_FREEZE_TIM15();
- }
-#endif
-#ifdef TIM16
- if (regs == TIM16) {
- __HAL_DBGMCU_FREEZE_TIM16();
- }
-#endif
-#ifdef TIM17
- if (regs == TIM17) {
- __HAL_DBGMCU_FREEZE_TIM17();
- }
-#endif
-
- return 0;
-}
-
-/**
- * hal timer config
- *
- * Configure a timer to run at the desired frequency. This starts the timer.
- *
- * @param timer_num
- * @param freq_hz
- *
- * @return int
- */
-int
-hal_timer_config(int num, uint32_t freq_hz)
-{
- struct stm32f3_hal_tmr *tmr;
- TIM_Base_InitTypeDef init;
- uint32_t prescaler;
-
- if (num >= STM32F3_HAL_TIMER_MAX || !(tmr = stm32f3_tmr_devs[num])) {
- return -1;
- }
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
- return -1;
- }
-
- prescaler = stm32f3_base_freq(tmr->sht_regs) / freq_hz;
- if (prescaler > 0xffff) {
- return -1;
- }
-
- memset(&init, 0, sizeof(init));
- init.Period = 0xffff;
- init.Prescaler = prescaler;
- init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- init.CounterMode = TIM_COUNTERMODE_UP;
-
- /*
- * Set up to count overflow interrupts.
- */
- tmr->sht_regs->CR1 = TIM_CR1_URS;
- tmr->sht_regs->DIER = TIM_DIER_UIE;
-
- TIM_Base_SetConfig(tmr->sht_regs, &init);
-
- tmr->sht_regs->SR = 0;
- tmr->sht_regs->CR1 |= TIM_CR1_CEN;
-
- return 0;
-}
-
-/**
- * hal timer deinit
- *
- * De-initialize a HW timer.
- *
- * @param timer_num
- *
- * @return int
- */
-int
-hal_timer_deinit(int num)
-{
- struct stm32f3_hal_tmr *tmr;
- int sr;
-
- if (num >= STM32F3_HAL_TIMER_MAX || !(tmr = stm32f3_tmr_devs[num])) {
- return -1;
- }
-
- __HAL_DISABLE_INTERRUPTS(sr);
- /*
- * Turn off CC1, and then turn off the timer.
- */
- tmr->sht_regs->CR1 &= ~TIM_CR1_CEN;
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- __HAL_ENABLE_INTERRUPTS(sr);
- stm32f3_hw_setdown(tmr->sht_regs);
-
- return 0;
-}
-
-/**
- * hal timer get resolution
- *
- * Get the resolution of the timer. This is the timer period, in nanoseconds
- *
- * @param timer_num
- *
- * @return uint32_t
- */
-uint32_t
-hal_timer_get_resolution(int num)
-{
- struct stm32f3_hal_tmr *tmr;
-
- if (num >= STM32F3_HAL_TIMER_MAX || !(tmr = stm32f3_tmr_devs[num])) {
- return -1;
- }
- return (STM32F3_NSEC_PER_SEC / (SystemCoreClock / tmr->sht_regs->PSC));
-}
-
-static uint32_t
-hal_timer_cnt(struct stm32f3_hal_tmr *tmr)
-{
- uint32_t cnt;
- int sr;
-
- __HAL_DISABLE_INTERRUPTS(sr);
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT;
- if (tmr->sht_regs->SR & TIM_SR_UIF) {
- /*
- * Just overflowed
- */
- cnt += STM32F3_OFLOW_VALUE;
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return cnt;
-}
-
-/**
- * hal timer read
- *
- * Returns the timer counter. NOTE: if the timer is a 16-bit timer, only
- * the lower 16 bits are valid. If the timer is a 64-bit timer, only the
- * low 32-bits are returned.
- *
- * @return uint32_t The timer counter register.
- */
-uint32_t
-hal_timer_read(int num)
-{
- struct stm32f3_hal_tmr *tmr;
-
- if (num >= STM32F3_HAL_TIMER_MAX || !(tmr = stm32f3_tmr_devs[num])) {
- return -1;
- }
- return hal_timer_cnt(tmr);
-}
-
-/**
- * hal timer delay
- *
- * Blocking delay for n ticks
- *
- * @param timer_num
- * @param ticks
- *
- * @return int 0 on success; error code otherwise.
- */
-int
-hal_timer_delay(int num, uint32_t ticks)
-{
- struct stm32f3_hal_tmr *tmr;
- uint32_t until;
-
- if (num >= STM32F3_HAL_TIMER_MAX || !(tmr = stm32f3_tmr_devs[num])) {
- return -1;
- }
-
- until = hal_timer_cnt(tmr) + ticks;
- while ((int32_t)(hal_timer_cnt(tmr) - until) <= 0) {
- ;
- }
- return 0;
-}
-
-/**
- *
- * Initialize the HAL timer structure with the callback and the callback
- * argument. Also initializes the HW specific timer pointer.
- *
- * @param cb_func
- *
- * @return int
- */
-int
-hal_timer_set_cb(int num, struct hal_timer *timer, hal_timer_cb cb_func,
- void *arg)
-{
- struct stm32f3_hal_tmr *tmr;
-
- if (num >= STM32F3_HAL_TIMER_MAX || !(tmr = stm32f3_tmr_devs[num])) {
- return -1;
- }
-
- /* make sure user doesn't use timer already in use */
- if (timer->link.tqe_prev != NULL) {
- return -1;
- }
-
- timer->cb_func = cb_func;
- timer->cb_arg = arg;
- timer->bsp_timer = tmr;
-
- return 0;
-}
-
-/**
- * hal_timer_start()
- *
- * Start a timer. Timer fires 'ticks' ticks from now.
- *
- * @param timer
- * @param ticks
- *
- * @return int
- */
-int
-hal_timer_start(struct hal_timer *timer, uint32_t ticks)
-{
- struct stm32f3_hal_tmr *tmr;
- uint32_t tick;
-
- tmr = (struct stm32f3_hal_tmr *)timer->bsp_timer;
-
- tick = ticks + hal_timer_cnt(tmr);
- return hal_timer_start_at(timer, tick);
-}
-
-/**
- * hal_timer_start_at()
- *
- * Start a timer. Timer fires at tick 'tick'.
- *
- * @param timer
- * @param tick
- *
- * @return int
- */
-int
-hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
-{
- struct stm32f3_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
- int rc;
-
- if (timer->link.tqe_prev == NULL) {
- tmr = (struct stm32f3_hal_tmr *)timer->bsp_timer;
-
- timer->expiry = tick;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- if (TAILQ_EMPTY(&tmr->sht_timers)) {
- TAILQ_INSERT_HEAD(&tmr->sht_timers, timer, link);
- } else {
- TAILQ_FOREACH(ht, &tmr->sht_timers, link) {
- if ((int32_t)(timer->expiry - ht->expiry) < 0) {
- TAILQ_INSERT_BEFORE(ht, timer, link);
- break;
- }
- }
- if (!ht) {
- TAILQ_INSERT_TAIL(&tmr->sht_timers, timer, link);
- }
- }
-
- if ((int32_t)(tick - hal_timer_cnt(tmr)) <= 0) {
- /*
- * Event in the past (should be the case if it was just inserted).
- */
- tmr->sht_regs->EGR |= TIM_EGR_CC1G;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- } else {
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- tmr->sht_regs->CCR1 = timer->expiry;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
- rc = 0;
- } else {
- rc = -1;
- }
-
- return rc;
-}
-
-/**
- * hal_timer_stop()
- *
- * Cancels the timer.
- *
- * @param timer
- *
- * @return int
- */
-int
-hal_timer_stop(struct hal_timer *timer)
-{
- struct stm32f3_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
- int reset_ocmp;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- tmr = (struct stm32f3_hal_tmr *)timer->bsp_timer;
- if (timer->link.tqe_prev != NULL) {
- reset_ocmp = 0;
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- /* If first on queue, we will need to reset OCMP */
- ht = TAILQ_NEXT(timer, link);
- reset_ocmp = 1;
- }
- TAILQ_REMOVE(&tmr->sht_timers, timer, link);
- timer->link.tqe_prev = NULL;
- if (reset_ocmp) {
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1,
- TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return 0;
-}
diff --git a/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h
index 3ae59e719..0eb8ecec2 100644
--- a/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h
@@ -66,6 +66,11 @@ struct stm32_hal_spi_cfg {
#include "stm32f4xx_hal_uart.h"
#include "mcu/stm32f4_bsp.h"
+/* hal_timer */
+#include "stm32f4xx_hal_tim.h"
+
+#define STM32_HAL_TIMER_MAX (3)
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32f4xx/src/hal_timer.c b/hw/mcu/stm/stm32f4xx/src/hal_timer.c
deleted file mode 100644
index 8923a22bf..000000000
--- a/hw/mcu/stm/stm32f4xx/src/hal_timer.c
+++ /dev/null
@@ -1,626 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <inttypes.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <mcu/cmsis_nvic.h>
-#include <hal/hal_timer.h>
-
-#include "stm32f4xx.h"
-#include "stm32f4xx_hal_dma.h"
-#include "stm32f4xx_hal_tim.h"
-#include "stm32f4xx_hal_rcc.h"
-
-#include "mcu/stm32f4xx_mynewt_hal.h"
-
-#define STM32F4_HAL_TIMER_MAX (2)
-
-struct stm32f4_hal_tmr {
- TIM_TypeDef *sht_regs; /* Pointer to timer registers */
- uint32_t sht_oflow; /* 16 bits of overflow to make timer 32bits */
- TAILQ_HEAD(hal_timer_qhead, hal_timer) sht_timers;
-};
-
-#if MYNEWT_VAL(TIMER_0)
-struct stm32f4_hal_tmr stm32f4_tmr0;
-#endif
-#if MYNEWT_VAL(TIMER_1)
-struct stm32f4_hal_tmr stm32f4_tmr1;
-#endif
-
-static struct stm32f4_hal_tmr *stm32f4_tmr_devs[STM32F4_HAL_TIMER_MAX] = {
-#if MYNEWT_VAL(TIMER_0)
- &stm32f4_tmr0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(TIMER_1)
- &stm32f4_tmr1,
-#else
- NULL,
-#endif
-};
-
-static uint32_t hal_timer_cnt(struct stm32f4_hal_tmr *tmr);
-
-#if (MYNEWT_VAL(TIMER_0) || MYNEWT_VAL(TIMER_1))
-/*
- * Call expired timer callbacks, and reprogram timer with new expiry time.
- */
-static void
-stm32f4_tmr_cbs(struct stm32f4_hal_tmr *tmr)
-{
- uint32_t cnt;
- struct hal_timer *ht;
-
- while ((ht = TAILQ_FIRST(&tmr->sht_timers)) != NULL) {
- cnt = hal_timer_cnt(tmr);
- if (((int32_t)(cnt - ht->expiry)) >= 0) {
- TAILQ_REMOVE(&tmr->sht_timers, ht, link);
- ht->link.tqe_prev = NULL;
- ht->cb_func(ht->cb_arg);
- } else {
- break;
- }
- }
- ht = TAILQ_FIRST(&tmr->sht_timers);
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
-}
-
-/*
- * timer irq handler
- *
- * Generic HAL timer irq handler.
- *
- * @param tmr
- */
-static void
-stm32f4_tmr_irq(struct stm32f4_hal_tmr *tmr)
-{
- uint32_t sr;
- uint32_t clr = 0;
-
- sr = tmr->sht_regs->SR;
- if (sr & TIM_SR_UIF) {
- /*
- * Overflow interrupt
- */
- tmr->sht_oflow += 0x10000;
- clr |= TIM_SR_UIF;
- }
- if (sr & TIM_SR_CC1IF) {
- /*
- * Capture event
- */
- clr |= TIM_SR_CC1IF;
- stm32f4_tmr_cbs(tmr);
- }
-
- tmr->sht_regs->SR = ~clr;
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_0)
-static void
-stm32f4_tmr0_irq(void)
-{
- stm32f4_tmr_irq(&stm32f4_tmr0);
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_1)
-static void
-stm32f4_tmr1_irq(void)
-{
- stm32f4_tmr_irq(&stm32f4_tmr1);
-}
-#endif
-
-static void
-stm32f4_tmr_reg_irq(IRQn_Type irqn, uint32_t func)
-{
- NVIC_SetPriority(irqn, (1 << __NVIC_PRIO_BITS) - 1);
- NVIC_SetVector(irqn, func);
- NVIC_EnableIRQ(irqn);
-}
-
-static uint32_t
-stm32f4_base_freq(TIM_TypeDef *regs)
-{
- RCC_ClkInitTypeDef clocks;
- uint32_t fl;
- uint32_t freq;
-
- HAL_RCC_GetClockConfig(&clocks, &fl);
-
- /*
- * Assuming RCC_DCKCFGR->TIMPRE is 0.
- * There's just APB2 timers here.
- */
- switch ((uint32_t)regs) {
-#ifdef TIM1
- case (uint32_t)TIM1:
-#endif
-#ifdef TIM8
- case (uint32_t)TIM8:
-#endif
-#ifdef TIM9
- case (uint32_t)TIM9:
-#endif
-#ifdef TIM10
- case (uint32_t)TIM10:
-#endif
-#ifdef TIM11
- case (uint32_t)TIM11:
-#endif
- freq = HAL_RCC_GetPCLK2Freq();
- if (clocks.APB2CLKDivider) {
- freq *= 2;
- }
- break;
- default:
- return 0;
- }
- return freq;
-}
-
-static void
-stm32f4_hw_setup(int num, TIM_TypeDef *regs)
-{
- uint32_t func;
-
- switch (num) {
-#if MYNEWT_VAL(TIMER_0)
- case 0:
- func = (uint32_t)stm32f4_tmr0_irq;
- break;
-#endif
-#if MYNEWT_VAL(TIMER_1)
- case 1:
- func = (uint32_t)stm32f4_tmr1_irq;
- break;
-#endif
- default:
- assert(0);
- return;
- }
-
-#ifdef TIM1
- if (regs == TIM1) {
- stm32f4_tmr_reg_irq(TIM1_CC_IRQn, func);
- stm32f4_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
- __HAL_RCC_TIM1_CLK_ENABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- stm32f4_tmr_reg_irq(TIM8_CC_IRQn, func);
- stm32f4_tmr_reg_irq(TIM8_UP_TIM13_IRQn, func);
- __HAL_RCC_TIM8_CLK_ENABLE();
- }
-#endif
-#ifdef TIM9
- if (regs == TIM9) {
- stm32f4_tmr_reg_irq(TIM1_BRK_TIM9_IRQn, func);
- __HAL_RCC_TIM9_CLK_ENABLE();
- }
-#endif
-#ifdef TIM10
- if (regs == TIM10) {
- stm32f4_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
- __HAL_RCC_TIM10_CLK_ENABLE();
- }
-#endif
-#ifdef TIM11
- if (regs == TIM11) {
- stm32f4_tmr_reg_irq(TIM1_TRG_COM_TIM11_IRQn, func);
- __HAL_RCC_TIM11_CLK_ENABLE();
- }
-#endif
-}
-
-static void
-stm32f4_hw_setdown(TIM_TypeDef *regs)
-{
-#ifdef TIM1
- if (regs == TIM1) {
- __HAL_RCC_TIM1_CLK_DISABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- __HAL_RCC_TIM8_CLK_DISABLE();
- }
-#endif
-#ifdef TIM9
- if (regs == TIM9) {
- __HAL_RCC_TIM9_CLK_DISABLE();
- }
-#endif
-#ifdef TIM10
- if (regs == TIM10) {
- __HAL_RCC_TIM10_CLK_DISABLE();
- }
-#endif
-#ifdef TIM11
- if (regs == TIM11) {
- __HAL_RCC_TIM11_CLK_DISABLE();
- }
-#endif
-}
-
-/**
- * hal timer init
- *
- * Initialize platform specific timer items
- *
- * @param timer_num Timer number to initialize
- * @param cfg Pointer to platform specific configuration
- *
- * @return int 0: success; error code otherwise
- */
-int
-hal_timer_init(int num, void *cfg)
-{
- struct stm32f4_hal_tmr *tmr;
-
- if (num >= STM32F4_HAL_TIMER_MAX || !(tmr = stm32f4_tmr_devs[num]) ||
- (cfg == NULL)) {
- return -1;
- }
-
- tmr->sht_regs = (TIM_TypeDef *)cfg;
-
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
- return -1;
- }
-
- stm32f4_hw_setup(num, tmr->sht_regs);
-
- /*
- * Stop the timers at debugger. XXX Which TIM?
- */
- DBGMCU->APB1FZ |= 0x1ff; /* TIM2 - TIM7, TIM12-TIM14 */
- DBGMCU->APB2FZ |= 0x70003; /* TIM1, TIM8-TIM11 */
-
- return 0;
-}
-
-/**
- * hal timer config
- *
- * Configure a timer to run at the desired frequency. This starts the timer.
- *
- * @param timer_num
- * @param freq_hz
- *
- * @return int
- */
-int
-hal_timer_config(int num, uint32_t freq_hz)
-{
- struct stm32f4_hal_tmr *tmr;
- TIM_Base_InitTypeDef init;
- uint32_t prescaler;
-
- if (num >= STM32F4_HAL_TIMER_MAX || !(tmr = stm32f4_tmr_devs[num])) {
- return -1;
- }
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
- return -1;
- }
-
- prescaler = stm32f4_base_freq(tmr->sht_regs) / freq_hz;
- if (prescaler > 0xffff) {
- return -1;
- }
-
- memset(&init, 0, sizeof(init));
- init.Period = 0xffff;
- init.Prescaler = prescaler;
- init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- init.CounterMode = TIM_COUNTERMODE_UP;
-
- /*
- * Set up to count overflow interrupts.
- */
- tmr->sht_regs->CR1 = TIM_CR1_URS;
- tmr->sht_regs->DIER = TIM_DIER_UIE;
-
- TIM_Base_SetConfig(tmr->sht_regs, &init);
-
- tmr->sht_regs->SR = 0;
- tmr->sht_regs->CR1 |= TIM_CR1_CEN;
-
- return 0;
-}
-
-/**
- * hal timer deinit
- *
- * De-initialize a HW timer.
- *
- * @param timer_num
- *
- * @return int
- */
-int
-hal_timer_deinit(int num)
-{
- struct stm32f4_hal_tmr *tmr;
- int sr;
-
- if (num >= STM32F4_HAL_TIMER_MAX || !(tmr = stm32f4_tmr_devs[num])) {
- return -1;
- }
-
- __HAL_DISABLE_INTERRUPTS(sr);
- /*
- * Turn off CC1, and then turn off the timer.
- */
- tmr->sht_regs->CR1 &= ~TIM_CR1_CEN;
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- __HAL_ENABLE_INTERRUPTS(sr);
- stm32f4_hw_setdown(tmr->sht_regs);
-
- return 0;
-}
-
-/**
- * hal timer get resolution
- *
- * Get the resolution of the timer. This is the timer period, in nanoseconds
- *
- * @param timer_num
- *
- * @return uint32_t
- */
-uint32_t
-hal_timer_get_resolution(int num)
-{
- struct stm32f4_hal_tmr *tmr;
-
- if (num >= STM32F4_HAL_TIMER_MAX || !(tmr = stm32f4_tmr_devs[num])) {
- return -1;
- }
- return (1000000000 / (SystemCoreClock / tmr->sht_regs->PSC));
-}
-
-static uint32_t
-hal_timer_cnt(struct stm32f4_hal_tmr *tmr)
-{
- uint32_t cnt;
- int sr;
-
- __HAL_DISABLE_INTERRUPTS(sr);
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT;
- if (tmr->sht_regs->SR & TIM_SR_UIF) {
- /*
- * Just overflowed
- */
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT + 0x10000;
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return cnt;
-}
-
-/**
- * hal timer read
- *
- * Returns the timer counter. NOTE: if the timer is a 16-bit timer, only
- * the lower 16 bits are valid. If the timer is a 64-bit timer, only the
- * low 32-bits are returned.
- *
- * @return uint32_t The timer counter register.
- */
-uint32_t
-hal_timer_read(int num)
-{
- struct stm32f4_hal_tmr *tmr;
-
- if (num >= STM32F4_HAL_TIMER_MAX || !(tmr = stm32f4_tmr_devs[num])) {
- return -1;
- }
- return hal_timer_cnt(tmr);
-}
-
-/**
- * hal timer delay
- *
- * Blocking delay for n ticks
- *
- * @param timer_num
- * @param ticks
- *
- * @return int 0 on success; error code otherwise.
- */
-int
-hal_timer_delay(int num, uint32_t ticks)
-{
- struct stm32f4_hal_tmr *tmr;
- uint32_t until;
-
- if (num >= STM32F4_HAL_TIMER_MAX || !(tmr = stm32f4_tmr_devs[num])) {
- return -1;
- }
-
- until = hal_timer_cnt(tmr) + ticks;
- while ((int32_t)(hal_timer_cnt(tmr) - until) <= 0) {
- ;
- }
- return 0;
-}
-
-/**
- *
- * Initialize the HAL timer structure with the callback and the callback
- * argument. Also initializes the HW specific timer pointer.
- *
- * @param cb_func
- *
- * @return int
- */
-int
-hal_timer_set_cb(int num, struct hal_timer *timer, hal_timer_cb cb_func,
- void *arg)
-{
- struct stm32f4_hal_tmr *tmr;
-
- if (num >= STM32F4_HAL_TIMER_MAX || !(tmr = stm32f4_tmr_devs[num])) {
- return -1;
- }
- timer->cb_func = cb_func;
- timer->cb_arg = arg;
- timer->bsp_timer = tmr;
- timer->link.tqe_prev = NULL;
-
- return 0;
-}
-
-/**
- * hal_timer_start()
- *
- * Start a timer. Timer fires 'ticks' ticks from now.
- *
- * @param timer
- * @param ticks
- *
- * @return int
- */
-int
-hal_timer_start(struct hal_timer *timer, uint32_t ticks)
-{
- struct stm32f4_hal_tmr *tmr;
- uint32_t tick;
-
- tmr = (struct stm32f4_hal_tmr *)timer->bsp_timer;
-
- tick = ticks + hal_timer_cnt(tmr);
- return hal_timer_start_at(timer, tick);
-}
-
-/**
- * hal_timer_start_at()
- *
- * Start a timer. Timer fires at tick 'tick'.
- *
- * @param timer
- * @param tick
- *
- * @return int
- */
-int
-hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
-{
- struct stm32f4_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
-
- tmr = (struct stm32f4_hal_tmr *)timer->bsp_timer;
-
- timer->expiry = tick;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- if (TAILQ_EMPTY(&tmr->sht_timers)) {
- TAILQ_INSERT_HEAD(&tmr->sht_timers, timer, link);
- } else {
- TAILQ_FOREACH(ht, &tmr->sht_timers, link) {
- if ((int32_t)(timer->expiry - ht->expiry) < 0) {
- TAILQ_INSERT_BEFORE(ht, timer, link);
- break;
- }
- }
- if (!ht) {
- TAILQ_INSERT_TAIL(&tmr->sht_timers, timer, link);
- }
- }
-
- if ((int32_t)(tick - hal_timer_cnt(tmr)) <= 0) {
- /*
- * Event in the past (should be the case if it was just inserted).
- */
- tmr->sht_regs->EGR |= TIM_EGR_CC1G;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- } else {
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- tmr->sht_regs->CCR1 = timer->expiry;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return 0;
-}
-
-/**
- * hal_timer_stop()
- *
- * Cancels the timer.
- *
- * @param timer
- *
- * @return int
- */
-int
-hal_timer_stop(struct hal_timer *timer)
-{
- struct stm32f4_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
- int reset_ocmp;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- tmr = (struct stm32f4_hal_tmr *)timer->bsp_timer;
- if (timer->link.tqe_prev != NULL) {
- reset_ocmp = 0;
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- /* If first on queue, we will need to reset OCMP */
- ht = TAILQ_NEXT(timer, link);
- reset_ocmp = 1;
- }
- TAILQ_REMOVE(&tmr->sht_timers, timer, link);
- timer->link.tqe_prev = NULL;
- if (reset_ocmp) {
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1,
- TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return 0;
-}
diff --git a/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h
index 4f14266c7..3fa0ccb81 100644
--- a/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h
@@ -70,6 +70,11 @@ struct stm32_hal_spi_cfg {
#include "stm32f7xx_hal_uart.h"
#include "mcu/stm32f7_bsp.h"
+/* hal_timer */
+#include "stm32f7xx_hal_tim.h"
+
+#define STM32_HAL_TIMER_MAX (3)
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h
index eeaae0954..d618d4d0e 100644
--- a/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h
@@ -66,6 +66,11 @@ struct stm32_hal_spi_cfg {
#include "stm32l1xx_hal_uart.h"
#include "mcu/stm32l1_bsp.h"
+/* hal_timer */
+#include "stm32l1xx_hal_tim.h"
+
+#define STM32_HAL_TIMER_MAX (3)
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32l1xx/src/hal_timer.c b/hw/mcu/stm/stm32l1xx/src/hal_timer.c
deleted file mode 100644
index e5c4eb310..000000000
--- a/hw/mcu/stm/stm32l1xx/src/hal_timer.c
+++ /dev/null
@@ -1,626 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <inttypes.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <mcu/cmsis_nvic.h>
-#include <hal/hal_timer.h>
-
-#include "stm32l1xx.h"
-#include "stm32l1xx_hal_dma.h"
-#include "stm32l1xx_hal_tim.h"
-#include "stm32l1xx_hal_rcc.h"
-
-#include "mcu/stm32l1xx_mynewt_hal.h"
-
-#define STM32L1_HAL_TIMER_MAX (2)
-
-struct stm32l1_hal_tmr {
- TIM_TypeDef *sht_regs; /* Pointer to timer registers */
- uint32_t sht_oflow; /* 16 bits of overflow to make timer 32bits */
- TAILQ_HEAD(hal_timer_qhead, hal_timer) sht_timers;
-};
-
-#if MYNEWT_VAL(TIMER_0)
-struct stm32l1_hal_tmr stm32l1_tmr0;
-#endif
-#if MYNEWT_VAL(TIMER_1)
-struct stm32l1_hal_tmr stm32l1_tmr1;
-#endif
-
-static struct stm32l1_hal_tmr *stm32l1_tmr_devs[STM32L1_HAL_TIMER_MAX] = {
-#if MYNEWT_VAL(TIMER_0)
- &stm32l1_tmr0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(TIMER_1)
- &stm32l1_tmr1,
-#else
- NULL,
-#endif
-};
-
-static uint32_t hal_timer_cnt(struct stm32l1_hal_tmr *tmr);
-
-#if (MYNEWT_VAL(TIMER_0) || MYNEWT_VAL(TIMER_1))
-/*
- * Call expired timer callbacks, and reprogram timer with new expiry time.
- */
-static void
-stm32l1_tmr_cbs(struct stm32l1_hal_tmr *tmr)
-{
- uint32_t cnt;
- struct hal_timer *ht;
-
- while ((ht = TAILQ_FIRST(&tmr->sht_timers)) != NULL) {
- cnt = hal_timer_cnt(tmr);
- if (((int32_t)(cnt - ht->expiry)) >= 0) {
- TAILQ_REMOVE(&tmr->sht_timers, ht, link);
- ht->link.tqe_prev = NULL;
- ht->cb_func(ht->cb_arg);
- } else {
- break;
- }
- }
- ht = TAILQ_FIRST(&tmr->sht_timers);
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
-}
-
-/*
- * timer irq handler
- *
- * Generic HAL timer irq handler.
- *
- * @param tmr
- */
-static void
-stm32l1_tmr_irq(struct stm32l1_hal_tmr *tmr)
-{
- uint32_t sr;
- uint32_t clr = 0;
-
- sr = tmr->sht_regs->SR;
- if (sr & TIM_SR_UIF) {
- /*
- * Overflow interrupt
- */
- tmr->sht_oflow += 0x10000;
- clr |= TIM_SR_UIF;
- }
- if (sr & TIM_SR_CC1IF) {
- /*
- * Capture event
- */
- clr |= TIM_SR_CC1IF;
- stm32l1_tmr_cbs(tmr);
- }
-
- tmr->sht_regs->SR = ~clr;
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_0)
-static void
-stm32l1_tmr0_irq(void)
-{
- stm32l1_tmr_irq(&stm32l1_tmr0);
-}
-#endif
-
-#if MYNEWT_VAL(TIMER_1)
-static void
-stm32l1_tmr1_irq(void)
-{
- stm32l1_tmr_irq(&stm32l1_tmr1);
-}
-#endif
-
-static void
-stm32l1_tmr_reg_irq(IRQn_Type irqn, uint32_t func)
-{
- NVIC_SetPriority(irqn, (1 << __NVIC_PRIO_BITS) - 1);
- NVIC_SetVector(irqn, func);
- NVIC_EnableIRQ(irqn);
-}
-
-static uint32_t
-stm32l1_base_freq(TIM_TypeDef *regs)
-{
- RCC_ClkInitTypeDef clocks;
- uint32_t fl;
- uint32_t freq;
-
- HAL_RCC_GetClockConfig(&clocks, &fl);
-
- /*
- * Assuming RCC_DCKCFGR->TIMPRE is 0.
- * There's just APB2 timers here.
- */
- switch ((uint32_t)regs) {
-#ifdef TIM1
- case (uint32_t)TIM1:
-#endif
-#ifdef TIM8
- case (uint32_t)TIM8:
-#endif
-#ifdef TIM9
- case (uint32_t)TIM9:
-#endif
-#ifdef TIM10
- case (uint32_t)TIM10:
-#endif
-#ifdef TIM11
- case (uint32_t)TIM11:
-#endif
- freq = HAL_RCC_GetPCLK2Freq();
- if (clocks.APB2CLKDivider) {
- freq *= 2;
- }
- break;
- default:
- return 0;
- }
- return freq;
-}
-
-static void
-stm32l1_hw_setup(int num, TIM_TypeDef *regs)
-{
- uint32_t func;
-
- switch (num) {
-#if MYNEWT_VAL(TIMER_0)
- case 0:
- func = (uint32_t)stm32l1_tmr0_irq;
- break;
-#endif
-#if MYNEWT_VAL(TIMER_1)
- case 1:
- func = (uint32_t)stm32l1_tmr1_irq;
- break;
-#endif
- default:
- assert(0);
- return;
- }
-
-#ifdef TIM1
- if (regs == TIM1) {
- stm32l1_tmr_reg_irq(TIM1_CC_IRQn, func);
- stm32l1_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
- __HAL_RCC_TIM1_CLK_ENABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- stm32l1_tmr_reg_irq(TIM8_CC_IRQn, func);
- stm32l1_tmr_reg_irq(TIM8_UP_TIM13_IRQn, func);
- __HAL_RCC_TIM8_CLK_ENABLE();
- }
-#endif
-#ifdef TIM9
- if (regs == TIM9) {
- stm32l1_tmr_reg_irq(TIM9_IRQn, func);
- __HAL_RCC_TIM9_CLK_ENABLE();
- }
-#endif
-#ifdef TIM10
- if (regs == TIM10) {
- stm32l1_tmr_reg_irq(TIM10_IRQn, func);
- __HAL_RCC_TIM10_CLK_ENABLE();
- }
-#endif
-#ifdef TIM11
- if (regs == TIM11) {
- stm32l1_tmr_reg_irq(TIM11_IRQn, func);
- __HAL_RCC_TIM11_CLK_ENABLE();
- }
-#endif
-}
-
-static void
-stm32l1_hw_setdown(TIM_TypeDef *regs)
-{
-#ifdef TIM1
- if (regs == TIM1) {
- __HAL_RCC_TIM1_CLK_DISABLE();
- }
-#endif
-#ifdef TIM8
- if (regs == TIM8) {
- __HAL_RCC_TIM8_CLK_DISABLE();
- }
-#endif
-#ifdef TIM9
- if (regs == TIM9) {
- __HAL_RCC_TIM9_CLK_DISABLE();
- }
-#endif
-#ifdef TIM10
- if (regs == TIM10) {
- __HAL_RCC_TIM10_CLK_DISABLE();
- }
-#endif
-#ifdef TIM11
- if (regs == TIM11) {
- __HAL_RCC_TIM11_CLK_DISABLE();
- }
-#endif
-}
-
-/**
- * hal timer init
- *
- * Initialize platform specific timer items
- *
- * @param timer_num Timer number to initialize
- * @param cfg Pointer to platform specific configuration
- *
- * @return int 0: success; error code otherwise
- */
-int
-hal_timer_init(int num, void *cfg)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num]) ||
- (cfg == NULL)) {
- return -1;
- }
-
- tmr->sht_regs = (TIM_TypeDef *)cfg;
-
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
- return -1;
- }
-
- stm32l1_hw_setup(num, tmr->sht_regs);
-
- /*
- * Stop the timers at debugger. XXX Which TIM?
- */
- DBGMCU->APB1FZ |= 0x1ff; /* TIM2 - TIM7, TIM12-TIM14 */
- DBGMCU->APB2FZ |= 0x70003; /* TIM1, TIM8-TIM11 */
-
- return 0;
-}
-
-/**
- * hal timer config
- *
- * Configure a timer to run at the desired frequency. This starts the timer.
- *
- * @param timer_num
- * @param freq_hz
- *
- * @return int
- */
-int
-hal_timer_config(int num, uint32_t freq_hz)
-{
- struct stm32l1_hal_tmr *tmr;
- TIM_Base_InitTypeDef init;
- uint32_t prescaler;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- if (!IS_TIM_CC1_INSTANCE(tmr->sht_regs)) {
- return -1;
- }
-
- prescaler = stm32l1_base_freq(tmr->sht_regs) / freq_hz;
- if (prescaler > 0xffff) {
- return -1;
- }
-
- memset(&init, 0, sizeof(init));
- init.Period = 0xffff;
- init.Prescaler = prescaler;
- init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- init.CounterMode = TIM_COUNTERMODE_UP;
-
- /*
- * Set up to count overflow interrupts.
- */
- tmr->sht_regs->CR1 = TIM_CR1_URS;
- tmr->sht_regs->DIER = TIM_DIER_UIE;
-
- TIM_Base_SetConfig(tmr->sht_regs, &init);
-
- tmr->sht_regs->SR = 0;
- tmr->sht_regs->CR1 |= TIM_CR1_CEN;
-
- return 0;
-}
-
-/**
- * hal timer deinit
- *
- * De-initialize a HW timer.
- *
- * @param timer_num
- *
- * @return int
- */
-int
-hal_timer_deinit(int num)
-{
- struct stm32l1_hal_tmr *tmr;
- int sr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
-
- __HAL_DISABLE_INTERRUPTS(sr);
- /*
- * Turn off CC1, and then turn off the timer.
- */
- tmr->sht_regs->CR1 &= ~TIM_CR1_CEN;
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- __HAL_ENABLE_INTERRUPTS(sr);
- stm32l1_hw_setdown(tmr->sht_regs);
-
- return 0;
-}
-
-/**
- * hal timer get resolution
- *
- * Get the resolution of the timer. This is the timer period, in nanoseconds
- *
- * @param timer_num
- *
- * @return uint32_t
- */
-uint32_t
-hal_timer_get_resolution(int num)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- return (1000000000 / (SystemCoreClock / tmr->sht_regs->PSC));
-}
-
-static uint32_t
-hal_timer_cnt(struct stm32l1_hal_tmr *tmr)
-{
- uint32_t cnt;
- int sr;
-
- __HAL_DISABLE_INTERRUPTS(sr);
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT;
- if (tmr->sht_regs->SR & TIM_SR_UIF) {
- /*
- * Just overflowed
- */
- cnt = tmr->sht_oflow + tmr->sht_regs->CNT + 0x10000;
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return cnt;
-}
-
-/**
- * hal timer read
- *
- * Returns the timer counter. NOTE: if the timer is a 16-bit timer, only
- * the lower 16 bits are valid. If the timer is a 64-bit timer, only the
- * low 32-bits are returned.
- *
- * @return uint32_t The timer counter register.
- */
-uint32_t
-hal_timer_read(int num)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- return hal_timer_cnt(tmr);
-}
-
-/**
- * hal timer delay
- *
- * Blocking delay for n ticks
- *
- * @param timer_num
- * @param ticks
- *
- * @return int 0 on success; error code otherwise.
- */
-int
-hal_timer_delay(int num, uint32_t ticks)
-{
- struct stm32l1_hal_tmr *tmr;
- uint32_t until;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
-
- until = hal_timer_cnt(tmr) + ticks;
- while ((int32_t)(hal_timer_cnt(tmr) - until) <= 0) {
- ;
- }
- return 0;
-}
-
-/**
- *
- * Initialize the HAL timer structure with the callback and the callback
- * argument. Also initializes the HW specific timer pointer.
- *
- * @param cb_func
- *
- * @return int
- */
-int
-hal_timer_set_cb(int num, struct hal_timer *timer, hal_timer_cb cb_func,
- void *arg)
-{
- struct stm32l1_hal_tmr *tmr;
-
- if (num >= STM32L1_HAL_TIMER_MAX || !(tmr = stm32l1_tmr_devs[num])) {
- return -1;
- }
- timer->cb_func = cb_func;
- timer->cb_arg = arg;
- timer->bsp_timer = tmr;
- timer->link.tqe_prev = NULL;
-
- return 0;
-}
-
-/**
- * hal_timer_start()
- *
- * Start a timer. Timer fires 'ticks' ticks from now.
- *
- * @param timer
- * @param ticks
- *
- * @return int
- */
-int
-hal_timer_start(struct hal_timer *timer, uint32_t ticks)
-{
- struct stm32l1_hal_tmr *tmr;
- uint32_t tick;
-
- tmr = (struct stm32l1_hal_tmr *)timer->bsp_timer;
-
- tick = ticks + hal_timer_cnt(tmr);
- return hal_timer_start_at(timer, tick);
-}
-
-/**
- * hal_timer_start_at()
- *
- * Start a timer. Timer fires at tick 'tick'.
- *
- * @param timer
- * @param tick
- *
- * @return int
- */
-int
-hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
-{
- struct stm32l1_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
-
- tmr = (struct stm32l1_hal_tmr *)timer->bsp_timer;
-
- timer->expiry = tick;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- if (TAILQ_EMPTY(&tmr->sht_timers)) {
- TAILQ_INSERT_HEAD(&tmr->sht_timers, timer, link);
- } else {
- TAILQ_FOREACH(ht, &tmr->sht_timers, link) {
- if ((int32_t)(timer->expiry - ht->expiry) < 0) {
- TAILQ_INSERT_BEFORE(ht, timer, link);
- break;
- }
- }
- if (!ht) {
- TAILQ_INSERT_TAIL(&tmr->sht_timers, timer, link);
- }
- }
-
- if ((int32_t)(tick - hal_timer_cnt(tmr)) <= 0) {
- /*
- * Event in the past (should be the case if it was just inserted).
- */
- tmr->sht_regs->EGR |= TIM_EGR_CC1G;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- } else {
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- tmr->sht_regs->CCR1 = timer->expiry;
- tmr->sht_regs->DIER |= TIM_DIER_CC1IE;
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return 0;
-}
-
-/**
- * hal_timer_stop()
- *
- * Cancels the timer.
- *
- * @param timer
- *
- * @return int
- */
-int
-hal_timer_stop(struct hal_timer *timer)
-{
- struct stm32l1_hal_tmr *tmr;
- struct hal_timer *ht;
- int sr;
- int reset_ocmp;
-
- __HAL_DISABLE_INTERRUPTS(sr);
-
- tmr = (struct stm32l1_hal_tmr *)timer->bsp_timer;
- if (timer->link.tqe_prev != NULL) {
- reset_ocmp = 0;
- if (timer == TAILQ_FIRST(&tmr->sht_timers)) {
- /* If first on queue, we will need to reset OCMP */
- ht = TAILQ_NEXT(timer, link);
- reset_ocmp = 1;
- }
- TAILQ_REMOVE(&tmr->sht_timers, timer, link);
- timer->link.tqe_prev = NULL;
- if (reset_ocmp) {
- if (ht) {
- tmr->sht_regs->CCR1 = ht->expiry;
- } else {
- TIM_CCxChannelCmd(tmr->sht_regs, TIM_CHANNEL_1,
- TIM_CCx_DISABLE);
- tmr->sht_regs->DIER &= ~TIM_DIER_CC1IE;
- }
- }
- }
- __HAL_ENABLE_INTERRUPTS(sr);
-
- return 0;
-}
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