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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2021/07/27 14:14:11 UTC
[GitHub] [incubator-nuttx] saramonteiro opened a new pull request #4239: risc-v/esp32-c3: Adds systimer support and make rt_timer rely on it
saramonteiro opened a new pull request #4239:
URL: https://github.com/apache/incubator-nuttx/pull/4239
## Summary
This MR:
- Adds systimer support under the same generic timer API.
- Makes `rt_timer` rely on this added systimer.
## Impact
From now on, we have the 2 generic timer available for users. 😃
## Test
Since `rt_timer` has many "clients", I used the following defconfigs to make a simple validation:
- `esp32c3-devkit:wapi`
- `esp32c3-devkit:rtc`
- `esp32c3-devkit:pm`
Besides that, another customized application was used
to separately test the `rt_timer` API.
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[GitHub] [incubator-nuttx] xiaoxiang781216 merged pull request #4239: risc-v/esp32-c3: Adds systimer support and make rt_timer rely on it
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 merged pull request #4239:
URL: https://github.com/apache/incubator-nuttx/pull/4239
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[GitHub] [incubator-nuttx] acassis commented on a change in pull request #4239: risc-v/esp32-c3: Adds systimer support and make rt_timer rely on it
Posted by GitBox <gi...@apache.org>.
acassis commented on a change in pull request #4239:
URL: https://github.com/apache/incubator-nuttx/pull/4239#discussion_r677551236
##########
File path: arch/risc-v/src/esp32c3/esp32c3_tim.c
##########
@@ -341,19 +426,35 @@ static void esp32c3_tim_getcounter(FAR struct esp32c3_tim_dev_s *dev,
static void esp32c3_tim_setcounter(FAR struct esp32c3_tim_dev_s *dev,
uint64_t value)
{
- uint64_t low_64 = value & LOW_32_MASK;
-
- /* Get only the low 22 bits. */
-
- uint64_t high_64 = (value >> SHIFT_32) & LOW_22_MASK;
struct esp32c3_tim_priv_s *priv;
DEBUGASSERT(dev);
priv = (FAR struct esp32c3_tim_priv_s *)dev;
- /* Set the counter value */
+ if (priv->id == ESP32C3_SYSTIM)
+ {
+ uint64_t low_64 = value & LOW_32_MASK;
+ uint64_t high_64 = (value >> SHIFT_32) & LOW_20_MASK;
+
+ /* Set the counter 1 value */
- putreg32((uint32_t)low_64, TIMG_T0LOADLO_REG(priv->id));
- putreg32((uint32_t)high_64, TIMG_T0LOADHI_REG(priv->id));
+ putreg32((uint32_t)low_64, SYS_TIMER_SYSTIMER_UNIT1_LOAD_LO_REG);
+ putreg32((uint32_t)high_64, SYS_TIMER_SYSTIMER_UNIT1_LOAD_HI_REG);
+
+ /* Synchronize */
+
+ putreg32(SYS_TIMER_TIMER_UNIT1_LOAD_M,
+ SYS_TIMER_SYSTIMER_UNIT1_LOAD_REG);
+ }
+ else
+ {
+ uint64_t low_64 = value & LOW_32_MASK;
+ uint64_t high_64 = (value >> SHIFT_32) & LOW_22_MASK;
Review comment:
I think it is better to keep low_64 and high_64 inside the function because it will be used one way or another
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[GitHub] [incubator-nuttx] saramonteiro commented on a change in pull request #4239: risc-v/esp32-c3: Adds systimer support and make rt_timer rely on it
Posted by GitBox <gi...@apache.org>.
saramonteiro commented on a change in pull request #4239:
URL: https://github.com/apache/incubator-nuttx/pull/4239#discussion_r677756645
##########
File path: arch/risc-v/src/esp32c3/esp32c3_tim.c
##########
@@ -341,19 +426,35 @@ static void esp32c3_tim_getcounter(FAR struct esp32c3_tim_dev_s *dev,
static void esp32c3_tim_setcounter(FAR struct esp32c3_tim_dev_s *dev,
uint64_t value)
{
- uint64_t low_64 = value & LOW_32_MASK;
-
- /* Get only the low 22 bits. */
-
- uint64_t high_64 = (value >> SHIFT_32) & LOW_22_MASK;
struct esp32c3_tim_priv_s *priv;
DEBUGASSERT(dev);
priv = (FAR struct esp32c3_tim_priv_s *)dev;
- /* Set the counter value */
+ if (priv->id == ESP32C3_SYSTIM)
+ {
+ uint64_t low_64 = value & LOW_32_MASK;
+ uint64_t high_64 = (value >> SHIFT_32) & LOW_20_MASK;
+
+ /* Set the counter 1 value */
- putreg32((uint32_t)low_64, TIMG_T0LOADLO_REG(priv->id));
- putreg32((uint32_t)high_64, TIMG_T0LOADHI_REG(priv->id));
+ putreg32((uint32_t)low_64, SYS_TIMER_SYSTIMER_UNIT1_LOAD_LO_REG);
+ putreg32((uint32_t)high_64, SYS_TIMER_SYSTIMER_UNIT1_LOAD_HI_REG);
+
+ /* Synchronize */
+
+ putreg32(SYS_TIMER_TIMER_UNIT1_LOAD_M,
+ SYS_TIMER_SYSTIMER_UNIT1_LOAD_REG);
+ }
+ else
+ {
+ uint64_t low_64 = value & LOW_32_MASK;
+ uint64_t high_64 = (value >> SHIFT_32) & LOW_22_MASK;
Review comment:
Good catch, thanks.
Fixed
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