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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/04/01 17:13:52 UTC
[incubator-nuttx] 32/35: boards: Nxstyle fixes
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit b1ca7cf3ced6534f3f9bf5843ec12b5436b032ff
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Thu Apr 1 08:20:14 2021 +0200
boards: Nxstyle fixes
Nxstyle fixes to pass CI
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
boards/arm/am335x/beaglebone-black/include/board.h | 16 ++--
.../imxrt1020-evk/src/imxrt_flexspi_nor_boot.c | 4 +
.../imxrt1020-evk/src/imxrt_flexspi_nor_flash.h | 40 +++++----
.../imxrt1050-evk/src/imxrt_flexspi_nor_boot.c | 4 +
.../imxrt1050-evk/src/imxrt_flexspi_nor_flash.c | 83 ++++++++++++-------
.../imxrt1050-evk/src/imxrt_flexspi_nor_flash.h | 38 +++++----
boards/arm/imxrt/imxrt1050-evk/src/imxrt_spi.c | 12 +--
.../imxrt1060-evk/src/imxrt_flexspi_nor_boot.c | 4 +
.../imxrt1060-evk/src/imxrt_flexspi_nor_boot.h | 4 +-
.../imxrt1060-evk/src/imxrt_flexspi_nor_flash.c | 66 +++++++++------
.../imxrt1060-evk/src/imxrt_flexspi_nor_flash.h | 38 +++++----
.../arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_leds.c | 4 +
boards/arm/stm32/hymini-stm32v/include/board.h | 11 ++-
boards/arm/stm32/hymini-stm32v/src/stm32_boot.c | 21 +++--
boards/arm/stm32/hymini-stm32v/src/stm32_leds.c | 57 ++++++-------
boards/arm/stm32/hymini-stm32v/src/stm32_spi.c | 57 +++++++------
boards/arm/stm32/hymini-stm32v/src/stm32_ts.c | 18 ++--
boards/arm/stm32/nucleo-f410rb/src/stm32_adc.c | 22 ++++-
boards/arm/stm32/nucleo-f410rb/src/stm32_boot.c | 16 ++--
boards/arm/stm32/olimex-stm32-e407/include/board.h | 67 ++++++++-------
boards/arm/stm32/stm32_tiny/src/stm32_boot.c | 19 +++--
boards/arm/stm32/stm32_tiny/src/stm32_leds.c | 12 ++-
boards/arm/stm32/stm32_tiny/src/stm32_spi.c | 41 ++++++----
boards/arm/stm32/stm32_tiny/src/stm32_usbdev.c | 22 +++--
.../stm32/stm32f103-minimum/src/stm32_autoleds.c | 5 +-
.../arm/stm32/stm32f103-minimum/src/stm32_boot.c | 38 +++++----
boards/arm/stm32/stm32f103-minimum/src/stm32_spi.c | 32 ++++----
.../arm/stm32/stm32f103-minimum/src/stm32_usbdev.c | 18 ++--
.../arm/stm32f0l0g0/nucleo-f091rc/src/stm32_spi.c | 30 ++++---
.../arm/stm32f7/stm32f746g-disco/src/stm32_adc.c | 95 +++++++++++-----------
.../arm/stm32l4/b-l475e-iot01a/src/stm32_timer.c | 1 +
.../arm/tms570/tms570ls31x-usb-kit/include/board.h | 6 +-
boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c | 2 +-
boards/renesas/rx65n/rx65n/src/rx65n_main.c | 2 +-
34 files changed, 535 insertions(+), 370 deletions(-)
diff --git a/boards/arm/am335x/beaglebone-black/include/board.h b/boards/arm/am335x/beaglebone-black/include/board.h
index 4581824..9e61704 100644
--- a/boards/arm/am335x/beaglebone-black/include/board.h
+++ b/boards/arm/am335x/beaglebone-black/include/board.h
@@ -78,7 +78,7 @@
*
* SYMBOL Value Meaning LED state
* LED0 LED1 LED2
- * ----------------- ----- ----------------------- ---- ---- ---------*
+ * ----------------- ----- ----------------------- ---- ---- ---------
*/
#define LED_STARTED 0 /* NuttX has been started ON OFF OFF */
@@ -90,7 +90,7 @@
#define LED_ASSERTION 3 /* An assertion failed N/C N/C Soft glow */
#define LED_PANIC 3 /* The system has crashed N/C N/C 2Hz Flashing */
-/* LED_IDLE --- /* MCU is is sleep mode Not used
+/* LED_IDLE --- MCU is is sleep mode Not used
*
* After booting, LED0 and 1 are not longer used by the system and can be
* used for other purposes by the application (Of course, all LEDs are
@@ -107,12 +107,12 @@
*
* 1. UART0 is available on FT2232H USB to Serial Adapter.
*
- * FT2232H BDBUS1 Pin UART0-RXD UART0_RXD/SPI1_CS0/DCAN0_TX/I2C2_SDA/
- * eCAP2_IN_PWM2_OUT/PR1_PRU1_PRU_R30_14/
- * PR1_PRU1_PRU_R31_14/GPIO1_10
- * FT2232H BDBUS0 Pin UART0-TXD UART0_TXD/SPI1_CS1/DCAN0_RX/I2C2_SCL/
- * eCAP1_IN_PWM1_OUT/PR1_PRU1_PRU_R30_15/
- * PR1_PRU1_PRU_R31_15/GPIO1_11
+ * FT2232H BDBUS1 Pin UART0-RXD UART0_RXD/SPI1_CS0/DCAN0_TX/I2C2_SDA/
+ * eCAP2_IN_PWM2_OUT/PR1_PRU1_PRU_R30_14/
+ * PR1_PRU1_PRU_R31_14/GPIO1_10
+ * FT2232H BDBUS0 Pin UART0-TXD UART0_TXD/SPI1_CS1/DCAN0_RX/I2C2_SCL/
+ * eCAP1_IN_PWM1_OUT/PR1_PRU1_PRU_R30_15/
+ * PR1_PRU1_PRU_R31_15/GPIO1_11
*/
/* I2Cs *********************************************************************/
diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c
index 023b453..9a4c0fc 100644
--- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c
+++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c
@@ -49,3 +49,7 @@ const struct boot_data_s g_boot_data =
PLUGIN_FLAG, /* Plugin flag */
0xffffffff /* empty - extra data word */
};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h
index 7ab8e9c..c7987da 100644
--- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h
+++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h
@@ -142,7 +142,9 @@
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS CMD_LUT_SEQ_IDX_READSTATUS
-/* 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */
+/* 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 2
@@ -150,7 +152,9 @@
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE CMD_LUT_SEQ_IDX_WRITEENABLE
-/* 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */
+/* 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI 4
@@ -174,11 +178,15 @@
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13
-/* 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */
+/* 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD 14
-/* 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */
+/* 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config
+ * blobk
+ */
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD 15
@@ -201,7 +209,7 @@ enum flexspi_serial_clkfreq_e
FLEXSPI_SERIAL_CLKFREQ_200MHz = 9,
};
-/* FlexSPI clock configuration type*/
+/* FlexSPI clock configuration type */
enum flexspi_serial_clockmode_e
{
@@ -327,17 +335,17 @@ struct flexspi_mem_config_s
struct flexspi_nor_config_s
{
struct flexspi_mem_config_s mem_config; /* Common memory configuration info via FlexSPI */
- uint32_t page_size; /* Page size of Serial NOR */
- uint32_t sector_size; /* Sector size of Serial NOR */
- uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
- uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
- uint8_t reserved0[2]; /* Reserved for future use */
- uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
- uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */
- uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */
- uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP command execution */
- uint32_t blocksize; /* Block size */
- uint32_t reserve2[11]; /* Reserved for future use */
+ uint32_t page_size; /* Page size of Serial NOR */
+ uint32_t sector_size; /* Sector size of Serial NOR */
+ uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
+ uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
+ uint8_t reserved0[2]; /* Reserved for future use */
+ uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
+ uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */
+ uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */
+ uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP command execution */
+ uint32_t blocksize; /* Block size */
+ uint32_t reserve2[11]; /* Reserved for future use */
};
#endif /* __BOARDS_ARM_IMXRT1020_EVK_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */
diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c
index fa95fc5..d624a84 100644
--- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c
+++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c
@@ -49,3 +49,7 @@ const struct boot_data_s g_boot_data =
PLUGIN_FLAG, /* Plugin flag */
0xffffffff /* empty - extra data word */
};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c
index b82be1b..524dfd1 100644
--- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c
+++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c
@@ -32,32 +32,41 @@
__attribute__((section(".boot_hdr.conf")))
const struct flexspi_nor_config_s g_flash_config =
{
- .mem_config =
+ .mem_config =
{
- .tag = FLEXSPI_CFG_BLK_TAG,
- .version = FLEXSPI_CFG_BLK_VERSION,
- .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD,
- .cs_hold_time = 3u,
- .cs_setup_time = 3u,
- .column_address_width = 3u,
-
- /* Enable DDR mode, Word addassable, Safe configuration, Differential clock */
-
- .controller_misc_option = (1u << FLEXSPIMISC_OFFSET_DDR_MODE_EN) |
- (1u << FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN) |
- (1u << FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN) |
- (1u << FLEXSPIMISC_OFFSET_DIFFCLKEN),
- .sflash_pad_type = SERIAL_FLASH_8PADS,
- .serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_133MHz,
- .sflash_a1size = 64u * 1024u * 1024u,
- .data_valid_time = {16u, 16u},
- .lookup_table =
+ .tag = FLEXSPI_CFG_BLK_TAG,
+ .version = FLEXSPI_CFG_BLK_VERSION,
+ .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD,
+ .cs_hold_time = 3u,
+ .cs_setup_time = 3u,
+ .column_address_width = 3u,
+
+ /* Enable DDR mode, Word addassable,
+ * Safe configuration, Differential clock
+ */
+
+ .controller_misc_option =
+ (1u << FLEXSPIMISC_OFFSET_DDR_MODE_EN) |
+ (1u << FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN) |
+ (1u << FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN) |
+ (1u << FLEXSPIMISC_OFFSET_DIFFCLKEN),
+ .sflash_pad_type = SERIAL_FLASH_8PADS,
+ .serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_133MHz,
+ .sflash_a1size = 64u * 1024u * 1024u,
+ .data_valid_time =
+ {
+ 16u, 16u
+ },
+ .lookup_table =
{
/* Read LUTs */
- FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xa0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
- FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
- FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
+ FLEXSPI_LUT_SEQ(CMD_DDR,
+ FLEXSPI_8PAD, 0xa0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
+ FLEXSPI_LUT_SEQ(CADDR_DDR,
+ FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
+ FLEXSPI_LUT_SEQ(READ_DDR,
+ FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
},
},
.page_size = 512u,
@@ -82,21 +91,29 @@ const struct flexspi_nor_config_s g_flash_config =
.sflash_pad_type = SERIAL_FLASH_4PADS,
.serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz,
.sflash_a1size = 8u * 1024u * 1024u,
- .data_valid_time = {16u, 16u},
+ .data_valid_time =
+ {
+ 16u, 16u
+ },
.lookup_table =
{
/* LUTs */
/* 0 Fast read Quad IO DTR Mode Operation in SPI Mode (normal read) */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xed, RADDR_DDR, FLEXSPI_4PAD, 0x18),
- FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_4PAD, 0x0c, READ_DDR, FLEXSPI_4PAD, 0x08),
- FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
- FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0xed, RADDR_DDR, FLEXSPI_4PAD, 0x18),
+ FLEXSPI_LUT_SEQ(DUMMY_DDR,
+ FLEXSPI_4PAD, 0x0c, READ_DDR, FLEXSPI_4PAD, 0x08),
+ FLEXSPI_LUT_SEQ(STOP,
+ FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
+ FLEXSPI_LUT_SEQ(STOP,
+ FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
/* 1 Read Status */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
@@ -124,7 +141,8 @@ const struct flexspi_nor_config_s g_flash_config =
/* 5 Erase Sector */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xd7, RADDR_SDR, FLEXSPI_1PAD, 0x18),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0xd7, RADDR_SDR, FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
@@ -152,7 +170,8 @@ const struct flexspi_nor_config_s g_flash_config =
/* 9 Page Program */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x8, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
@@ -181,3 +200,7 @@ const struct flexspi_nor_config_s g_flash_config =
#else
# error Boot Flash type not chosen!
#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h
index 3834683..3f31942 100644
--- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h
+++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h
@@ -140,7 +140,9 @@
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS CMD_LUT_SEQ_IDX_READSTATUS
-/* 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */
+/* 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 2
@@ -148,7 +150,9 @@
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE CMD_LUT_SEQ_IDX_WRITEENABLE
-/* 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */
+/* 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI 4
@@ -172,11 +176,15 @@
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13
-/* 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */
+/* 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD 14
-/* 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */
+/* 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config
+ * blobk
+ */
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD 15
@@ -326,17 +334,17 @@ struct flexspi_mem_config_s
struct flexspi_nor_config_s
{
struct flexspi_mem_config_s mem_config; /* Common memory configuration info via FlexSPI */
- uint32_t page_size; /* Page size of Serial NOR */
- uint32_t sector_size; /* Sector size of Serial NOR */
- uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
- uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
- uint8_t reserved0[2]; /* Reserved for future use */
- uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
- uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */
- uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */
- uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP command execution */
- uint32_t blocksize; /* Block size */
- uint32_t reserve2[11]; /* Reserved for future use */
+ uint32_t page_size; /* Page size of Serial NOR */
+ uint32_t sector_size; /* Sector size of Serial NOR */
+ uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
+ uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
+ uint8_t reserved0[2]; /* Reserved for future use */
+ uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
+ uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */
+ uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */
+ uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP command execution */
+ uint32_t blocksize; /* Block size */
+ uint32_t reserve2[11]; /* Reserved for future use */
};
#endif /* __BOARDS_ARM_IMXRT_IMXRT1050_EVK_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */
diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_spi.c b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_spi.c
index dfcf9bf..a4a3936 100644
--- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_spi.c
+++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_spi.c
@@ -70,12 +70,12 @@ void weak_function imxrt_spidev_initialize(void)
* Name: imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status
*
* Description:
- * The external functions, imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status
- * must be provided by board-specific logic.
+ * The external functions, imxrt_lpspi1/2/3select and
+ * imxrt_lpspi1/2/3status must be provided by board-specific logic.
* They are implementations of the select and status methods of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
- * All other methods (including imxrt_lpspibus_initialize()) are provided by
- * common STM32 logic. To use this common SPI logic on your board:
+ * All other methods (including imxrt_lpspibus_initialize()) are provided
+ * by common STM32 logic. To use this common SPI logic on your board:
*
* 1. Provide logic in imxrt_boardinitialize() to configure SPI chip select
* pins.
@@ -85,8 +85,8 @@ void weak_function imxrt_spidev_initialize(void)
* using GPIOs in the way your board is configured.
* 3. Add a calls to imxrt_lpspibus_initialize() in your low level
* application initialization logic
- * 4. The handle returned by imxrt_lpspibus_initialize() may then be used to
- * bind the SPI driver to higher level logic (e.g., calling
+ * 4. The handle returned by imxrt_lpspibus_initialize() may then be used
+ * to bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c
index d745595..d80573c 100644
--- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c
+++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c
@@ -49,3 +49,7 @@ const struct boot_data_s g_boot_data =
PLUGIN_FLAG, /* Plugin flag */
0xffffffff /* empty - extra data word */
};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h
index f410f70..e98b689 100644
--- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h
+++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h
@@ -61,7 +61,9 @@
#define FLASH_BASE 0x60000000
#define FLASH_END 0x7f7fffff
-/* This needs to take into account the memory configuration at boot bootloader */
+/* This needs to take into account the memory configuration at boot
+ * bootloader
+ */
#define ROM_BOOTLOADER_OCRAM_RES 0x8000
#define OCRAM_BASE (0x20200000 + ROM_BOOTLOADER_OCRAM_RES)
diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c
index 8c43ea6..c051bc8 100644
--- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c
+++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c
@@ -32,31 +32,39 @@
__attribute__((section(".boot_hdr.conf")))
const struct flexspi_nor_config_s g_flash_config =
{
- .mem_config =
+ .mem_config =
{
- .tag = FLEXSPI_CFG_BLK_TAG,
- .version = FLEXSPI_CFG_BLK_VERSION,
- .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD,
- .cs_hold_time = 3u,
- .cs_setup_time = 3u,
- .column_address_width = 3u,
-
- /* Enable DDR mode, Word addassable, Safe configuration, Differential clock */
-
- .controller_misc_option = (1u << FLEXSPIMISC_OFFSET_DDR_MODE_EN) |
- (1u << FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN) |
- (1u << FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN) |
- (1u << FLEXSPIMISC_OFFSET_DIFFCLKEN),
+ .tag = FLEXSPI_CFG_BLK_TAG,
+ .version = FLEXSPI_CFG_BLK_VERSION,
+ .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD,
+ .cs_hold_time = 3u,
+ .cs_setup_time = 3u,
+ .column_address_width = 3u,
+
+ /* Enable DDR mode, Word addassable,
+ * Safe configuration, Differential clock
+ */
+
+ .controller_misc_option =
+ (1u << FLEXSPIMISC_OFFSET_DDR_MODE_EN) |
+ (1u << FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN) |
+ (1u << FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN) |
+ (1u << FLEXSPIMISC_OFFSET_DIFFCLKEN),
.sflash_pad_type = SERIAL_FLASH_8PADS,
.serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_133MHz,
.sflash_a1size = 64u * 1024u * 1024u,
- .data_valid_time = {16u, 16u},
+ .data_valid_time =
+ {
+ 16u, 16u
+ },
.lookup_table =
{
/* Read LUTs */
- FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xa0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
- FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
+ FLEXSPI_LUT_SEQ(CMD_DDR,
+ FLEXSPI_8PAD, 0xa0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
+ FLEXSPI_LUT_SEQ(CADDR_DDR,
+ FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
},
},
@@ -82,21 +90,27 @@ const struct flexspi_nor_config_s g_flash_config =
.sflash_pad_type = SERIAL_FLASH_4PADS,
.serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz,
.sflash_a1size = 8u * 1024u * 1024u,
- .data_valid_time = {16u, 16u},
+ .data_valid_time =
+ {
+ 16u, 16u
+ },
.lookup_table =
{
/* LUTs */
/* 0 Fast read Quad IO DTR Mode Operation in SPI Mode (normal read) */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xed, RADDR_DDR, FLEXSPI_4PAD, 0x18),
- FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_4PAD, 0x0c, READ_DDR, FLEXSPI_4PAD, 0x08),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0xed, RADDR_DDR, FLEXSPI_4PAD, 0x18),
+ FLEXSPI_LUT_SEQ(DUMMY_DDR,
+ FLEXSPI_4PAD, 0x0c, READ_DDR, FLEXSPI_4PAD, 0x08),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
/* 1 Read Status */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
@@ -124,7 +138,8 @@ const struct flexspi_nor_config_s g_flash_config =
/* 5 Erase Sector */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xd7, RADDR_SDR, FLEXSPI_1PAD, 0x18),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0xd7, RADDR_SDR, FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
@@ -152,7 +167,8 @@ const struct flexspi_nor_config_s g_flash_config =
/* 9 Page Program */
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
+ FLEXSPI_LUT_SEQ(CMD_SDR,
+ FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x8, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
@@ -181,3 +197,7 @@ const struct flexspi_nor_config_s g_flash_config =
#else
# error Boot Flash type not chosen!
#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h
index 93aa2f4..ded676e 100644
--- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h
+++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h
@@ -142,7 +142,9 @@
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS CMD_LUT_SEQ_IDX_READSTATUS
-/* 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */
+/* 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 2
@@ -150,7 +152,9 @@
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE CMD_LUT_SEQ_IDX_WRITEENABLE
-/* 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */
+/* 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI 4
@@ -174,11 +178,15 @@
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13
-/* 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */
+/* 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config
+ * block
+ */
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD 14
-/* 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */
+/* 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config
+ * blobk
+ */
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD 15
@@ -329,17 +337,17 @@ struct flexspi_mem_config_s
struct flexspi_nor_config_s
{
struct flexspi_mem_config_s mem_config; /* Common memory configuration info via FlexSPI */
- uint32_t page_size; /* Page size of Serial NOR */
- uint32_t sector_size; /* Sector size of Serial NOR */
- uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
- uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
- uint8_t reserved0[2]; /* Reserved for future use */
- uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
- uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */
- uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */
- uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP command execution */
- uint32_t blocksize; /* Block size */
- uint32_t reserve2[11]; /* Reserved for future use */
+ uint32_t page_size; /* Page size of Serial NOR */
+ uint32_t sector_size; /* Sector size of Serial NOR */
+ uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
+ uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
+ uint8_t reserved0[2]; /* Reserved for future use */
+ uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
+ uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */
+ uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */
+ uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP command execution */
+ uint32_t blocksize; /* Block size */
+ uint32_t reserve2[11]; /* Reserved for future use */
};
#endif /* __BOARDS_ARM_IMXRT_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */
diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_leds.c b/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_leds.c
index ea36726..0d09c9d 100644
--- a/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_leds.c
+++ b/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_leds.c
@@ -40,6 +40,10 @@
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
diff --git a/boards/arm/stm32/hymini-stm32v/include/board.h b/boards/arm/stm32/hymini-stm32v/include/board.h
index 15efaa9..5f146b5 100644
--- a/boards/arm/stm32/hymini-stm32v/include/board.h
+++ b/boards/arm/stm32/hymini-stm32v/include/board.h
@@ -31,13 +31,15 @@
* Pre-processor Definitions
****************************************************************************/
-/* Clocking *************************************************************************/
+/* Clocking *****************************************************************/
/* On-board crystal frequency is 8MHz (HSE) */
#define STM32_BOARD_XTAL 8000000ul
-/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
+/* PLL source is HSE/1, PLL multipler is 9:
+ * PLL frequency is 8MHz (XTAL) x 9 = 72MHz
+ */
#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
#define STM32_CFGR_PLLXTPRE 0
@@ -86,7 +88,8 @@
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
- * Note: TIM1,8 are on APB2, others on APB1 */
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY
@@ -127,7 +130,7 @@
# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
-/* LED definitions ******************************************************************/
+/* LED definitions **********************************************************/
/* The board has 2 LEDs that we will encode as: */
#define LED_STARTED 0 /* No LEDs */
diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_boot.c b/boards/arm/stm32/hymini-stm32v/src/stm32_boot.c
index 44fa3ca..cf98e31 100644
--- a/boards/arm/stm32/hymini-stm32v/src/stm32_boot.c
+++ b/boards/arm/stm32/hymini-stm32v/src/stm32_boot.c
@@ -41,16 +41,19 @@
* Name: stm32_boardinitialize
*
* Description:
- * All STM32 architectures must provide the following entry point. This entry point
- * is called early in the initialization -- after all memory has been configured
- * and mapped but before any devices have been initialized.
+ * All STM32 architectures must provide the following entry point. This
+ * entry point is called early in the initialization -- after all memory
+ * has been configured and mapped but before any devices have been
+ * initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
- /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
- * stm32_spidev_initialize() has been brought into the link.
+ /* Configure SPI chip selects if
+ * 1) SPI is not disabled, and
+ * 2) the weak function stm32_spidev_initialize() has been brought into
+ * the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
@@ -60,10 +63,10 @@ void stm32_boardinitialize(void)
}
#endif
- /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
- * disabled, and 3) the weak function stm32_usbinitialize() has been brought
- * into the build.
- */
+ /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+ * disabled, and 3) the weak function stm32_usbinitialize() has been
+ * brought into the build.
+ */
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
if (stm32_usbinitialize)
diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_leds.c b/boards/arm/stm32/hymini-stm32v/src/stm32_leds.c
index 0eb7579..4fdee0e 100644
--- a/boards/arm/stm32/hymini-stm32v/src/stm32_leds.c
+++ b/boards/arm/stm32/hymini-stm32v/src/stm32_leds.c
@@ -124,29 +124,29 @@
static const uint16_t g_ledbits[8] =
{
- (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | LED_STARTED_OFF_SETBITS
- | LED_STARTED_OFF_CLRBITS),
+ (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS |
+ LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS),
- (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS
- | LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
+ (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS |
+ LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
- (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS
- | LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
+ (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS |
+ LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
- (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS
- | LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
+ (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS |
+ LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
- (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | LED_INIRQ_OFF_SETBITS
- | LED_INIRQ_OFF_CLRBITS),
+ (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS |
+ LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS),
- (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | LED_SIGNAL_OFF_SETBITS
- | LED_SIGNAL_OFF_CLRBITS),
+ (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS |
+ LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS),
- (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | LED_ASSERTION_OFF_SETBITS
- | LED_ASSERTION_OFF_CLRBITS),
+ (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS |
+ LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS),
- (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | LED_PANIC_OFF_SETBITS
- | LED_PANIC_OFF_CLRBITS)
+ (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS |
+ LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS)
};
/****************************************************************************
@@ -156,27 +156,27 @@ static const uint16_t g_ledbits[8] =
static inline void led_clrbits(unsigned int clrbits)
{
if ((clrbits & HYMINI_STM32_LED1) != 0)
- {
- stm32_gpiowrite(GPIO_LED1, false);
- }
+ {
+ stm32_gpiowrite(GPIO_LED1, false);
+ }
if ((clrbits & HYMINI_STM32_LED2) != 0)
- {
- stm32_gpiowrite(GPIO_LED2, false);
- }
+ {
+ stm32_gpiowrite(GPIO_LED2, false);
+ }
}
static inline void led_setbits(unsigned int setbits)
{
if ((setbits & HYMINI_STM32_LED1) != 0)
- {
- stm32_gpiowrite(GPIO_LED1, true);
- }
+ {
+ stm32_gpiowrite(GPIO_LED1, true);
+ }
if ((setbits & HYMINI_STM32_LED2) != 0)
- {
- stm32_gpiowrite(GPIO_LED2, true);
- }
+ {
+ stm32_gpiowrite(GPIO_LED2, true);
+ }
}
static void led_setonoff(unsigned int bits)
@@ -197,6 +197,7 @@ static void led_setonoff(unsigned int bits)
void board_autoled_initialize(void)
{
/* Configure LED1 & LED2 GPIOs for output */
+
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
}
diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_spi.c b/boards/arm/stm32/hymini-stm32v/src/stm32_spi.c
index 7340da3..be3bfb2 100644
--- a/boards/arm/stm32/hymini-stm32v/src/stm32_spi.c
+++ b/boards/arm/stm32/hymini-stm32v/src/stm32_spi.c
@@ -47,7 +47,8 @@
* Name: stm32_spidev_initialize
*
* Description:
- * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32 board.
+ * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32
+ * board.
*
****************************************************************************/
@@ -61,6 +62,7 @@ void stm32_spidev_initialize(void)
#ifdef CONFIG_STM32_SPI1
/* Configure the SPI-based touch screen CS GPIO */
+
spiinfo("Configure GPIO for SPI1/CS\n");
stm32_configgpio(GPIO_TS_CS);
#endif
@@ -70,38 +72,41 @@ void stm32_spidev_initialize(void)
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
- * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
- * provided by board-specific logic. They are implementations of the select
- * and status methods of the SPI interface defined by struct spi_ops_s (see
- * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
- * are provided by common STM32 logic. To use this common SPI logic on your
- * board:
+ * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
+ * must be provided by board-specific logic. They are implementations of
+ * the select and status methods of the SPI interface defined by struct
+ * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
+ * stm32_spibus_initialize()) are provided by common STM32 logic.
+ * To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
- * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
- * board-specific logic. These functions will perform chip selection and
- * status operations using GPIOs in the way your board is configured.
- * 3. Add a calls to stm32_spibus_initialize() in your low level application
- * initialization logic
- * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
- * SPI driver to higher level logic (e.g., calling
+ * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
+ * in your board-specific logic. These functions will perform chip
+ * selection and status operations using GPIOs in the way your board is
+ * configured.
+ * 3. Add a calls to stm32_spibus_initialize() in your low level
+ * application initialization logic
+ * 4. The handle returned by stm32_spibus_initialize() may then be used to
+ * bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
-void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi1select(FAR struct spi_dev_s *dev,
+ uint32_t devid, bool selected)
{
- spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_TOUCHSCREEN(0))
- {
- /* Set the GPIO low to select and high to de-select */
+ {
+ /* Set the GPIO low to select and high to de-select */
- stm32_gpiowrite(GPIO_TS_CS, !selected);
- }
+ stm32_gpiowrite(GPIO_TS_CS, !selected);
+ }
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
@@ -111,9 +116,11 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI2
-void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi2select(FAR struct spi_dev_s *dev,
+ uint32_t devid, bool selected)
{
- spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
@@ -123,9 +130,11 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI3
-void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi3select(FAR struct spi_dev_s *dev,
+ uint32_t devid, bool selected)
{
- spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_ts.c b/boards/arm/stm32/hymini-stm32v/src/stm32_ts.c
index f1f333f..e4f1b63 100644
--- a/boards/arm/stm32/hymini-stm32v/src/stm32_ts.c
+++ b/boards/arm/stm32/hymini-stm32v/src/stm32_ts.c
@@ -48,9 +48,10 @@
* Private Function Prototypes
****************************************************************************/
-static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state, xcpt_t isr);
+static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state,
+ xcpt_t isr);
static void hymini_ts_irq_enable(FAR struct ads7843e_config_s *state,
- bool enable);
+ bool enable);
static void hymini_ts_irq_clear(FAR struct ads7843e_config_s *state);
static bool hymini_ts_busy(FAR struct ads7843e_config_s *state);
static bool hymini_ts_pendown(FAR struct ads7843e_config_s *state);
@@ -64,10 +65,10 @@ static FAR struct ads7843e_config_s ts_cfg =
.frequency = CONFIG_ADS7843E_FREQUENCY,
.attach = hymini_ts_irq_attach,
- .enable=hymini_ts_irq_enable,
- .clear=hymini_ts_irq_clear,
+ .enable = hymini_ts_irq_enable,
+ .clear = hymini_ts_irq_clear,
.busy = hymini_ts_busy,
- .pendown=hymini_ts_pendown
+ .pendown = hymini_ts_pendown
};
static xcpt_t tc_isr;
@@ -78,7 +79,8 @@ static xcpt_t tc_isr;
/* Attach the ADS7843E interrupt handler to the GPIO interrupt */
-static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
+static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state,
+ xcpt_t isr)
{
iinfo("hymini_ts_irq_attach\n");
@@ -102,10 +104,11 @@ static void hymini_ts_irq_enable(FAR struct ads7843e_config_s *state,
static void hymini_ts_irq_clear(FAR struct ads7843e_config_s *state)
{
- // FIXME Nothing to do ?
+ /* FIXME Nothing to do ? */
}
/* As the busy line is not connected, we just wait a little bit here */
+
static bool hymini_ts_busy(FAR struct ads7843e_config_s *state)
{
up_mdelay(50);
@@ -113,6 +116,7 @@ static bool hymini_ts_busy(FAR struct ads7843e_config_s *state)
}
/* Return the state of the pen down GPIO input */
+
static bool hymini_ts_pendown(FAR struct ads7843e_config_s *state)
{
bool pin_value = stm32_gpioread(GPIO_TS_IRQ);
diff --git a/boards/arm/stm32/nucleo-f410rb/src/stm32_adc.c b/boards/arm/stm32/nucleo-f410rb/src/stm32_adc.c
index 1933f74..9a2e999 100644
--- a/boards/arm/stm32/nucleo-f410rb/src/stm32_adc.c
+++ b/boards/arm/stm32/nucleo-f410rb/src/stm32_adc.c
@@ -53,27 +53,40 @@
/****************************************************************************
* Private Data
****************************************************************************/
+
/* Identifying number of each ADC channel. */
#ifdef CONFIG_STM32_ADC1_DMA
/* ADC_IN0 and ADC_IN1 */
-static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {9, 8};
+static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
+{
+ 9, 8
+};
/* Configurations of pins used byte each ADC channels */
-static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN9, GPIO_ADC1_IN8};
+static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
+{
+ GPIO_ADC1_IN9, GPIO_ADC1_IN8
+};
#else
/* Without DMA, only a single channel can be supported */
/* ADC_IN0 */
-static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {9};
+static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
+{
+ 9
+};
/* Configurations of pins used byte each ADC channels */
-static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN9};
+static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
+{
+ GPIO_ADC1_IN9
+};
#endif /* CONFIG_STM32_ADC1_DMA */
@@ -96,6 +109,7 @@ int stm32_adc_setup(void)
int i;
/* Configure the pins as analog inputs for the selected channels */
+
syslog(LOG_ERR, "stm32_adc_setup configuration: %d\n", ADC1_NCHANNELS);
for (i = 0; i < ADC1_NCHANNELS; i++)
diff --git a/boards/arm/stm32/nucleo-f410rb/src/stm32_boot.c b/boards/arm/stm32/nucleo-f410rb/src/stm32_boot.c
index b61e0ff..27e23ee 100644
--- a/boards/arm/stm32/nucleo-f410rb/src/stm32_boot.c
+++ b/boards/arm/stm32/nucleo-f410rb/src/stm32_boot.c
@@ -49,9 +49,10 @@
* Name: stm32_boardinitialize
*
* Description:
- * All STM32 architectures must provide the following entry point. This entry point
- * is called early in the initialization -- after all memory has been configured
- * and mapped but before any devices have been initialized.
+ * All STM32 architectures must provide the following entry point. This
+ * entry point is called early in the initialization -- after all memory
+ * has been configured and mapped but before any devices have been
+ * initialized.
*
****************************************************************************/
@@ -76,10 +77,11 @@ void stm32_boardinitialize(void)
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
- * function called board_late_initialize(). board_late_initialize() will be
- * called immediately after up_initialize() is called and just before the
- * initial application is started. This additional initialization phase
- * may be used, for example, to initialize board-specific device drivers.
+ * function called board_late_initialize(). board_late_initialize() will
+ * be called immediately after up_initialize() is called and just before
+ * the initial application is started. This additional initialization
+ * phase may be used, for example, to initialize board-specific device
+ * drivers.
*
****************************************************************************/
diff --git a/boards/arm/stm32/olimex-stm32-e407/include/board.h b/boards/arm/stm32/olimex-stm32-e407/include/board.h
index 7058cb8..04c1b17 100644
--- a/boards/arm/stm32/olimex-stm32-e407/include/board.h
+++ b/boards/arm/stm32/olimex-stm32-e407/include/board.h
@@ -42,28 +42,31 @@
* Pre-processor Definitions
****************************************************************************/
-/* Clocking *************************************************************************/
+/* Clocking *****************************************************************/
+
/* The Olimex-STM32-E407 board features a 12MHz crystal and
* a 32kHz RTC backup crystal.
*
* This is the canonical configuration:
- * System Clock source : PLL (HSE)
- * SYSCLK(Hz) : 168000000 Determined by PLL configuration
- * HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
- * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
- * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
- * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
- * HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
- * PLLM : 8 (STM32_PLLCFG_PLLM)
- * PLLN : 336 (STM32_PLLCFG_PLLN)
- * PLLP : 2 (STM32_PLLCFG_PLLP)
- * PLLQ : 7 (STM32_PLLCFG_PLLQ)
- * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
- * Flash Latency(WS) : 5
- * Prefetch Buffer : OFF
- * Instruction cache : ON
- * Data cache : ON
- * Require 48MHz for USB OTG FS, : Enabled
+ * System Clock source : PLL (HSE)
+ * SYSCLK(Hz) : 168000000 Determined by PLL configuration
+ * HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
+ * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
+ * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
+ * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
+ * HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
+ * PLLM : 8 (STM32_PLLCFG_PLLM)
+ * PLLN : 336 (STM32_PLLCFG_PLLN)
+ * PLLP : 2 (STM32_PLLCFG_PLLP)
+ * PLLQ : 7 (STM32_PLLCFG_PLLQ)
+ * Main regulator output
+ * voltage : Scale1 mode Needed for high speed SYSCLK
+ * Flash Latency(WS) : 5
+ * Prefetch Buffer : OFF
+ * Instruction cache : ON
+ * Data cache : ON
+ * Require 48MHz for : Enabled
+ * USB OTG FS,
* SDIO and RNG clock
*/
@@ -157,9 +160,11 @@
#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
-/* LED definitions ******************************************************************/
-/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any
- * way. The following definitions are used to access individual LEDs.
+/* LED definitions **********************************************************/
+
+/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status
+ * LED in any way.
+ * The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@@ -171,8 +176,9 @@
#define BOARD_LED_STATUS_BIT (1 << BOARD_LED1)
-/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the
- * Olimex STM32-E405. The following definitions describe how NuttX controls the LEDs:
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of
+ * the Olimex STM32-E405.
+ * The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED_STATUS on */
@@ -184,7 +190,8 @@
#define LED_ASSERTION 6 /* LED_STATUS off */
#define LED_PANIC 7 /* LED_STATUS blinking */
-/* Button definitions ***************************************************************/
+/* Button definitions *******************************************************/
+
/* The Olimex STM32-E405 supports one buttons: */
#define BUTTON_BUT 0
@@ -192,7 +199,7 @@
#define BUTTON_BUT_BIT (1 << BUTTON_BUT)
-/* Alternate function pin selections ************************************************/
+/* Alternate function pin selections ****************************************/
/* USART1 */
@@ -225,10 +232,10 @@
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_2 /* PB5 */
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */
-/* Ethernet *************************************************************************/
+/* Ethernet *****************************************************************/
#if defined(CONFIG_STM32_ETHMAC)
-/* RMII interface to the LAN8710 PHY (works with LAN8720 driver)*/
+/* RMII interface to the LAN8710 PHY (works with LAN8720 driver) */
# ifndef CONFIG_STM32_RMII
# error CONFIG_STM32_RMII must be defined
@@ -242,9 +249,9 @@
/* Pin disambiguation */
-# define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_1 /* PA3 */
-# define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 /* PG13 */
-# define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 /* PG14 */
+# define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_1 /* PA3 */
+# define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 /* PG13 */
+# define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 /* PG14 */
# define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 /* PG11 */
#endif
diff --git a/boards/arm/stm32/stm32_tiny/src/stm32_boot.c b/boards/arm/stm32/stm32_tiny/src/stm32_boot.c
index 635dbef..3ba691c 100644
--- a/boards/arm/stm32/stm32_tiny/src/stm32_boot.c
+++ b/boards/arm/stm32/stm32_tiny/src/stm32_boot.c
@@ -48,9 +48,10 @@
* Name: stm32_boardinitialize
*
* Description:
- * All STM32 architectures must provide the following entry point. This entry point
- * is called early in the initialization -- after all memory has been configured
- * and mapped but before any devices have been initialized.
+ * All STM32 architectures must provide the following entry point. This
+ * entry point is called early in the initialization -- after all memory
+ * has been configured and mapped but before any devices have been
+ * initialized.
*
****************************************************************************/
@@ -62,18 +63,18 @@ void stm32_boardinitialize(void)
board_autoled_initialize();
#endif
- /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
- * stm32_spidev_initialize() has been brought into the link.
+ /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
+ * function stm32_spidev_initialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
stm32_spidev_initialize();
#endif
- /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
- * disabled, and 3) the weak function stm32_usbinitialize() has been brought
- * into the build.
- */
+ /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+ * disabled, and 3) the weak function stm32_usbinitialize() has been
+ * brought into the build.
+ */
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
stm32_usbinitialize();
diff --git a/boards/arm/stm32/stm32_tiny/src/stm32_leds.c b/boards/arm/stm32/stm32_tiny/src/stm32_leds.c
index 50bd21d..768712d 100644
--- a/boards/arm/stm32/stm32_tiny/src/stm32_leds.c
+++ b/boards/arm/stm32/stm32_tiny/src/stm32_leds.c
@@ -59,6 +59,7 @@ static inline void set_led(bool v)
void board_autoled_initialize(void)
{
/* Configure LED GPIO for output */
+
stm32_configgpio(GPIO_LED);
}
@@ -68,16 +69,21 @@ void board_autoled_initialize(void)
void board_autoled_on(int led)
{
- ledinfo("board_autoled_on(%d)\n",led);
+ ledinfo("board_autoled_on(%d)\n", led);
switch (led)
{
case LED_STARTED:
case LED_HEAPALLOCATE:
- /* As the board provides only one soft controllable LED, we simply turn it on when the board boots */
+ /* As the board provides only one soft controllable LED,
+ * we simply turn it on when the board boots
+ */
+
set_led(true);
break;
case LED_PANIC:
+
/* For panic state, the LED is blinking */
+
set_led(true);
break;
}
@@ -92,7 +98,9 @@ void board_autoled_off(int led)
switch (led)
{
case LED_PANIC:
+
/* For panic state, the LED is blinking */
+
set_led(false);
break;
}
diff --git a/boards/arm/stm32/stm32_tiny/src/stm32_spi.c b/boards/arm/stm32/stm32_tiny/src/stm32_spi.c
index 7799334..4a1d1d2 100644
--- a/boards/arm/stm32/stm32_tiny/src/stm32_spi.c
+++ b/boards/arm/stm32/stm32_tiny/src/stm32_spi.c
@@ -46,7 +46,8 @@
* Name: stm32_spidev_initialize
*
* Description:
- * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32 board.
+ * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32
+ * board.
*
****************************************************************************/
@@ -72,29 +73,31 @@ void stm32_spidev_initialize(void)
* Name: stm32_spi1/2select and stm32_spi1/2status
*
* Description:
- * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
- * provided by board-specific logic. They are implementations of the select
- * and status methods of the SPI interface defined by struct spi_ops_s (see
- * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
- * are provided by common STM32 logic. To use this common SPI logic on your
- * board:
+ * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
+ * must be provided by board-specific logic. They are implementations of
+ * the select and status methods of the SPI interface defined by struct
+ * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
+ * stm32_spibus_initialize()) are provided by common STM32 logic.
+ * To use this common SPI logic on your board:
*
- * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
- * pins.
- * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
- * board-specific logic. These functions will perform chip selection and
- * status operations using GPIOs in the way your board is configured.
- * 3. Add a calls to stm32_spibus_initialize() in your low level application
- * initialization logic
- * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
- * SPI driver to higher level logic (e.g., calling
+ * 1. Provide logic in stm32_boardinitialize() to configure SPI chip
+ * select pins.
+ * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
+ * in your board-specific logic. These functions will perform chip
+ * selection and status operations using GPIOs in the way your board is
+ * configured.
+ * 3. Add a calls to stm32_spibus_initialize() in your low level
+ * application initialization logic
+ * 4. The handle returned by stm32_spibus_initialize() may then be used to
+ * bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
-void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi1select(FAR struct spi_dev_s *dev,
+ uint32_t devid, bool selected)
{
}
@@ -105,7 +108,8 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI2
-void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi2select(FAR struct spi_dev_s *dev,
+ uint32_t devid, bool selected)
{
switch (devid)
{
@@ -136,6 +140,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
default:
break;
}
+
return status;
}
diff --git a/boards/arm/stm32/stm32_tiny/src/stm32_usbdev.c b/boards/arm/stm32/stm32_tiny/src/stm32_usbdev.c
index 9ed1ddc..b6d80b7 100644
--- a/boards/arm/stm32/stm32_tiny/src/stm32_usbdev.c
+++ b/boards/arm/stm32/stm32_tiny/src/stm32_usbdev.c
@@ -61,6 +61,7 @@ void stm32_usbinitialize(void)
uinfo("called\n");
/* USB Soft Connect Pullup */
+
stm32_configgpio(GPIO_USB_PULLUP);
}
@@ -68,11 +69,13 @@ void stm32_usbinitialize(void)
* Name: stm32_usbpullup
*
* Description:
- * If USB is supported and the board supports a pullup via GPIO (for USB software
- * connect and disconnect), then the board software must provide stm32_pullup.
- * See include/nuttx/usb/usbdev.h for additional description of this method.
- * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
- * NULL.
+ * If USB is supported and the board supports a pullup via GPIO (for USB
+ * software connect and disconnect), then the board software must provide
+ * stm32_pullup.
+ * See include/nuttx/usb/usbdev.h for additional description of this
+ * method.
+ * Alternatively, if no pull-up GPIO the following EXTERN can be redefined
+ * to be NULL.
*
****************************************************************************/
@@ -87,10 +90,11 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
* Name: stm32_usbsuspend
*
* Description:
- * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
- * used. This function is called whenever the USB enters or leaves suspend mode.
- * This is an opportunity for the board logic to shutdown clocks, power, etc.
- * while the USB is suspended.
+ * Board logic must provide the stm32_usbsuspend logic if the USBDEV
+ * driver is used. This function is called whenever the USB enters or
+ * leaves suspend mode.
+ * This is an opportunity for the board logic to shutdown clocks, power,
+ * etc. while the USB is suspended.
*
****************************************************************************/
diff --git a/boards/arm/stm32/stm32f103-minimum/src/stm32_autoleds.c b/boards/arm/stm32/stm32f103-minimum/src/stm32_autoleds.c
index 990bbe4..1744399 100644
--- a/boards/arm/stm32/stm32f103-minimum/src/stm32_autoleds.c
+++ b/boards/arm/stm32/stm32f103-minimum/src/stm32_autoleds.c
@@ -69,12 +69,13 @@ void board_autoled_initialize(void)
void board_autoled_on(int led)
{
- ledinfo("board_autoled_on(%d)\n",led);
+ ledinfo("board_autoled_on(%d)\n", led);
switch (led)
{
case LED_STARTED:
case LED_HEAPALLOCATE:
+
/* As the board provides only one soft controllable LED, we simply
* turn it on when the board boots.
*/
@@ -83,6 +84,7 @@ void board_autoled_on(int led)
break;
case LED_PANIC:
+
/* For panic state, the LED is blinking */
set_led(true);
@@ -99,6 +101,7 @@ void board_autoled_off(int led)
switch (led)
{
case LED_PANIC:
+
/* For panic state, the LED is blinking */
set_led(false);
diff --git a/boards/arm/stm32/stm32f103-minimum/src/stm32_boot.c b/boards/arm/stm32/stm32f103-minimum/src/stm32_boot.c
index 737b1e7..590f3f4 100644
--- a/boards/arm/stm32/stm32f103-minimum/src/stm32_boot.c
+++ b/boards/arm/stm32/stm32f103-minimum/src/stm32_boot.c
@@ -40,9 +40,10 @@
* Name: stm32_boardinitialize
*
* Description:
- * All STM32 architectures must provide the following entry point. This entry point
- * is called early in the initialization -- after all memory has been configured
- * and mapped but before any devices have been initialized.
+ * All STM32 architectures must provide the following entry point. This
+ * entry point is called early in the initialization -- after all memory
+ * has been configured and mapped but before any devices have been
+ * initialized.
*
****************************************************************************/
@@ -54,18 +55,22 @@ void stm32_boardinitialize(void)
board_autoled_initialize();
#endif
- /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
- * stm32_spidev_initialize() has been brought into the link.
+ /* Configure SPI chip selects if
+ * 1) SPI is not disabled, and
+ * 2) the weak function stm32_spidev_initialize() has been brought into
+ * the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
stm32_spidev_initialize();
#endif
- /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
- * disabled, and 3) the weak function stm32_usbinitialize() has been brought
- * into the build.
- */
+ /* Initialize USB is
+ * 1) USBDEV is selected,
+ * 2) the USB controller is not disabled, and
+ * 3) the weak function stm32_usbinitialize() has been brought
+ * into the build.
+ */
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
stm32_usbinitialize();
@@ -76,11 +81,12 @@ void stm32_boardinitialize(void)
* Name: board_late_initialize
*
* Description:
- * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional initialization call
- * will be performed in the boot-up sequence to a function called
- * board_late_initialize(). board_late_initialize() will be called immediately after
- * up_initialize() is called and just before the initial application is started.
- * This additional initialization phase may be used, for example, to initialize
+ * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ * initialization call will be performed in the boot-up sequence to a
+ * function called board_late_initialize(). board_late_initialize()
+ * will be called immediately after up_initialize() is called and just
+ * before the initial application is started. This additional
+ * initialization phase may be used, for example, to initialize
* board-specific device drivers.
*
****************************************************************************/
@@ -89,7 +95,9 @@ void stm32_boardinitialize(void)
void board_late_initialize(void)
{
#ifndef CONFIG_LIB_BOARDCTL
- /* Perform board initialization here instead of from the board_app_initialize(). */
+ /* Perform board initialization here instead of from the
+ * board_app_initialize().
+ */
stm32_bringup();
#endif
diff --git a/boards/arm/stm32/stm32f103-minimum/src/stm32_spi.c b/boards/arm/stm32/stm32f103-minimum/src/stm32_spi.c
index d5df660..06d2d94 100644
--- a/boards/arm/stm32/stm32f103-minimum/src/stm32_spi.c
+++ b/boards/arm/stm32/stm32f103-minimum/src/stm32_spi.c
@@ -46,7 +46,8 @@
* Name: stm32_spidev_initialize
*
* Description:
- * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32 board.
+ * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32
+ * board.
*
****************************************************************************/
@@ -99,22 +100,23 @@ void stm32_spidev_initialize(void)
* Name: stm32_spi1/2select and stm32_spi1/2status
*
* Description:
- * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
- * provided by board-specific logic. They are implementations of the select
- * and status methods of the SPI interface defined by struct spi_ops_s (see
- * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
- * are provided by common STM32 logic. To use this common SPI logic on your
- * board:
+ * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
+ * must be provided by board-specific logic. They are implementations of
+ * the select and status methods of the SPI interface defined by struct
+ * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
+ * stm32_spibus_initialize()) are provided by common STM32 logic.
+ * To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
- * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
- * board-specific logic. These functions will perform chip selection and
- * status operations using GPIOs in the way your board is configured.
- * 3. Add a calls to stm32_spibus_initialize() in your low level application
- * initialization logic
- * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
- * SPI driver to higher level logic (e.g., calling
+ * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
+ * in your board-specific logic. These functions will perform chip
+ * selection and status operations using GPIOs in the way your board is
+ * configured.
+ * 3. Add a calls to stm32_spibus_initialize() in your low level
+ * application initialization logic
+ * 4. The handle returned by stm32_spibus_initialize() may then be used to
+ * bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
@@ -219,7 +221,6 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
}
#endif
-
/****************************************************************************
* Name: stm32_spi1cmddata
*
@@ -274,7 +275,6 @@ int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
}
#endif
-
return -ENODEV;
}
#endif
diff --git a/boards/arm/stm32/stm32f103-minimum/src/stm32_usbdev.c b/boards/arm/stm32/stm32f103-minimum/src/stm32_usbdev.c
index ecfe688..356d9f6 100644
--- a/boards/arm/stm32/stm32f103-minimum/src/stm32_usbdev.c
+++ b/boards/arm/stm32/stm32f103-minimum/src/stm32_usbdev.c
@@ -59,11 +59,11 @@ void stm32_usbinitialize(void)
* Name: stm32_usbpullup
*
* Description:
- * If USB is supported and the board supports a pullup via GPIO (for USB software
- * connect and disconnect), then the board software must provide stm32_pullup.
- * See include/nuttx/usb/usbdev.h for additional description of this method.
- * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
- * NULL.
+ * If USB is supported and the board supports a pullup via GPIO (for USB
+ * software connect and disconnect), then the board software must provide
+ * stm32_pullup. See include/nuttx/usb/usbdev.h for additional description
+ * of this method. Alternatively, if no pull-up GPIO the following EXTERN
+ * can be redefined to be NULL.
*
****************************************************************************/
@@ -78,10 +78,10 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
* Name: stm32_usbsuspend
*
* Description:
- * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
- * used. This function is called whenever the USB enters or leaves suspend mode.
- * This is an opportunity for the board logic to shutdown clocks, power, etc.
- * while the USB is suspended.
+ * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver
+ * is used. This function is called whenever the USB enters or leaves
+ * suspend mode. This is an opportunity for the board logic to shutdown
+ * clocks, power, etc. while the USB is suspended.
*
****************************************************************************/
diff --git a/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_spi.c b/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_spi.c
index 0a41f6a..fedbf6b 100644
--- a/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_spi.c
+++ b/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_spi.c
@@ -99,35 +99,38 @@ void stm32_spidev_initialize(void)
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
- * stm32_spibus_initialize()) are provided by common STM32 logic. To use this
- * common SPI logic on your board:
+ * stm32_spibus_initialize()) are provided by common STM32 logic.
+ * To use this common SPI logic on your board:
*
- * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
- * pins.
+ * 1. Provide logic in stm32_boardinitialize() to configure SPI chip
+ * select pins.
* 2. Provide stm32_spi1/2select() and stm32_spi1/2status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
- * 3. Add a calls to stm32_spibus_initialize() in your low level application
- * initialization logic
- * 4. The handle returned by stm32_spibus_initialize() may then be used to bind
- * the SPI driver to higher level logic (e.g., calling
+ * 3. Add a calls to stm32_spibus_initialize() in your low level
+ * application initialization logic
+ * 4. The handle returned by stm32_spibus_initialize() may then be used to
+ * bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32F0L0G0_SPI1
-void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi1select(FAR struct spi_dev_s *dev,
+ uint32_t devid, bool selected)
{
- spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
switch (devid)
{
#ifdef CONFIG_LPWAN_SX127X
case SPIDEV_LPWAN(0):
{
- spiinfo("SX127X device %s\n", selected ? "asserted" : "de-asserted");
+ spiinfo("SX127X device %s\n",
+ selected ? "asserted" : "de-asserted");
/* Set the GPIO low to select and high to de-select */
@@ -135,6 +138,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
break;
}
#endif
+
default:
{
break;
@@ -155,6 +159,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
break;
}
#endif
+
default:
{
break;
@@ -169,7 +174,8 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
- spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
diff --git a/boards/arm/stm32f7/stm32f746g-disco/src/stm32_adc.c b/boards/arm/stm32f7/stm32f746g-disco/src/stm32_adc.c
index e602790..e488390 100644
--- a/boards/arm/stm32f7/stm32f746g-disco/src/stm32_adc.c
+++ b/boards/arm/stm32f7/stm32f746g-disco/src/stm32_adc.c
@@ -57,6 +57,7 @@
#endif
/* The number of ADC channels in the conversion list */
+
/* TODO DMA */
/****************************************************************************
@@ -99,52 +100,52 @@ static const uint32_t g_pinlist[6] =
*
****************************************************************************/
- int stm32_adc_setup(void)
- {
- #ifdef CONFIG_STM32F7_ADC3
- static bool initialized = false;
- struct adc_dev_s *adc;
- int ret;
- int i;
-
- /* Check if we have already initialized */
-
- if (!initialized)
- {
- /* Configure the pins as analog inputs for the selected channels */
-
- for (i = 0; i < ADC3_NCHANNELS; i++)
- {
- stm32_configgpio(g_pinlist[i]);
- }
-
- /* Call stm32_adcinitialize() to get an instance of the ADC interface */
-
- adc = stm32_adc_initialize(3, g_chanlist, ADC3_NCHANNELS);
- if (adc == NULL)
- {
- aerr("ERROR: Failed to get ADC interface\n");
- return -ENODEV;
- }
-
- /* Register the ADC driver at "/dev/adc0" */
-
- ret = adc_register("/dev/adc3", adc);
- if (ret < 0)
- {
- aerr("ERROR: adc_register failed: %d\n", ret);
- return ret;
- }
-
- /* Now we are initialized */
-
- initialized = true;
- }
-
- return OK;
- #else
- return -ENOSYS;
- #endif
- }
+int stm32_adc_setup(void)
+{
+#ifdef CONFIG_STM32F7_ADC3
+ static bool initialized = false;
+ struct adc_dev_s *adc;
+ int ret;
+ int i;
+
+ /* Check if we have already initialized */
+
+ if (!initialized)
+ {
+ /* Configure the pins as analog inputs for the selected channels */
+
+ for (i = 0; i < ADC3_NCHANNELS; i++)
+ {
+ stm32_configgpio(g_pinlist[i]);
+ }
+
+ /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+
+ adc = stm32_adc_initialize(3, g_chanlist, ADC3_NCHANNELS);
+ if (adc == NULL)
+ {
+ aerr("ERROR: Failed to get ADC interface\n");
+ return -ENODEV;
+ }
+
+ /* Register the ADC driver at "/dev/adc0" */
+
+ ret = adc_register("/dev/adc3", adc);
+ if (ret < 0)
+ {
+ aerr("ERROR: adc_register failed: %d\n", ret);
+ return ret;
+ }
+
+ /* Now we are initialized */
+
+ initialized = true;
+ }
+
+ return OK;
+#else
+ return -ENOSYS;
+#endif
+}
#endif /* (CONFIG_ADC) && (CONFIG_STM32F7_ADC3) */
diff --git a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_timer.c b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_timer.c
index 5851e53..1a1de91 100644
--- a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_timer.c
+++ b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_timer.c
@@ -123,6 +123,7 @@ int stm32l4_timer_driver_setup(void)
syslog(LOG_ERR, "ERROR: Failed to setup TIM8 at /dev/timer7: %d\n",
}
#endif
+
#ifdef CONFIG_STM32L4_TIM15
ret = stm32l4_timer_initialize("/dev/timer8", 15);
if (ret < 0)
diff --git a/boards/arm/tms570/tms570ls31x-usb-kit/include/board.h b/boards/arm/tms570/tms570ls31x-usb-kit/include/board.h
index 48fcd04..c7e0610 100644
--- a/boards/arm/tms570/tms570ls31x-usb-kit/include/board.h
+++ b/boards/arm/tms570/tms570ls31x-usb-kit/include/board.h
@@ -91,7 +91,7 @@
#define BOARD_PLL_NR 6 /* REFCLKDIV = 5 */
#define BOARD_PLL_NF 135 /* PLLMUL = 119 * 256 */
#define BOARD_PLL_OD 2 /* ODPLL = 1 */
-#define BOARD_PLL_R 1 /* PLLDIV = 1 */
+#define BOARD_PLL_R 1 /* PLLDIV = 1 */
#define BOARD_PLL_FREQUENCY 180000000
/* Clock Sources / Dividers
@@ -240,8 +240,8 @@
*
* The launchpad has three mechanical buttons.
* Two of these are reset buttons:
- * One button is labeled PORRST performs a power-on reset and one labeled RST
- * performs an MCU reset.
+ * One button is labeled PORRST performs a power-on reset and one labeled
+ * RST performs an MCU reset.
* Only one button is available for general software usage.
* That button is labeled GIOA7 and is, obviously, sensed on GIOA7.
*
diff --git a/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c b/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c
index b500842..7b11c55 100644
--- a/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c
+++ b/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c
@@ -34,7 +34,7 @@
****************************************************************************/
/****************************************************************************
- *Included files
+ *Included Files
***************************************************************************/
#include "rx65n_macrodriver.h"
diff --git a/boards/renesas/rx65n/rx65n/src/rx65n_main.c b/boards/renesas/rx65n/rx65n/src/rx65n_main.c
index 1d71421..446e2c3 100644
--- a/boards/renesas/rx65n/rx65n/src/rx65n_main.c
+++ b/boards/renesas/rx65n/rx65n/src/rx65n_main.c
@@ -34,7 +34,7 @@
****************************************************************************/
/****************************************************************************
- *Included files
+ *Included Files
***************************************************************************/
#include "rx65n_macrodriver.h"