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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/09/08 13:41:20 UTC

[incubator-nuttx] branch master updated: Add watchdog driver support to RP2040

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 0322a61510 Add watchdog driver support to RP2040
0322a61510 is described below

commit 0322a6151020dd7cef75ded6aa33029115d86a79
Author: curuvar <58...@users.noreply.github.com>
AuthorDate: Thu Sep 8 07:37:05 2022 -0400

    Add watchdog driver support to RP2040
---
 arch/arm/include/rp2040/watchdog.h                 |  95 +++++++
 arch/arm/src/rp2040/Make.defs                      |   4 +
 arch/arm/src/rp2040/hardware/rp2040_watchdog.h     |  25 +-
 arch/arm/src/rp2040/rp2040_wdt.c                   | 281 +++++++++++++++++++++
 arch/arm/src/rp2040/rp2040_wdt.h                   |  58 +++++
 .../arm/rp2040/adafruit-feather-rp2040/README.txt  |  19 +-
 boards/arm/rp2040/adafruit-kb2040/README.txt       |  19 +-
 boards/arm/rp2040/adafruit-qt-py-rp2040/README.txt |  19 +-
 .../arm/rp2040/common/src/rp2040_common_bringup.c  |  16 ++
 boards/arm/rp2040/pimoroni-tiny2040/README.txt     |  19 +-
 boards/arm/rp2040/raspberrypi-pico-w/README.txt    |  19 +-
 boards/arm/rp2040/raspberrypi-pico/README.txt      |  19 +-
 12 files changed, 545 insertions(+), 48 deletions(-)

diff --git a/arch/arm/include/rp2040/watchdog.h b/arch/arm/include/rp2040/watchdog.h
new file mode 100644
index 0000000000..ece6412f8e
--- /dev/null
+++ b/arch/arm/include/rp2040/watchdog.h
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * arch/arm/include/rp2040/watchdog.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_RP2040_WATCHDOG_H
+#define __ARCH_ARM_INCLUDE_RP2040_WATCHDOG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/timers/watchdog.h>
+
+#ifndef __ASSEMBLY__
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#ifdef CONFIG_WATCHDOG
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IOCTL Commands ***********************************************************/
+
+/* The watchdog driver uses a standard character driver framework.  However,
+ * since the watchdog driver is a device control interface and not a data
+ * transfer interface, the majority of the functionality is implemented in
+ * driver ioctl calls.
+ *
+ * See nuttx/timers/watchdog.h for the IOCTLs handled by the upper half.
+ *
+ * These are detected and handled by the "lower half" watchdog timer driver.
+ *
+ *  WDIOC_SET_SCRATCHn  - save a 32-bit "arg" value in a scratch register
+ *                        that will be preserved over soft resets. A hard
+ *                        reset sets all scratch values to zero.
+ *
+ *  WDIOC_GET_SCRATCHn  - fetch a 32-bit value from a scratch register
+ *                        into a uint32_t pointed to by "arg".
+ */
+
+#define WDIOC_SET_SCRATCH0   _WDIOC(0x180)
+#define WDIOC_SET_SCRATCH1   _WDIOC(0x181)
+#define WDIOC_SET_SCRATCH2   _WDIOC(0x182)
+#define WDIOC_SET_SCRATCH3   _WDIOC(0x183)
+#define WDIOC_SET_SCRATCH4   _WDIOC(0x184)
+#define WDIOC_SET_SCRATCH5   _WDIOC(0x185)
+#define WDIOC_SET_SCRATCH6   _WDIOC(0x186)
+#define WDIOC_SET_SCRATCH7   _WDIOC(0x187)
+
+#define WDIOC_SET_SCRATCH(n) _WDIOC(0x180 + (n))
+
+#define WDIOC_GET_SCRATCH0   _WDIOC(0x1f0)
+#define WDIOC_GET_SCRATCH1   _WDIOC(0x1f1)
+#define WDIOC_GET_SCRATCH2   _WDIOC(0x1f2)
+#define WDIOC_GET_SCRATCH3   _WDIOC(0x1f3)
+#define WDIOC_GET_SCRATCH4   _WDIOC(0x1f4)
+#define WDIOC_GET_SCRATCH5   _WDIOC(0x1f5)
+#define WDIOC_GET_SCRATCH6   _WDIOC(0x1f6)
+#define WDIOC_GET_SCRATCH7   _WDIOC(0x1f7)
+
+#define WDIOC_GET_SCRATCH(n) _WDIOC(0x1f0 + (n))
+
+#endif /* CONFIG_WATCHDOG */
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_INCLUDE_RP2040_WATCHDOG_H */
diff --git a/arch/arm/src/rp2040/Make.defs b/arch/arm/src/rp2040/Make.defs
index d2dce8f239..9b978bb0d7 100644
--- a/arch/arm/src/rp2040/Make.defs
+++ b/arch/arm/src/rp2040/Make.defs
@@ -82,6 +82,10 @@ ifeq ($(CONFIG_IEEE80211_INFINEON_CYW43439),y)
 CHIP_CSRCS += rp2040_cyw43439.c
 endif
 
+ifeq ($(CONFIG_WATCHDOG),y)
+CHIP_CSRCS += rp2040_wdt.c
+endif
+
 ifeq ($(CONFIG_RP2040_FLASH_FILE_SYSTEM),y)
 CHIP_CSRCS += rp2040_flash_mtd.c
 CHIP_ASRCS += rp2040_flash_initialize.S
diff --git a/arch/arm/src/rp2040/hardware/rp2040_watchdog.h b/arch/arm/src/rp2040/hardware/rp2040_watchdog.h
index 2a51f300ef..83cb2ad801 100644
--- a/arch/arm/src/rp2040/hardware/rp2040_watchdog.h
+++ b/arch/arm/src/rp2040/hardware/rp2040_watchdog.h
@@ -65,18 +65,19 @@
 
 /* Register definitions *****************************************************/
 
-#define RP2040_WATCHDOG_CTRL      (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_CTRL_OFFSET)
-#define RP2040_WATCHDOG_LOAD      (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_LOAD_OFFSET)
-#define RP2040_WATCHDOG_REASON    (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_REASON_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH0  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH0_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH1  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH1_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH2  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH2_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH3  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH3_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH4  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH4_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH5  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH5_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH6  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH6_OFFSET)
-#define RP2040_WATCHDOG_SCRATCH7  (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH7_OFFSET)
-#define RP2040_WATCHDOG_TICK      (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_TICK_OFFSET)
+#define RP2040_WATCHDOG_CTRL       (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_CTRL_OFFSET)
+#define RP2040_WATCHDOG_LOAD       (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_LOAD_OFFSET)
+#define RP2040_WATCHDOG_REASON     (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_REASON_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH0   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH0_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH1   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH1_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH2   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH2_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH3   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH3_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH4   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH4_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH5   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH5_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH6   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH6_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH7   (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH7_OFFSET)
+#define RP2040_WATCHDOG_SCRATCH(n) (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH0_OFFSET + 4 * n)
+#define RP2040_WATCHDOG_TICK       (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_TICK_OFFSET)
 
 /* Register bit definitions *************************************************/
 
diff --git a/arch/arm/src/rp2040/rp2040_wdt.c b/arch/arm/src/rp2040/rp2040_wdt.c
new file mode 100644
index 0000000000..7ce6b00228
--- /dev/null
+++ b/arch/arm/src/rp2040/rp2040_wdt.c
@@ -0,0 +1,281 @@
+/****************************************************************************
+ * arch/arm/src/rp2040/rp2040_wdt.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "rp2040_wdt.h"
+
+#include <sys/types.h>
+#include <stdbool.h>
+#include <string.h>
+#include <assert.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <arch/chip/watchdog.h>
+
+#include <hardware/rp2040_watchdog.h>
+#include <hardware/rp2040_psm.h>
+
+#include <arch/rp2040/watchdog.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/clock.h>
+#include <nuttx/timers/watchdog.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define WD_RESETS_BITS   (RP2040_PSM_CLOCKS              \
+                        | RP2040_PSM_RESETS              \
+                        | RP2040_PSM_BUSFABRIC           \
+                        | RP2040_PSM_ROM                 \
+                        | RP2040_PSM_SRAM0               \
+                        | RP2040_PSM_SRAM1               \
+                        | RP2040_PSM_SRAM2               \
+                        | RP2040_PSM_SRAM3               \
+                        | RP2040_PSM_SRAM4               \
+                        | RP2040_PSM_SRAM5               \
+                        | RP2040_PSM_XIP                 \
+                        | RP2040_PSM_VREG_AND_CHIP_RESET \
+                        | RP2040_PSM_SIO                 \
+                        | RP2040_PSM_PROC0               \
+                        | RP2040_PSM_PROC1)
+
+#define WD_ENABLE_BITS   (RP2040_WATCHDOG_CTRL_ENABLE     \
+                        | RP2040_WATCHDOG_CTRL_PAUSE_DBG0 \
+                        | RP2040_WATCHDOG_CTRL_PAUSE_DBG1 \
+                        | RP2040_WATCHDOG_CTRL_PAUSE_JTAG)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure provides the private representation of the "lower-half"
+ * driver state structure.  This structure must be cast-compatible with the
+ * well-known watchdog_lowerhalf_s structure.
+ */
+
+typedef struct rp2040_watchdog_lowerhalf_s
+{
+  const struct watchdog_ops_s *ops;        /* Lower half operations */
+  uint32_t                     timeout;    /* The current timeout */
+  uint32_t                     lastreset;  /* The last reset time */
+  bool                         started;    /* True: Timer has been started */
+  xcpt_t                       handler;    /* User Handler */
+  void                        *upper;      /* Pointer to watchdog_upperhalf_s */
+} watchdog_lowerhalf_t;
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* "Lower half" driver methods **********************************************/
+
+static int  my_wdt_start      (struct watchdog_lowerhalf_s *lower);
+static int  my_wdt_stop       (struct watchdog_lowerhalf_s *lower);
+static int  my_wdt_keepalive  (struct watchdog_lowerhalf_s *lower);
+static int  my_wdt_getstatus  (struct watchdog_lowerhalf_s *lower,
+                               struct watchdog_status_s    *status);
+static int  my_wdt_settimeout (struct watchdog_lowerhalf_s *lower,
+                               uint32_t                     timeout);
+static int  my_wdt_ioctl      (struct watchdog_lowerhalf_s *lower,
+                               int                          cmd,
+                               unsigned long                arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* "Lower half" driver methods */
+
+static const struct watchdog_ops_s g_rp2040_wdg_ops =
+{
+  .start      = my_wdt_start,
+  .stop       = my_wdt_stop,
+  .keepalive  = my_wdt_keepalive,
+  .getstatus  = my_wdt_getstatus,
+  .settimeout = my_wdt_settimeout,
+  .capture    = NULL,
+  .ioctl      = my_wdt_ioctl,
+};
+
+static watchdog_lowerhalf_t g_rp2040_watchdog_lowerhalf =
+{
+  .ops   = &g_rp2040_wdg_ops,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: my_wdt_start
+ ****************************************************************************/
+
+int my_wdt_start(struct watchdog_lowerhalf_s *lower)
+{
+  watchdog_lowerhalf_t *priv = (watchdog_lowerhalf_t *)lower;
+
+  /* Convert millisecond input to microseconds
+   * Extra times 2 per errata RP2040-E1
+   */
+
+  putreg32(priv->timeout * 2000,  RP2040_WATCHDOG_LOAD);
+
+  modreg32(WD_ENABLE_BITS, WD_ENABLE_BITS, RP2040_WATCHDOG_CTRL);
+
+  modreg32(WD_RESETS_BITS, WD_RESETS_BITS, RP2040_PSM_WDSEL);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: my_wdt_stop
+ ****************************************************************************/
+
+int my_wdt_stop(struct watchdog_lowerhalf_s *lower)
+{
+  modreg32(0, RP2040_WATCHDOG_CTRL_ENABLE, RP2040_WATCHDOG_CTRL);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: my_wdt_keepalive
+ ****************************************************************************/
+
+int my_wdt_keepalive(struct watchdog_lowerhalf_s *lower)
+{
+  watchdog_lowerhalf_t *priv = (watchdog_lowerhalf_t *)lower;
+
+  /* Convert millisecond input to microseconds
+   * Extra times 2 per errata RP2040-E1
+   */
+
+  putreg32(priv->timeout * 2000,  RP2040_WATCHDOG_LOAD);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: my_wdt_getstatus
+ ****************************************************************************/
+
+int my_wdt_getstatus(struct watchdog_lowerhalf_s  *lower,
+                     struct watchdog_status_s     *status)
+{
+  watchdog_lowerhalf_t *priv = (watchdog_lowerhalf_t *)lower;
+  uint32_t              ctrl = getreg32(RP2040_WATCHDOG_CTRL);
+
+  status->flags    =  (ctrl & RP2040_WATCHDOG_CTRL_ENABLE) ? WDFLAGS_ACTIVE
+                                                           : 0;
+
+  status->timeout  =  priv->timeout;
+
+  /* Convert microseconds to output microseconds.
+   * Extra divide by 2 per errata RP2040-E1.
+   */
+
+  status->timeleft =  (ctrl & RP2040_WATCHDOG_CTRL_TIME_MASK) / 2000;
+
+  /* WARNING: On (at least) version 2 RP2040 chips, the timeleft does
+   *          not seem to be reliable.
+   */
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: my_wdt_settimeout
+ ****************************************************************************/
+
+int my_wdt_settimeout (struct watchdog_lowerhalf_s *lower, uint32_t timeout)
+{
+  watchdog_lowerhalf_t *priv  = (watchdog_lowerhalf_t *)lower;
+
+  priv->timeout = timeout > (0x7fffff / 1000) ? 0x7fffff : timeout;
+
+  /* Convert millisecond input to microseconds
+   * Extra times 2 per errata RP2040-E1
+   */
+
+  putreg32(priv->timeout * 2000,  RP2040_WATCHDOG_LOAD);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: my_wdt_ioctl
+ ****************************************************************************/
+
+int my_wdt_ioctl(struct watchdog_lowerhalf_s *lower,
+                 int                          cmd,
+                 unsigned long                arg)
+{
+  if (cmd >= WDIOC_SET_SCRATCH0  &&  cmd <= WDIOC_SET_SCRATCH7)
+    {
+      int n = cmd - WDIOC_SET_SCRATCH0;
+
+      putreg32((uint32_t) arg, RP2040_WATCHDOG_SCRATCH(n));
+
+      return OK;
+    }
+
+  if (cmd >= WDIOC_GET_SCRATCH0  &&  cmd <= WDIOC_GET_SCRATCH7)
+    {
+      int n = cmd - WDIOC_GET_SCRATCH0;
+
+      *((uint32_t *)arg) = getreg32((uint32_t) RP2040_WATCHDOG_SCRATCH(n));
+
+      return OK;
+    }
+
+  return -ENOTTY;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: rp2040_wdt_init
+ ****************************************************************************/
+
+int rp2040_wdt_init(void)
+{
+  watchdog_lowerhalf_t *lower = &g_rp2040_watchdog_lowerhalf;
+  int                   ret   = OK;
+
+  lower->upper = watchdog_register(CONFIG_WATCHDOG_DEVPATH,
+                                   (struct watchdog_lowerhalf_s *) lower);
+  if (lower->upper == NULL)
+    {
+      ret = -EEXIST;
+      goto errout;
+    }
+
+  modreg32(0, RP2040_WATCHDOG_CTRL_ENABLE, RP2040_WATCHDOG_CTRL);
+
+errout:
+  return ret;
+}
diff --git a/arch/arm/src/rp2040/rp2040_wdt.h b/arch/arm/src/rp2040/rp2040_wdt.h
new file mode 100644
index 0000000000..26e8cd6fe0
--- /dev/null
+++ b/arch/arm/src/rp2040/rp2040_wdt.h
@@ -0,0 +1,58 @@
+/****************************************************************************
+ * arch/arm/src/rp2040/rp2040_wdt.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_RP2040_RP2040_WDT_H
+#define __ARCH_ARM_SRC_RP2040_RP2040_WDT_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: rp2040_wdt_init
+ ****************************************************************************/
+
+int rp2040_wdt_init(void);
+
+#undef EXTERN
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_ARM_SRC_RP2040_RP2040_WDT_H */
diff --git a/boards/arm/rp2040/adafruit-feather-rp2040/README.txt b/boards/arm/rp2040/adafruit-feather-rp2040/README.txt
index 313f36672f..99bd47bd0c 100644
--- a/boards/arm/rp2040/adafruit-feather-rp2040/README.txt
+++ b/boards/arm/rp2040/adafruit-feather-rp2040/README.txt
@@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Adafruit Feather RP2040.
 See https://www.adafruit.com/product/4884 for information
 about Adafruit Feather RP2040.
 
-Currently only the following devices are supported.
-
-  Supported:
+NuttX supports the following RP2040 capabilities:
   - UART  (console port)
     - GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
   - I2C
-  - SPI
+  - SPI (master only)
   - DMAC
   - PWM
   - ADC
+  - Watchdog
   - USB device
     - MSC, CDC/ACM serial and these composite device are supported.
     - CDC/ACM serial device can be used for the console.
@@ -23,15 +22,23 @@ Currently only the following devices are supported.
   - SRAM Boot
     - If Pico SDK is available, nuttx.uf2 file which can be used in
       BOOTSEL mode will be created.
+  - Persistent flash filesystem in unused flash ROM
+
+NuttX also provide support for these external devices:
+
   - BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - Pico Display Pack (ST7789 LCD)
     - RGB leds and buttons are not supported yet.
   - Pico Audio Pack (PCM5100A I2S DAC)
     - I2S interface is realized by PIO.
+  - WS2812 smart pixel support
 
-  Not supported:
-  - All other devices
+There is currently no direct user mode access to these RP2040 hardware features:
+  - SPI Slave Mode
+  - SSI
+  - RTC
+  - Timers
 
 Installation
 ============
diff --git a/boards/arm/rp2040/adafruit-kb2040/README.txt b/boards/arm/rp2040/adafruit-kb2040/README.txt
index 082dcba688..52c7359e25 100644
--- a/boards/arm/rp2040/adafruit-kb2040/README.txt
+++ b/boards/arm/rp2040/adafruit-kb2040/README.txt
@@ -4,16 +4,15 @@ README
 This directory contains the port of NuttX to the Adafruit KB2040.
 See https://www.adafruit.com/product/5302 for information about Adafruit KB2040.
 
-Currently only the following devices are supported.
-
-  Supported:
+NuttX supports the following RP2040 capabilities:
   - UART  (console port)
     - GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
   - I2C
-  - SPI
+  - SPI (master only)
   - DMAC
   - PWM
   - ADC
+  - Watchdog
   - USB device
     - MSC, CDC/ACM serial and these composite device are supported.
     - CDC/ACM serial device can be used for the console.
@@ -22,15 +21,23 @@ Currently only the following devices are supported.
   - SRAM Boot
     - If Pico SDK is available, nuttx.uf2 file which can be used in
       BOOTSEL mode will be created.
+  - Persistent flash filesystem in unused flash ROM
+
+NuttX also provide support for these external devices:
+
   - BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - Pico Display Pack (ST7789 LCD)
     - RGB leds and buttons are not supported yet.
   - Pico Audio Pack (PCM5100A I2S DAC)
     - I2S interface is realized by PIO.
+  - WS2812 smart pixel support
 
-  Not supported:
-  - All other devices
+There is currently no direct user mode access to these RP2040 hardware features:
+  - SPI Slave Mode
+  - SSI
+  - RTC
+  - Timers
 
 Installation
 ============
diff --git a/boards/arm/rp2040/adafruit-qt-py-rp2040/README.txt b/boards/arm/rp2040/adafruit-qt-py-rp2040/README.txt
index 925782094b..d2617bb8b1 100644
--- a/boards/arm/rp2040/adafruit-qt-py-rp2040/README.txt
+++ b/boards/arm/rp2040/adafruit-qt-py-rp2040/README.txt
@@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Adafruit QT Py RP2040.
 See https://learn.adafruit.com/adafruit-qt-py-2040 for information 
 about Adafruit QT Py RP2040.
 
-Currently only the following devices are supported.
-
-  Supported:
+NuttX supports the following RP2040 capabilities:
   - UART  (console port)
     - GPIO 5 (UART1 RX) and GPIO 20 (UART1 TX) are used for the console.
   - I2C
-  - SPI
+  - SPI (master only)
   - DMAC
   - PWM
   - ADC
+  - Watchdog
   - USB device
     - MSC, CDC/ACM serial and these composite device are supported.
     - CDC/ACM serial device can be used for the console.
@@ -23,9 +22,17 @@ Currently only the following devices are supported.
   - SRAM Boot
     - If Pico SDK is available, nuttx.uf2 file which can be used in
       BOOTSEL mode will be created.
+  - Persistent flash filesystem in unused flash ROM
+
+NuttX also provide support for these external devices:
+
+  - WS2812 smart pixel support
 
-  Not supported:
-  - All other devices
+There is currently no direct user mode access to these RP2040 hardware features:
+  - SPI Slave Mode
+  - SSI
+  - RTC
+  - Timers
 
 Installation
 ============
diff --git a/boards/arm/rp2040/common/src/rp2040_common_bringup.c b/boards/arm/rp2040/common/src/rp2040_common_bringup.c
index bfdbea5256..ac3adfe685 100644
--- a/boards/arm/rp2040/common/src/rp2040_common_bringup.c
+++ b/boards/arm/rp2040/common/src/rp2040_common_bringup.c
@@ -76,6 +76,10 @@
 #include "rp2040_ws2812.h"
 #endif
 
+#ifdef CONFIG_WATCHDOG
+#  include "rp2040_wdt.h"
+#endif
+
 #if defined(CONFIG_RP2040_ROMFS_ROMDISK_DEVNAME)
 #  include <rp2040_romfsimg.h>
 #endif
@@ -584,6 +588,18 @@ int rp2040_common_bringup(void)
     }
 #endif
 
+#ifdef CONFIG_WATCHDOG
+  /* Configure watchdog timer */
+
+  ret = rp2040_wdt_init();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to initialize watchdog drivers: %d\n",
+             ret);
+    }
+#endif
+
 #ifdef CONFIG_RP2040_FLASH_FILE_SYSTEM
 
   mtd_dev = rp2040_flash_mtd_initialize();
diff --git a/boards/arm/rp2040/pimoroni-tiny2040/README.txt b/boards/arm/rp2040/pimoroni-tiny2040/README.txt
index 76668788a1..45f6fc122b 100644
--- a/boards/arm/rp2040/pimoroni-tiny2040/README.txt
+++ b/boards/arm/rp2040/pimoroni-tiny2040/README.txt
@@ -8,16 +8,15 @@ for information about Pimoroni Tiny 2040.
 The Pimoroni Tiny 2040 has two buttons (RESET and BOOT) allowing to boot
 from ROM without disconnecting the device.
 
-Currently only the following devices are supported.
-
-  Supported:
+NuttX supports the following RP2040 capabilities:
   - UART  (console port)
     - GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
   - I2C (not tested on Tiny 2040)
-  - SPI
+  - SPI (master only)
   - DMAC
   - PWM
   - ADC
+  - Watchdog
   - USB device
     - MSC, CDC/ACM serial and these composite device are supported.
     - CDC/ACM serial device can be used for the console.
@@ -26,9 +25,17 @@ Currently only the following devices are supported.
   - SRAM Boot
     - If Pico SDK is available, nuttx.uf2 file which can be used in
       BOOTSEL mode will be created.
+  - Persistent flash filesystem in unused flash ROM
+
+NuttX also provide support for these external devices:
+
+  - WS2812 smart pixel support
 
-  Not supported:
-  - All other devices
+There is currently no direct user mode access to these RP2040 hardware features:
+  - SPI Slave Mode
+  - SSI
+  - RTC
+  - Timers
 
 Installation
 ============
diff --git a/boards/arm/rp2040/raspberrypi-pico-w/README.txt b/boards/arm/rp2040/raspberrypi-pico-w/README.txt
index 4940494200..109478555e 100644
--- a/boards/arm/rp2040/raspberrypi-pico-w/README.txt
+++ b/boards/arm/rp2040/raspberrypi-pico-w/README.txt
@@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Raspberry Pi Pico.
 See https://www.raspberrypi.org/products/raspberry-pi-pico/ for information
 about Raspberry Pi Pico W
 
-Currently only the following devices are supported.
-
-  Supported:
+NuttX supports the following RP2040 capabilities:
   - UART  (console port)
     - GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
   - I2C
-  - SPI
+  - SPI (master only)
   - DMAC
   - PWM
   - ADC
+  - Watchdog
   - USB device
     - MSC, CDC/ACM serial and these composite device are supported.
     - CDC/ACM serial device can be used for the console.
@@ -23,16 +22,24 @@ Currently only the following devices are supported.
   - SRAM Boot
     - If Pico SDK is available, nuttx.uf2 file which can be used in
       BOOTSEL mode will be created.
+  - Persistent flash filesystem in unused flash ROM
   - WiFi wireless communication
+
+NuttX also provide support for these external devices:
+
   - BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - Pico Display Pack (ST7789 LCD)
     - RGB leds and buttons are not supported yet.
   - Pico Audio Pack (PCM5100A I2S DAC)
     - I2S interface is realized by PIO.
+  - WS2812 smart pixel support
 
-  Not supported:
-  - All other devices
+There is currently no direct user mode access to these RP2040 hardware features:
+  - SPI Slave Mode
+  - SSI
+  - RTC
+  - Timers
 
 Installation
 ============
diff --git a/boards/arm/rp2040/raspberrypi-pico/README.txt b/boards/arm/rp2040/raspberrypi-pico/README.txt
index a6826e0f7b..81e6434b0b 100644
--- a/boards/arm/rp2040/raspberrypi-pico/README.txt
+++ b/boards/arm/rp2040/raspberrypi-pico/README.txt
@@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Raspberry Pi Pico.
 See https://www.raspberrypi.org/products/raspberry-pi-pico/ for information
 about Raspberry Pi Pico.
 
-Currently only the following devices are supported.
-
-  Supported:
+NuttX supports the following RP2040 capabilities:
   - UART  (console port)
     - GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
   - I2C
-  - SPI
+  - SPI (master only)
   - DMAC
   - PWM
   - ADC
+  - Watchdog
   - USB device
     - MSC, CDC/ACM serial and these composite device are supported.
     - CDC/ACM serial device can be used for the console.
@@ -23,15 +22,23 @@ Currently only the following devices are supported.
   - SRAM Boot
     - If Pico SDK is available, nuttx.uf2 file which can be used in
       BOOTSEL mode will be created.
+  - Persistent flash filesystem in unused flash ROM
+
+NuttX also provide support for these external devices:
+
   - BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
   - Pico Display Pack (ST7789 LCD)
     - RGB leds and buttons are not supported yet.
   - Pico Audio Pack (PCM5100A I2S DAC)
     - I2S interface is realized by PIO.
+  - WS2812 smart pixel support
 
-  Not supported:
-  - All other devices
+There is currently no direct user mode access to these RP2040 hardware features:
+  - SPI Slave Mode
+  - SSI
+  - RTC
+  - Timers
 
 Installation
 ============