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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/04/11 17:59:43 UTC
[incubator-nuttx] 03/03: RISC-V: Add setintstack for k210 and qemu
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 2670f143b58b8b97eae2ba0e6ee28771b74deeee
Author: Ville Juven <vi...@unikie.com>
AuthorDate: Fri Apr 8 08:59:34 2022 +0300
RISC-V: Add setintstack for k210 and qemu
This fixes CI issue, and I think the old implementation with SMP
shared 1 IRQ stack for multiple CPUs.
---
arch/risc-v/src/k210/chip.h | 28 ++++++++++++++++++++++++++++
arch/risc-v/src/qemu-rv/chip.h | 30 +++++++++++++++++++++++++++++-
2 files changed, 57 insertions(+), 1 deletion(-)
diff --git a/arch/risc-v/src/k210/chip.h b/arch/risc-v/src/k210/chip.h
index 69a7db77ab..9592bb54ce 100644
--- a/arch/risc-v/src/k210/chip.h
+++ b/arch/risc-v/src/k210/chip.h
@@ -29,4 +29,32 @@
#include "k210_memorymap.h"
+#include "riscv_internal.h"
+
+/****************************************************************************
+ * Macro Definitions
+ ****************************************************************************/
+
+#ifdef __ASSEMBLY__
+
+/****************************************************************************
+ * Name: setintstack
+ *
+ * Description:
+ * Set the current stack pointer to the "top" the correct interrupt stack
+ * for the current CPU.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15
+.macro setintstack tmp0, tmp1
+ csrr \tmp0, mhartid
+ li \tmp1, STACK_ALIGN_DOWN(CONFIG_ARCH_INTERRUPTSTACK)
+ mul \tmp1, \tmp0, \tmp1
+ la \tmp0, g_intstacktop
+ sub sp, \tmp0, \tmp1
+.endm
+#endif /* CONFIG_SMP && CONFIG_ARCH_INTERRUPTSTACK > 15 */
+
+#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_K210_CHIP_H */
diff --git a/arch/risc-v/src/qemu-rv/chip.h b/arch/risc-v/src/qemu-rv/chip.h
index 6f9ea47380..3d8d05d75f 100644
--- a/arch/risc-v/src/qemu-rv/chip.h
+++ b/arch/risc-v/src/qemu-rv/chip.h
@@ -38,7 +38,7 @@
extern void up_earlyserialinit(void);
extern void up_serialinit(void);
-#endif
+#endif /* __ASSEMBLY__ */
#include "qemu_rv_memorymap.h"
@@ -46,4 +46,32 @@ extern void up_serialinit(void);
#include "hardware/qemu_rv_memorymap.h"
#include "hardware/qemu_rv_plic.h"
+#include "riscv_internal.h"
+
+/****************************************************************************
+ * Macro Definitions
+ ****************************************************************************/
+
+#ifdef __ASSEMBLY__
+
+/****************************************************************************
+ * Name: setintstack
+ *
+ * Description:
+ * Set the current stack pointer to the "top" the correct interrupt stack
+ * for the current CPU.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15
+.macro setintstack tmp0, tmp1
+ csrr \tmp0, mhartid
+ li \tmp1, STACK_ALIGN_DOWN(CONFIG_ARCH_INTERRUPTSTACK)
+ mul \tmp1, \tmp0, \tmp1
+ la \tmp0, g_intstacktop
+ sub sp, \tmp0, \tmp1
+.endm
+#endif /* CONFIG_SMP && CONFIG_ARCH_INTERRUPTSTACK > 15 */
+
+#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_QEMU_RV_CHIP_H */