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Posted to commits@nuttx.apache.org by xi...@apache.org on 2023/10/23 06:28:33 UTC

[nuttx] branch master updated: boards/stm32: add support to STM32F401RC-RS485 board

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 21ba49408c boards/stm32: add support to STM32F401RC-RS485 board
21ba49408c is described below

commit 21ba49408ccc3cda0a9a59fd1dd2475651eaab3f
Author: Rodrigo Sim <rc...@gmail.com>
AuthorDate: Sat Oct 14 17:11:19 2023 -0300

    boards/stm32: add support to STM32F401RC-RS485 board
    
    The STM32F401RC-RS485 is a board with RS485 support, SD Card, buttons,
    leds, temperature sensor, adc and etc.
    
    Signed-off-by: Rodrigo Sim rcsim10@gmail.com
---
 boards/Kconfig                                     |  14 +
 boards/arm/stm32/stm32f401rc-rs485/CMakeLists.txt  |  21 ++
 boards/arm/stm32/stm32f401rc-rs485/Kconfig         |   8 +
 .../stm32/stm32f401rc-rs485/configs/nsh/defconfig  |  48 +++
 boards/arm/stm32/stm32f401rc-rs485/include/board.h | 401 +++++++++++++++++++++
 .../arm/stm32/stm32f401rc-rs485/scripts/Make.defs  |  43 +++
 .../arm/stm32/stm32f401rc-rs485/scripts/ld.script  | 107 ++++++
 .../arm/stm32/stm32f401rc-rs485/src/CMakeLists.txt |  35 ++
 boards/arm/stm32/stm32f401rc-rs485/src/Make.defs   |  36 ++
 .../stm32/stm32f401rc-rs485/src/stm32_appinit.c    |  76 ++++
 .../stm32/stm32f401rc-rs485/src/stm32_autoleds.c   |  81 +++++
 .../arm/stm32/stm32f401rc-rs485/src/stm32_boot.c   |  85 +++++
 .../stm32/stm32f401rc-rs485/src/stm32_bringup.c    |  65 ++++
 .../stm32f401rc-rs485/src/stm32f401rc-rs485.h      | 309 ++++++++++++++++
 14 files changed, 1329 insertions(+)

diff --git a/boards/Kconfig b/boards/Kconfig
index 800e01d091..d899ca8e0a 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -1604,6 +1604,16 @@ config ARCH_BOARD_NUCLEO_F401RE
 		This is a minimal configuration that supports low-level test of the
 		Nucleo F401RE in the NuttX source tree.
 
+config ARCH_BOARD_STM32F401RC_RS485
+	bool "STM32F401RC-RS485 Board"
+	depends on ARCH_CHIP_STM32F401RC
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		This is a minimal configuration that supports low-level test of the
+		STM32F401RC-RS485 in the NuttX source tree.
+
 config ARCH_BOARD_NUCLEO_F410RB
 	bool "STM32F410 Nucleo F410RB"
 	depends on ARCH_CHIP_STM32F410RB
@@ -3144,6 +3154,7 @@ config ARCH_BOARD
 	default "nucleo-f303ze"             if ARCH_BOARD_NUCLEO_F303ZE
 	default "nucleo-f334r8"             if ARCH_BOARD_NUCLEO_F334R8
 	default "nucleo-f4x1re"             if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
+	default "stm32f401rc-rs485"         if ARCH_BOARD_STM32F401RC_RS485
 	default "nucleo-f429zi"             if ARCH_BOARD_NUCLEO_F429ZI
 	default "nucleo-f446re"             if ARCH_BOARD_NUCLEO_F446RE
 	default "nucleo-f410rb"             if ARCH_BOARD_NUCLEO_F410RB
@@ -3860,6 +3871,9 @@ endif
 if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
 source "boards/arm/stm32/nucleo-f4x1re/Kconfig"
 endif
+if ARCH_BOARD_STM32F401RC_RS485
+source "boards/arm/stm32/stm32f401rc-rs485/Kconfig"
+endif
 if ARCH_BOARD_NUCLEO_F429ZI
 source "boards/arm/stm32/nucleo-f429zi/Kconfig"
 endif
diff --git a/boards/arm/stm32/stm32f401rc-rs485/CMakeLists.txt b/boards/arm/stm32/stm32f401rc-rs485/CMakeLists.txt
new file mode 100644
index 0000000000..6f0b58e2db
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/CMakeLists.txt
@@ -0,0 +1,21 @@
+# ##############################################################################
+# boards/arm/stm32/stm32f401rc-rs485/CMakeLists.txt
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
diff --git a/boards/arm/stm32/stm32f401rc-rs485/Kconfig b/boards/arm/stm32/stm32f401rc-rs485/Kconfig
new file mode 100644
index 0000000000..9d05b0d826
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_STM32F401RC_RS485
+
+endif # ARCH_BOARD_STM32F401RC_RS485
diff --git a/boards/arm/stm32/stm32f401rc-rs485/configs/nsh/defconfig b/boards/arm/stm32/stm32f401rc-rs485/configs/nsh/defconfig
new file mode 100644
index 0000000000..38de140a62
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/configs/nsh/defconfig
@@ -0,0 +1,48 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="stm32f401rc-rs485"
+CONFIG_ARCH_BOARD_STM32F401RC_RS485=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32F401RC=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=8499
+CONFIG_BUILTIN=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=98304
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SPI=y
+CONFIG_START_DAY=5
+CONFIG_START_MONTH=5
+CONFIG_START_YEAR=2014
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_USART2=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART2_SERIAL_CONSOLE=y
diff --git a/boards/arm/stm32/stm32f401rc-rs485/include/board.h b/boards/arm/stm32/stm32f401rc-rs485/include/board.h
new file mode 100644
index 0000000000..947d49d8bc
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/include/board.h
@@ -0,0 +1,401 @@
+/****************************************************************************
+ * boards/arm/stm32/stm32f401rc-rs485/include/board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32F401RC_RS485_INCLUDE_BOARD_H
+#define __BOARDS_ARM_STM32F401RC_RS485_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#ifndef __ASSEMBLY__
+#  include <stdint.h>
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* The STM32F401RC-RS485 supports both HSE and LSE crystals (X2 and X3).
+ * However, as shipped, the X2 and X3 crystals are not populated.
+ * Therefore the Nucleo-F401RE will need to run off the 16MHz HSI clock.
+ *
+ *   System Clock source           : PLL (HSI)
+ *   SYSCLK(Hz)                    : 84000000     Determined by PLL
+ *                                                configuration
+ *   HCLK(Hz)                      : 84000000     (STM32_RCC_CFGR_HPRE)
+ *   AHB Prescaler                 : 1            (STM32_RCC_CFGR_HPRE)
+ *   APB1 Prescaler                : 2            (STM32_RCC_CFGR_PPRE1)
+ *   APB2 Prescaler                : 1            (STM32_RCC_CFGR_PPRE2)
+ *   HSI Frequency(Hz)             : 16000000     (nominal)
+ *   PLLM                          : 16           (STM32_PLLCFG_PLLM)
+ *   PLLN                          : 336          (STM32_PLLCFG_PLLN)
+ *   PLLP                          : 4            (STM32_PLLCFG_PLLP)
+ *   PLLQ                          : 7            (STM32_PLLCFG_PPQ)
+ *   Flash Latency(WS)             : 5
+ *   Prefetch Buffer               : OFF
+ *   Instruction cache             : ON
+ *   Data cache                    : ON
+ *   Require 48MHz for USB OTG FS, : Enabled
+ *   SDIO and RNG clock
+ */
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC
+ * HSE - not installed
+ * LSE - not installed
+ */
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_BOARD_USEHSI      1
+
+/* Main PLL Configuration.
+ *
+ * Formulae:
+ *
+ *   VCO input frequency        = PLL input clock frequency / PLLM,
+ *                                2 <= PLLM <= 63
+ *   VCO output frequency       = VCO input frequency × PLLN,
+ *                                192 <= PLLN <= 432
+ *   PLL output clock frequency = VCO frequency / PLLP,
+ *                                PLLP = 2, 4, 6, or 8
+ *   USB OTG FS clock frequency = VCO frequency / PLLQ,
+ *                                2 <= PLLQ <= 15
+ *
+ * We would like to have SYSYCLK=84MHz and we must have the USB clock= 48MHz.
+ * Some possible solutions include:
+ *
+ *   PLLN=210 PLLM=5  PLLP=8 PLLQ=14 SYSCLK=84000000 OTGFS=48000000
+ *   PLLN=210 PLLM=10 PLLP=4 PLLQ=7  SYSCLK=84000000 OTGFS=48000000
+ *   PLLN=336 PLLM=8  PLLP=8 PLLQ=14 SYSCLK=84000000 OTGFS=48000000
+ *   PLLN=336 PLLM=16 PLLP=4 PLLQ=7  SYSCLK=84000000 OTGFS=48000000
+ *   PLLN=420 PLLM=10 PLLP=8 PLLQ=14 SYSCLK=84000000 OTGFS=48000000
+ *   PLLN=420 PLLM=20 PLLP=4 PLLQ=7  SYSCLK=84000000 OTGFS=48000000
+ *
+ * We will configure like this
+ *
+ *   PLL source is HSI
+ *   PLL_VCO = (STM32_HSI_FREQUENCY / PLLM) * PLLN
+ *           = (16,000,000 / 16) * 336
+ *           = 336,000,000
+ *   SYSCLK  = PLL_VCO / PLLP
+ *           = 336,000,000 / 4 = 84,000,000
+ *   USB OTG FS and SDIO Clock
+ *           = PLL_VCO / PLLQ
+ *           = 336,000,000 / 7 = 48,000,000
+ *
+ * REVISIT: Trimming of the HSI is not yet supported.
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(16)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(336)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_4
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(7)
+
+#define STM32_SYSCLK_FREQUENCY  84000000ul
+
+/* AHB clock (HCLK) is SYSCLK (84MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK      /* HCLK  = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
+
+/* APB1 clock (PCLK1) is HCLK/2 (42MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2     /* PCLK1 = HCLK / 2 */
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+/* REVISIT */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK (84MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK       /* PCLK2 = HCLK / 1 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/1)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+/* REVISIT */
+
+#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
+
+/* REVISIT */
+
+#define BOARD_TIM1_FREQUENCY    (2*STM32_PCLK2_FREQUENCY)
+#define BOARD_TIM2_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM3_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM4_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM5_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM6_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM7_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM8_FREQUENCY    (2*STM32_PCLK2_FREQUENCY)
+
+/* SDIO dividers.  Note that slower clocking is required when DMA is disabled
+ * in order to avoid RX overrun/TX underrun errors due to delayed responses
+ * to service FIFOs in interrupt driven mode.  These values have not been
+ * tuned!!!
+ *
+ * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
+ */
+
+/* REVISIT */
+
+#define SDIO_INIT_CLKDIV        (178 << SDIO_CLKCR_CLKDIV_SHIFT)
+
+/* DMA ON:  HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
+ * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
+ */
+
+/* REVISIT */
+
+#ifdef CONFIG_SDIO_DMA
+#  define SDIO_MMCXFR_CLKDIV    (2 << SDIO_CLKCR_CLKDIV_SHIFT)
+#else
+#  define SDIO_MMCXFR_CLKDIV    (3 << SDIO_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* DMA ON:  HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
+ * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
+ */
+
+/* REVISIT */
+
+#ifdef CONFIG_SDIO_DMA
+#  define SDIO_SDXFR_CLKDIV     (1 << SDIO_CLKCR_CLKDIV_SHIFT)
+#else
+#  define SDIO_SDXFR_CLKDIV     (3 << SDIO_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* DMA Channel/Stream Selections ********************************************/
+
+/* Stream selections are arbitrary for now but might become important in
+ * the future is we set aside more DMA channels/streams.
+ *
+ * SDIO DMA
+ *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
+ *   DMAMAP_SDIO_2 = Channel 4, Stream 6
+ */
+
+#define DMAMAP_SDIO DMAMAP_SDIO_1
+
+/* Need to VERIFY fwb */
+
+#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1
+#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1
+#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
+#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
+
+/* Alternate function pin selections ****************************************/
+
+/* USART1:
+ *   RXD: PA10  CN9 pin 3, CN10 pin 33
+ *        PB7   CN7 pin 21
+ *   TXD: PA9   CN5 pin 1, CN10 pin 21
+ *        PB6   CN5 pin 3, CN10 pin 17
+ */
+
+#if 1
+#  define GPIO_USART1_RX GPIO_USART1_RX_1    /* PA10 */
+#  define GPIO_USART1_TX GPIO_USART1_TX_1    /* PA9  */
+#else
+#  define GPIO_USART1_RX GPIO_USART1_RX_2    /* PB7 */
+#  define GPIO_USART1_TX GPIO_USART1_TX_2    /* PB6  */
+#endif
+
+/* USART2:
+ *   RXD: PA3   CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37
+ *        PD6
+ *   TXD: PA2   CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35
+ *        PD5
+ */
+
+#define GPIO_USART2_RX   GPIO_USART2_RX_1    /* PA3 */
+#define GPIO_USART2_TX   GPIO_USART2_TX_1    /* PA2 */
+#define GPIO_USART2_RTS  GPIO_USART2_RTS_2
+#define GPIO_USART2_CTS  GPIO_USART2_CTS_2
+
+/* USART6:
+ *  RXD: PC7    CN5 pin2, CN10 pin 19
+ *       PA12   CN10, pin 12
+ *  TXD: PC6    CN10, pin 4
+ *       PA11   CN10, pin 14
+ */
+
+#define GPIO_USART6_RX   GPIO_USART6_RX_1    /* PC7 */
+#define GPIO_USART6_TX   GPIO_USART6_TX_1    /* PC6 */
+
+/* UART RX DMA configurations */
+
+#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
+#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
+
+/* I2C
+ *
+ * The optional _GPIO configurations allow the I2C driver to manually
+ * reset the bus to clear stuck slaves.  They match the pin configuration,
+ * but are normally-high GPIOs.
+ */
+
+#define GPIO_I2C1_SCL    GPIO_I2C1_SCL_2
+#define GPIO_I2C1_SDA    GPIO_I2C1_SDA_2
+#define GPIO_I2C1_SCL_GPIO \
+   (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_I2C1_SDA_GPIO \
+   (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
+
+#define GPIO_I2C2_SCL    GPIO_I2C2_SCL_1
+#define GPIO_I2C2_SDA    GPIO_I2C2_SDA_1
+#define GPIO_I2C2_SCL_GPIO \
+   (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO \
+   (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
+
+/* SPI
+ *
+ * There are sensors on SPI1, and SPI2 is connected to the FRAM.
+ */
+
+#define GPIO_SPI1_MISO   GPIO_SPI1_MISO_1
+#define GPIO_SPI1_MOSI   GPIO_SPI1_MOSI_1
+#define GPIO_SPI1_SCK    GPIO_SPI1_SCK_1
+
+#define GPIO_SPI2_MISO   GPIO_SPI2_MISO_1
+#define GPIO_SPI2_MOSI   GPIO_SPI2_MOSI_1
+#define GPIO_SPI2_SCK    GPIO_SPI2_SCK_2
+
+/* LEDs
+ *
+ * The Nucleo F401RE and F411RE boards provide a single user LED, LD2.  LD2
+ * is the green LED connected to Arduino signal D13 corresponding to MCU I/O
+ * PA5 (pin 21) or PB13 (pin 34) depending on the STM32 target.
+ *
+ *   - When the I/O is HIGH value, the LED is on.
+ *   - When the I/O is LOW, the LED is off.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LD2         0
+#define BOARD_NLEDS       1
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LD2_BIT     (1 << BOARD_LD2)
+
+/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
+ * defined.  In that case, the usage by the board port is defined in
+ * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
+ * events as follows when the red LED (PE24) is available:
+ *
+ *   SYMBOL                Meaning                   LD2
+ *   -------------------  -----------------------  -----------
+ *   LED_STARTED          NuttX has been started     OFF
+ *   LED_HEAPALLOCATE     Heap has been allocated    OFF
+ *   LED_IRQSENABLED      Interrupts enabled         OFF
+ *   LED_STACKCREATED     Idle stack created         ON
+ *   LED_INIRQ            In an interrupt            No change
+ *   LED_SIGNAL           In a signal handler        No change
+ *   LED_ASSERTION        An assertion failed        No change
+ *   LED_PANIC            The system has crashed     Blinking
+ *   LED_IDLE             MCU is is sleep mode       Not used
+ *
+ * Thus if LD2, NuttX has successfully booted and is, apparently, running
+ * normally.  If LD2 is flashing at approximately 2Hz, then a fatal error
+ * has been detected and the system has halted.
+ */
+
+#define LED_STARTED      0
+#define LED_HEAPALLOCATE 0
+#define LED_IRQSENABLED  0
+#define LED_STACKCREATED 1
+#define LED_INIRQ        2
+#define LED_SIGNAL       2
+#define LED_ASSERTION    2
+#define LED_PANIC        1
+
+/* Buttons
+ *
+ *   B1 USER:
+ *   the user button is connected to the I/O PC13 (pin 2) of the STM32
+ *   microcontroller.
+ */
+
+#define BUTTON_USER        0
+#define NUM_BUTTONS        1
+
+#define BUTTON_USER_BIT    (1 << BUTTON_USER)
+
+#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP)
+#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP)
+
+#endif /* __BOARDS_ARM_STM32F401RC_RS485_INCLUDE_BOARD_H */
diff --git a/boards/arm/stm32/stm32f401rc-rs485/scripts/Make.defs b/boards/arm/stm32/stm32f401rc-rs485/scripts/Make.defs
new file mode 100644
index 0000000000..88f3b074ce
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/scripts/Make.defs
@@ -0,0 +1,43 @@
+############################################################################
+# boards/arm/stm32/stm32f401rc-rs485/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(CONFIG_ARCH_CHIP_STM32F401RC),y)
+LDSCRIPT = ld.script
+endif
+
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
+
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS := $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
diff --git a/boards/arm/stm32/stm32f401rc-rs485/scripts/ld.script b/boards/arm/stm32/stm32f401rc-rs485/scripts/ld.script
new file mode 100644
index 0000000000..e88b129682
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/scripts/ld.script
@@ -0,0 +1,107 @@
+/****************************************************************************
+ * boards/arm/stm32/stm32f401rc-rs485/scripts/ld.script
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The STM32F401RC has 128Kb of FLASH beginning at address 0x0800:0000 and
+ * 64Kb of SRAM beginning at address 0x2000:0000.  When booting from FLASH,
+ * FLASH memory is aliased to address 0x0000:0000 where the code expects to
+ * begin execution by jumping to the entry point in the 0x0800:0000 address
+ * range.
+ */
+
+MEMORY
+{
+  flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+  sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > flash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+        KEEP(*(.init_array .ctors))
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > flash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > flash
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    /* The STM32F401RC has 128Kb of SRAM beginning at the following address */
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram AT > flash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > sram
+
+    /* Stabs debugging sections. */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/stm32/stm32f401rc-rs485/src/CMakeLists.txt b/boards/arm/stm32/stm32f401rc-rs485/src/CMakeLists.txt
new file mode 100644
index 0000000000..9162a3204b
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/src/CMakeLists.txt
@@ -0,0 +1,35 @@
+# ##############################################################################
+# boards/arm/stm32/smt32f401rc-rs485/src/CMakeLists.txt
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS stm32_boot.c stm32_bringup.c)
+
+if(CONFIG_ARCH_LEDS)
+  list(APPEND SRCS stm32_autoleds.c)
+endif()
+
+if(CONFIG_BOARDCTL)
+  list(APPEND SRCS stm32_appinit.c)
+endif()
+
+target_sources(board PRIVATE ${SRCS})
+
+if(CONFIG_ARCH_CHIP_STM32F401RC)
+  set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/ld.script")
+endif()
diff --git a/boards/arm/stm32/stm32f401rc-rs485/src/Make.defs b/boards/arm/stm32/stm32f401rc-rs485/src/Make.defs
new file mode 100644
index 0000000000..ba63091126
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/src/Make.defs
@@ -0,0 +1,36 @@
+############################################################################
+# boards/arm/stm32/smt32f401rc-rs485/src/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+
+CSRCS = stm32_boot.c stm32_bringup.c
+
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += stm32_autoleds.c
+endif
+
+ifeq ($(CONFIG_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
+DEPPATH += --dep-path board
+VPATH += :board
+CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board
diff --git a/boards/arm/stm32/stm32f401rc-rs485/src/stm32_appinit.c b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_appinit.c
new file mode 100644
index 0000000000..cb000155e1
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_appinit.c
@@ -0,0 +1,76 @@
+/****************************************************************************
+ * boards/arm/stm32/stm32f401rc-rs485/src/stm32_appinit.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+
+#include "stm32f401rc-rs485.h"
+
+#include <nuttx/board.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the
+ *         matching application logic.  The value could be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+  return OK;
+#else
+  /* Perform board initialization here */
+
+  return stm32_bringup();
+#endif
+}
diff --git a/boards/arm/stm32/stm32f401rc-rs485/src/stm32_autoleds.c b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_autoleds.c
new file mode 100644
index 0000000000..12ad0ba09c
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_autoleds.c
@@ -0,0 +1,81 @@
+/****************************************************************************
+ * boards/arm/stm32/stm32f401rc-rs485/src/stm32_autoleds.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+
+#include "chip.h"
+#include "arm_internal.h"
+#include "stm32.h"
+#include "stm32f401rc-rs485.h"
+
+#include <arch/board/board.h>
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  /* Configure LD2 GPIO for output */
+
+  stm32_configgpio(GPIO_LED1);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  if (led == 1)
+    {
+      stm32_gpiowrite(GPIO_LED1, true);
+    }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  if (led == 1)
+    {
+      stm32_gpiowrite(GPIO_LED1, false);
+    }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/boards/arm/stm32/stm32f401rc-rs485/src/stm32_boot.c b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_boot.c
new file mode 100644
index 0000000000..bd2179b98d
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_boot.c
@@ -0,0 +1,85 @@
+/****************************************************************************
+ * boards/arm/stm32/stm32f401rc-rs485/src/stm32_boot.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/arch.h>
+
+#include <arch/board/board.h>
+
+#include "arm_internal.h"
+#include "stm32f401rc-rs485.h"
+
+#include <nuttx/board.h>
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.
+ *   This entry point is called early in the initialization -- after all
+ *   memory has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  board_autoled_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_late_initialize().  board_late_initialize() will
+ *   be called immediately after up_initialize() is called and just before
+ *   the initial application is started.  This additional initialization
+ *   phase may be used, for example, to initialize board-specific device
+ *   drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+  /* Perform board initialization here instead of from the
+   * board_app_initialize().
+   */
+
+  stm32_bringup();
+}
+#endif
diff --git a/boards/arm/stm32/stm32f401rc-rs485/src/stm32_bringup.c b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_bringup.c
new file mode 100644
index 0000000000..0baef6aae3
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/src/stm32_bringup.c
@@ -0,0 +1,65 @@
+/****************************************************************************
+ * boards/arm/stm32/stm32f401rc-rs485/src/stm32_bringup.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <nuttx/arch.h>
+
+#include <stm32.h>
+#include <stm32_uart.h>
+
+#include <arch/board/board.h>
+
+#include "stm32f401rc-rs485.h"
+
+#include <nuttx/board.h>
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void)
+{
+  int ret = OK;
+
+  return ret;
+}
diff --git a/boards/arm/stm32/stm32f401rc-rs485/src/stm32f401rc-rs485.h b/boards/arm/stm32/stm32f401rc-rs485/src/stm32f401rc-rs485.h
new file mode 100644
index 0000000000..d720588b08
--- /dev/null
+++ b/boards/arm/stm32/stm32f401rc-rs485/src/stm32f401rc-rs485.h
@@ -0,0 +1,309 @@
+/****************************************************************************
+ * boards/arm/stm32/stm32f401rc-rs485/src/stm32f401rc-rs485.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32_STM32F401RC_RS485_SRC_STM32F401RC_RS485_H
+#define __BOARDS_ARM_STM32_STM32F401RC_RS485_SRC_STM32F401RC_RS485_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#define HAVE_MMCSD 1
+#if !defined(CONFIG_STM32_SDIO) || !defined(CONFIG_MMCSD) || \
+    !defined(CONFIG_MMCSD_SDIO)
+#  undef HAVE_MMCSD
+#endif
+
+/* LED.  User LD2: the green LED is a user LED connected to Arduino signal
+ * D13 corresponding to MCU I/O PA5 (pin 21) or PB13 (pin 34) depending on
+ * the STM32 target.
+ *
+ * - When the I/O is HIGH value, the LED is on.
+ * - When the I/O is LOW, the LED is off.
+ */
+
+#define GPIO_LED1 \
+  (GPIO_PORTC | GPIO_PIN0 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | \
+   GPIO_SPEED_50MHz)
+
+/* Buttons
+ *
+ * B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32
+ * microcontroller.
+ */
+
+#define MIN_IRQBUTTON   BUTTON_USER
+#define MAX_IRQBUTTON   BUTTON_USER
+#define NUM_IRQBUTTONS  1
+
+#define GPIO_BTN_USER \
+  (GPIO_INPUT |GPIO_FLOAT |GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
+
+/* The shield uses the following pins:
+ *
+ *   +5V
+ *   GND
+ *  SERIAL_TX=PA_2    USER_BUTTON=PC_13
+ *  SERIAL_RX=PA_3            LD2=PA_5
+ *
+ * Analog                         Digital
+ *  A0=PA_0    USART2RX D0=PA_3              D8 =PA_9
+ *  A1=PA_1    USART2TX D1=PA_2              D9 =PC_7
+ *  A2=PA_4             D2=PA_10     WIFI_CS=D10=PB_6 SPI_CS
+ *  A3=PB_0    WIFI_INT=D3=PB_3              D11=PA_7 SPI_MOSI
+ *  A4=PC_1       SD_CS=D4=PB_5              D12=PA_6 SPI_MISO
+ *  A5=PC_0     WIFI_EN=D5=PB_4          LD2=D13=PA_5 SPI_SCK
+ *                 LED2=D6=PB_10    I2C1_SDA=D14=PB_9 WIFI Probe
+ *                      D7=PA_8     I2C1_SCL=D15=PB_8 WIFI Probe
+ *
+ *  mostly from: https://mbed.org/platforms/ST-Nucleo-F401RE/
+ *
+ */
+
+/* SPI1 off */
+
+#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
+                            GPIO_PORTA | GPIO_PIN7)
+#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
+                            GPIO_PORTA | GPIO_PIN6)
+#define GPIO_SPI1_SCK_OFF  (GPIO_INPUT | GPIO_PULLDOWN | \
+                            GPIO_PORTA | GPIO_PIN5)
+
+/* SSD1306 */
+
+#define GPIO_SSD1306_CS    (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_SPEED_2MHz|\
+                            GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6)
+
+#define GPIO_SSD1306_CMD   (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_OSPEED_2MHz|\
+                            GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN7)
+
+#define GPIO_SSD1306_RST   (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_SPEED_2MHz|\
+                            GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN9)
+
+/* MCP2551 */
+
+#define GPIO_MCP2515_CS   (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_SPEED_2MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+
+#define GPIO_MCP2515_IRQ  (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1)
+
+#ifdef HAVE_MMCSD
+#  define GPIO_SPI_CS_SD_CARD_OFF \
+    (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
+     GPIO_PORTB | GPIO_PIN5)
+#endif
+
+#ifdef HAVE_MMCSD
+#  define GPIO_SPI_CS_SD_CARD \
+    (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \
+     GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN5)
+#endif
+
+/* Devices on the onboard bus.
+ *
+ * Note that these are unshifted addresses.
+ */
+
+#define NUCLEO_I2C_OBDEV_LED       0x55
+#define NUCLEO_I2C_OBDEV_HMC5883   0x1e
+
+/* Itead Joystick Shield
+ *
+ * See http://imall.iteadstudio.com/im120417014.html for more information
+ * about this joystick.
+ *
+ *   --------- ----------------- ---------------------------------
+ *   ARDUINO   ITEAD             NUCLEO-F4x1
+ *   PIN NAME  SIGNAL            SIGNAL
+ *   --------- ----------------- ---------------------------------
+ *    D3       Button E Output   PB3
+ *    D4       Button D Output   PB5
+ *    D5       Button C Output   PB4
+ *    D6       Button B Output   PB10
+ *    D7       Button A Output   PA8
+ *    D8       Button F Output   PA9
+ *    D9       Button G Output   PC7
+ *    A0       Joystick Y Output PA0  ADC1_0
+ *    A1       Joystick X Output PA1  ADC1_1
+ *   --------- ----------------- ---------------------------------
+ *
+ *   All buttons are pulled on the shield.  A sensed low value indicates
+ *   when the button is pressed.
+ *
+ *   NOTE: Button F cannot be used with the default USART1 configuration
+ *   because PA9 is configured for USART1_RX by default.  Use select
+ *   different USART1 pins in the board.h file or select a different
+ *   USART or select CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS which will
+ *   eliminate all but buttons A, B, and C.
+ */
+
+#define ADC_XOUPUT   1 /* X output is on ADC channel 1 */
+#define ADC_YOUPUT   0 /* Y output is on ADC channel 0 */
+
+#define GPIO_BUTTON_A \
+  (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTA | GPIO_PIN8)
+#define GPIO_BUTTON_B \
+  (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_BUTTON_C \
+  (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN4)
+#define GPIO_BUTTON_D \
+  (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN5)
+#define GPIO_BUTTON_E \
+  (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN3)
+#define GPIO_BUTTON_F \
+  (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTA | GPIO_PIN9)
+#define GPIO_BUTTON_G \
+  (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTC | GPIO_PIN7)
+
+/* Itead Joystick Signal interpretation:
+ *
+ *   --------- ----------------------- ---------------------------
+ *   BUTTON     TYPE                    NUTTX ALIAS
+ *   --------- ----------------------- ---------------------------
+ *   Button A  Large button A          JUMP/BUTTON 3
+ *   Button B  Large button B          FIRE/BUTTON 2
+ *   Button C  Joystick select button  SELECT/BUTTON 1
+ *   Button D  Tiny Button D           BUTTON 6
+ *   Button E  Tiny Button E           BUTTON 7
+ *   Button F  Large Button F          BUTTON 4
+ *   Button G  Large Button G          BUTTON 5
+ *   --------- ----------------------- ---------------------------
+ */
+
+#define GPIO_BUTTON_1 GPIO_BUTTON_C
+#define GPIO_BUTTON_2 GPIO_BUTTON_B
+#define GPIO_BUTTON_3 GPIO_BUTTON_A
+#define GPIO_BUTTON_4 GPIO_BUTTON_F
+#define GPIO_BUTTON_5 GPIO_BUTTON_G
+#define GPIO_BUTTON_6 GPIO_BUTTON_D
+#define GPIO_BUTTON_7 GPIO_BUTTON_E
+
+#define GPIO_SELECT   GPIO_BUTTON_1
+#define GPIO_FIRE     GPIO_BUTTON_2
+#define GPIO_JUMP     GPIO_BUTTON_3
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Global driver instances */
+
+#ifdef CONFIG_STM32_SPI1
+extern struct spi_dev_s *g_spi1;
+#endif
+#ifdef CONFIG_STM32_SPI2
+extern struct spi_dev_s *g_spi2;
+#endif
+#ifdef HAVE_MMCSD
+extern struct sdio_dev_s *g_sdio;
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ *   CONFIG_BOARDCTL=y:
+ *     If CONFIG_NSH_ARCHINITIALIZE=y:
+ *       Called from the NSH library (or other application)
+ *     Otherwise, assumed to be called from some other application.
+ *
+ *   Otherwise CONFIG_BOARD_LATE_INITIALIZE=y:
+ *     Called from board_late_initialize().
+ *
+ *   Otherwise, bad news:  Never called
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void);
+
+/****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins.
+ *
+ ****************************************************************************/
+
+void stm32_spidev_initialize(void);
+
+/****************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins.
+ *
+ ****************************************************************************/
+
+void stm32_usbinitialize(void);
+
+/****************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: board_ajoy_initialize
+ *
+ * Description:
+ *   Initialize and register the button joystick driver
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_INPUT_AJOYSTICK
+int board_ajoy_initialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_mcp2515initialize
+ *
+ * Description:
+ *   Initialize and register the MCP2515 CAN driver.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_MCP2515
+int stm32_mcp2515initialize(const char *devpath);
+#endif
+
+#endif /* __BOARDS_ARM_STM32_STM32F401RC_RS485_SRC_STM32F401RC_RS485_H */