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Posted to commits@mynewt.apache.org by ha...@apache.org on 2021/10/22 09:32:55 UTC
[mynewt-nimble] branch master updated (99de134 -> 4fd03df)
This is an automated email from the ASF dual-hosted git repository.
hauke pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git.
from 99de134 nimble/ll: Optimize sync sm scheduler handling
new 70021b6 npl/riot: update syscfg/syscfg.h
new 4fd03df npl/riot: map nrf52_clock_hfxo_request/release()
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
porting/npl/riot/include/nimble/nimble_npl_os.h | 20 ++++++
porting/npl/riot/include/syscfg/syscfg.h | 96 ++++++++++++++++---------
2 files changed, 83 insertions(+), 33 deletions(-)
[mynewt-nimble] 01/02: npl/riot: update syscfg/syscfg.h
Posted by ha...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
hauke pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
commit 70021b6dd854350b37e782212c318cb25e4caeea
Author: Hauke Petersen <ha...@fu-berlin.de>
AuthorDate: Thu Oct 14 13:36:32 2021 +0200
npl/riot: update syscfg/syscfg.h
---
porting/npl/riot/include/syscfg/syscfg.h | 96 +++++++++++++++++++++-----------
1 file changed, 63 insertions(+), 33 deletions(-)
diff --git a/porting/npl/riot/include/syscfg/syscfg.h b/porting/npl/riot/include/syscfg/syscfg.h
index e3d282e..480616b 100644
--- a/porting/npl/riot/include/syscfg/syscfg.h
+++ b/porting/npl/riot/include/syscfg/syscfg.h
@@ -1,5 +1,5 @@
/**
- * This file was generated by Apache newt version: 1.9.0-dev
+ * This file was generated by Apache newt version: 1.9.0
*/
#ifndef H_MYNEWT_SYSCFG_
@@ -18,16 +18,16 @@
/*** Repository @apache-mynewt-core info */
#ifndef MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_CORE
-#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_CORE ("6b205affd69a6f05787264fa2c70c621bbbdd325")
+#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_CORE ("58d4be4b8e33dd4738a2a0c1c2016a9195542833")
#endif
#ifndef MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_CORE
-#define MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_CORE ("0.0.0")
+#define MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_CORE ("0.0.1")
#endif
/*** Repository @apache-mynewt-mcumgr info */
#ifndef MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_MCUMGR
-#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_MCUMGR ("64f5060bd8bb466367e0da94da8b425d5b9f6388")
+#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_MCUMGR ("12b496e37caf20a45ab5aee4209b06c5d79ef9b1")
#endif
#ifndef MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_MCUMGR
@@ -36,7 +36,7 @@
/*** Repository @apache-mynewt-nimble info */
#ifndef MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_NIMBLE
-#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_NIMBLE ("3e5d7a994e117b2758906154433a1aac860cc845-dirty")
+#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_NIMBLE ("99de1340e7fbdee6a604415972bd24ec5117a78d")
#endif
#ifndef MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_NIMBLE
@@ -45,7 +45,7 @@
/*** Repository @mcuboot info */
#ifndef MYNEWT_VAL_REPO_HASH_MCUBOOT
-#define MYNEWT_VAL_REPO_HASH_MCUBOOT ("579b30c29999860f9f7d843a25ff5453b6542cce")
+#define MYNEWT_VAL_REPO_HASH_MCUBOOT ("137d79717764ed32d5da4b4b301f32f81b2bf40f")
#endif
#ifndef MYNEWT_VAL_REPO_VERSION_MCUBOOT
@@ -73,6 +73,10 @@
#define MYNEWT_VAL_HAL_ENABLE_SOFTWARE_BREAKPOINTS (1)
#endif
+#ifndef MYNEWT_VAL_HAL_FLASH_MAX_DEVICE_COUNT
+#define MYNEWT_VAL_HAL_FLASH_MAX_DEVICE_COUNT (0)
+#endif
+
#ifndef MYNEWT_VAL_HAL_FLASH_VERIFY_BUF_SZ
#define MYNEWT_VAL_HAL_FLASH_VERIFY_BUF_SZ (16)
#endif
@@ -85,6 +89,10 @@
#define MYNEWT_VAL_HAL_FLASH_VERIFY_WRITES (0)
#endif
+#ifndef MYNEWT_VAL_HAL_SBRK
+#define MYNEWT_VAL_HAL_SBRK (1)
+#endif
+
#ifndef MYNEWT_VAL_HAL_SYSTEM_RESET_CB
#define MYNEWT_VAL_HAL_SYSTEM_RESET_CB (0)
#endif
@@ -157,10 +165,24 @@
#define MYNEWT_VAL_MCU_GPIO_USE_PORT_EVENT (0)
#endif
+#ifndef MYNEWT_VAL_MCU_HFCLK_SOURCE__HFINT
+#define MYNEWT_VAL_MCU_HFCLK_SOURCE__HFINT (0)
+#endif
+#ifndef MYNEWT_VAL_MCU_HFCLK_SOURCE__HFXO
+#define MYNEWT_VAL_MCU_HFCLK_SOURCE__HFXO (1)
+#endif
+#ifndef MYNEWT_VAL_MCU_HFCLK_SOURCE
+#define MYNEWT_VAL_MCU_HFCLK_SOURCE (1)
+#endif
+
#ifndef MYNEWT_VAL_MCU_I2C_RECOVERY_DELAY_USEC
#define MYNEWT_VAL_MCU_I2C_RECOVERY_DELAY_USEC (100)
#endif
+#ifndef MYNEWT_VAL_MCU_ICACHE_ENABLED
+#define MYNEWT_VAL_MCU_ICACHE_ENABLED (0)
+#endif
+
/* Overridden by @apache-mynewt-core/hw/bsp/nordic_pca10056 (defined by @apache-mynewt-core/hw/mcu/nordic/nrf52xxx) */
#ifndef MYNEWT_VAL_MCU_LFCLK_SOURCE__LFRC
#define MYNEWT_VAL_MCU_LFCLK_SOURCE__LFRC (0)
@@ -204,10 +226,6 @@
#define MYNEWT_VAL_NFC_PINS_AS_GPIO (1)
#endif
-#ifndef MYNEWT_VAL_OS_TICKS_PER_SEC
-#define MYNEWT_VAL_OS_TICKS_PER_SEC (128)
-#endif
-
#ifndef MYNEWT_VAL_PWM_0
#define MYNEWT_VAL_PWM_0 (0)
#endif
@@ -532,6 +550,10 @@
#define MYNEWT_VAL_OS_COREDUMP (0)
#endif
+#ifndef MYNEWT_VAL_OS_COREDUMP_CB
+#define MYNEWT_VAL_OS_COREDUMP_CB (0)
+#endif
+
/* Overridden by @apache-mynewt-core/hw/bsp/nordic_pca10056 (defined by @apache-mynewt-core/kernel/os) */
#ifndef MYNEWT_VAL_OS_CPUTIME_FREQ
#define MYNEWT_VAL_OS_CPUTIME_FREQ (32768)
@@ -650,6 +672,11 @@
#define MYNEWT_VAL_OS_TASK_RUN_TIME_CPUTIME (0)
#endif
+/* Overridden by @apache-mynewt-core/hw/mcu/nordic/nrf52xxx (defined by @apache-mynewt-core/kernel/os) */
+#ifndef MYNEWT_VAL_OS_TICKS_PER_SEC
+#define MYNEWT_VAL_OS_TICKS_PER_SEC (128)
+#endif
+
#ifndef MYNEWT_VAL_OS_TIME_DEBUG
#define MYNEWT_VAL_OS_TIME_DEBUG (0)
#endif
@@ -671,6 +698,10 @@
#define MYNEWT_VAL_BASELIBC_ASSERT_FILE_LINE (0)
#endif
+#ifndef MYNEWT_VAL_BASELIBC_EXECUTE_GLOBAL_CONSTRUCTORS
+#define MYNEWT_VAL_BASELIBC_EXECUTE_GLOBAL_CONSTRUCTORS (1)
+#endif
+
#ifndef MYNEWT_VAL_BASELIBC_PRESENT
#define MYNEWT_VAL_BASELIBC_PRESENT (1)
#endif
@@ -693,8 +724,12 @@
#define MYNEWT_VAL_FLASH_MAP_MAX_AREAS (10)
#endif
+#ifndef MYNEWT_VAL_FLASH_MAP_SUPPORT_MFG
+#define MYNEWT_VAL_FLASH_MAP_SUPPORT_MFG (0)
+#endif
+
#ifndef MYNEWT_VAL_FLASH_MAP_SYSINIT_STAGE
-#define MYNEWT_VAL_FLASH_MAP_SYSINIT_STAGE (2)
+#define MYNEWT_VAL_FLASH_MAP_SYSINIT_STAGE (9)
#endif
/*** @apache-mynewt-core/sys/log/common */
@@ -748,23 +783,6 @@
#define MYNEWT_VAL_LOG_LEVEL (255)
#endif
-/*** @apache-mynewt-core/sys/mfg */
-#ifndef MYNEWT_VAL_MFG_LOG_LVL
-#define MYNEWT_VAL_MFG_LOG_LVL (15)
-#endif
-
-#ifndef MYNEWT_VAL_MFG_LOG_MODULE
-#define MYNEWT_VAL_MFG_LOG_MODULE (128)
-#endif
-
-#ifndef MYNEWT_VAL_MFG_MAX_MMRS
-#define MYNEWT_VAL_MFG_MAX_MMRS (2)
-#endif
-
-#ifndef MYNEWT_VAL_MFG_SYSINIT_STAGE
-#define MYNEWT_VAL_MFG_SYSINIT_STAGE (100)
-#endif
-
/*** @apache-mynewt-core/sys/sys */
#ifndef MYNEWT_VAL_DEBUG_PANIC_ENABLED
#define MYNEWT_VAL_DEBUG_PANIC_ENABLED (1)
@@ -994,6 +1012,10 @@
#define MYNEWT_VAL_BLE_LL_DEBUG_GPIO_HCI_EV (-1)
#endif
+#ifndef MYNEWT_VAL_BLE_LL_DEBUG_GPIO_RFMGMT
+#define MYNEWT_VAL_BLE_LL_DEBUG_GPIO_RFMGMT (-1)
+#endif
+
#ifndef MYNEWT_VAL_BLE_LL_DEBUG_GPIO_SCHED_ITEM_CB
#define MYNEWT_VAL_BLE_LL_DEBUG_GPIO_SCHED_ITEM_CB (-1)
#endif
@@ -1019,6 +1041,10 @@
#define MYNEWT_VAL_BLE_LL_EXT_ADV_AUX_PTR_CNT (0)
#endif
+#ifndef MYNEWT_VAL_BLE_LL_HCI_LLCP_TRACE
+#define MYNEWT_VAL_BLE_LL_HCI_LLCP_TRACE (0)
+#endif
+
#ifndef MYNEWT_VAL_BLE_LL_MASTER_SCA
#define MYNEWT_VAL_BLE_LL_MASTER_SCA (4)
#endif
@@ -1069,6 +1095,10 @@
#define MYNEWT_VAL_BLE_LL_SCA (60)
#endif
+#ifndef MYNEWT_VAL_BLE_LL_SCAN_AUX_SEGMENT_CNT
+#define MYNEWT_VAL_BLE_LL_SCAN_AUX_SEGMENT_CNT (8)
+#endif
+
#ifndef MYNEWT_VAL_BLE_LL_SCHED_AUX_CHAIN_MAFS_DELAY
#define MYNEWT_VAL_BLE_LL_SCHED_AUX_CHAIN_MAFS_DELAY (0)
#endif
@@ -1487,16 +1517,16 @@
#define MYNEWT_VAL_BLE_SM_SC (0)
#endif
-#ifndef MYNEWT_VAL_BLE_SM_SC_ONLY
-#define MYNEWT_VAL_BLE_SM_SC_ONLY (0)
+#ifndef MYNEWT_VAL_BLE_SM_SC_DEBUG_KEYS
+#define MYNEWT_VAL_BLE_SM_SC_DEBUG_KEYS (0)
#endif
#ifndef MYNEWT_VAL_BLE_SM_SC_LVL
#define MYNEWT_VAL_BLE_SM_SC_LVL (0)
#endif
-#ifndef MYNEWT_VAL_BLE_SM_SC_DEBUG_KEYS
-#define MYNEWT_VAL_BLE_SM_SC_DEBUG_KEYS (0)
+#ifndef MYNEWT_VAL_BLE_SM_SC_ONLY
+#define MYNEWT_VAL_BLE_SM_SC_ONLY (0)
#endif
#ifndef MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST
@@ -1568,7 +1598,7 @@
#endif
#ifndef MYNEWT_VAL_BLE_ACL_BUF_SIZE
-#define MYNEWT_VAL_BLE_ACL_BUF_SIZE (255)
+#define MYNEWT_VAL_BLE_ACL_BUF_SIZE (65535)
#endif
#ifndef MYNEWT_VAL_BLE_HCI_EVT_BUF_SIZE
[mynewt-nimble] 02/02: npl/riot: map
nrf52_clock_hfxo_request/release()
Posted by ha...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
hauke pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
commit 4fd03df5433617284294078ac4dc39e3b16a569c
Author: Hauke Petersen <ha...@fu-berlin.de>
AuthorDate: Wed Oct 20 17:22:31 2021 +0200
npl/riot: map nrf52_clock_hfxo_request/release()
Compiling the hal_timer abstractions requires
nrf52_clock_hfxo_request() and _release() functions to be available.
This commit maps the appropriate RIOT functions in the NPL layer.
---
porting/npl/riot/include/nimble/nimble_npl_os.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/porting/npl/riot/include/nimble/nimble_npl_os.h b/porting/npl/riot/include/nimble/nimble_npl_os.h
index ee0dfab..4633cbd 100644
--- a/porting/npl/riot/include/nimble/nimble_npl_os.h
+++ b/porting/npl/riot/include/nimble/nimble_npl_os.h
@@ -27,6 +27,10 @@
#include "sema.h"
#include "ztimer.h"
+#if defined(CPU_FAM_NRF51) || defined(CPU_FAM_NRF52)
+#include "nrf_clock.h"
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -270,6 +274,22 @@ ble_npl_hw_is_in_critical(void)
return (bool)!irq_is_enabled();
}
+/* XXX: these functions are required to build hal_timer.c, however with the
+* default configuration they are never used... */
+#if defined(CPU_FAM_NRF51) || defined(CPU_FAM_NRF52)
+static inline void
+nrf52_clock_hfxo_request(void)
+{
+ clock_hfxo_request();
+}
+
+static inline void
+nrf52_clock_hfxo_release(void)
+{
+ clock_hfxo_release();
+}
+#endif
+
#ifdef __cplusplus
}
#endif