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Posted to commits@mynewt.apache.org by je...@apache.org on 2019/05/29 11:50:19 UTC

[mynewt-core] 01/02: nucleo-l476: Add second UART

This is an automated email from the ASF dual-hosted git repository.

jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit 2397e0ccf9ab2a1265b16c836adcb43a9a93f86b
Author: Jerzy Kasenberg <je...@gmail.com>
AuthorDate: Mon May 27 13:23:00 2019 +0200

    nucleo-l476: Add second UART
    
    It just adds second uart that can be used, so one
    can be used for console and second for newtmgr.
    Pins configuration in syscfg.
---
 hw/bsp/nucleo-l476rg/include/bsp/bsp.h |  2 +-
 hw/bsp/nucleo-l476rg/src/hal_bsp.c     | 46 ++++++++++++++++++++++++----------
 hw/bsp/nucleo-l476rg/syscfg.yml        | 30 +++++++++++++++++++++-
 3 files changed, 63 insertions(+), 15 deletions(-)

diff --git a/hw/bsp/nucleo-l476rg/include/bsp/bsp.h b/hw/bsp/nucleo-l476rg/include/bsp/bsp.h
index f00ccc6..5084118 100644
--- a/hw/bsp/nucleo-l476rg/include/bsp/bsp.h
+++ b/hw/bsp/nucleo-l476rg/include/bsp/bsp.h
@@ -42,7 +42,7 @@ extern uint8_t _ram_start;
 #define LED_BLINK_PIN   MCU_GPIO_PORTA(5)
 
 /* UART */
-#define UART_CNT 1
+#define UART_CNT 2
 
 /* Arduino pins */
 #define ARDUINO_PIN_D0      MCU_GPIO_PORTA(3)
diff --git a/hw/bsp/nucleo-l476rg/src/hal_bsp.c b/hw/bsp/nucleo-l476rg/src/hal_bsp.c
index c167a17..8e769d0 100644
--- a/hw/bsp/nucleo-l476rg/src/hal_bsp.c
+++ b/hw/bsp/nucleo-l476rg/src/hal_bsp.c
@@ -49,18 +49,32 @@
 #if MYNEWT_VAL(UART_0)
 static struct uart_dev hal_uart0;
 
-static const struct stm32_uart_cfg uart_cfg[UART_CNT] = {
-    [0] = {
-        .suc_uart = USART2,
-        .suc_rcc_reg = &RCC->APB1ENR1,
-        .suc_rcc_dev = RCC_APB1ENR1_USART2EN,
-        .suc_pin_tx = MCU_GPIO_PORTA(2),
-        .suc_pin_rx = MCU_GPIO_PORTA(3),
-        .suc_pin_rts = -1,
-        .suc_pin_cts = -1,
-        .suc_pin_af = GPIO_AF7_USART2,
-        .suc_irqn = USART2_IRQn
-    }
+static const struct stm32_uart_cfg uart0_cfg = {
+    .suc_uart = USART2,
+    .suc_rcc_reg = &RCC->APB1ENR1,
+    .suc_rcc_dev = RCC_APB1ENR1_USART2EN,
+    .suc_pin_tx = MYNEWT_VAL(UART_0_PIN_TX),
+    .suc_pin_rx = MYNEWT_VAL(UART_0_PIN_RX),
+    .suc_pin_rts = MYNEWT_VAL(UART_0_PIN_RTS),
+    .suc_pin_cts = MYNEWT_VAL(UART_0_PIN_CTS),
+    .suc_pin_af = GPIO_AF7_USART2,
+    .suc_irqn = USART2_IRQn
+};
+#endif
+
+#if MYNEWT_VAL(UART_1)
+static struct uart_dev hal_uart1;
+
+static const struct stm32_uart_cfg uart1_cfg = {
+    .suc_uart = USART1,
+    .suc_rcc_reg = &RCC->APB2ENR,
+    .suc_rcc_dev = RCC_APB2ENR_USART1EN,
+    .suc_pin_tx = MYNEWT_VAL(UART_1_PIN_TX),
+    .suc_pin_rx = MYNEWT_VAL(UART_1_PIN_RX),
+    .suc_pin_rts = MYNEWT_VAL(UART_1_PIN_RTS),
+    .suc_pin_cts = MYNEWT_VAL(UART_1_PIN_CTS),
+    .suc_pin_af = GPIO_AF7_USART1,
+    .suc_irqn = USART1_IRQn
 };
 #endif
 
@@ -129,7 +143,13 @@ hal_bsp_init(void)
 
 #if MYNEWT_VAL(UART_0)
     rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
-      OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
+      OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart0_cfg);
+    assert(rc == 0);
+#endif
+
+#if MYNEWT_VAL(UART_1)
+    rc = os_dev_create((struct os_dev *) &hal_uart1, "uart1",
+      OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart1_cfg);
     assert(rc == 0);
 #endif
 
diff --git a/hw/bsp/nucleo-l476rg/syscfg.yml b/hw/bsp/nucleo-l476rg/syscfg.yml
index 44b67cc..658a453 100644
--- a/hw/bsp/nucleo-l476rg/syscfg.yml
+++ b/hw/bsp/nucleo-l476rg/syscfg.yml
@@ -23,8 +23,36 @@ syscfg.defs:
         value: 1024
 
     UART_0:
-        description: 'Whether to enable UART0'
+        description: 'Whether to enable USART2'
         value:  1
+    UART_0_PIN_TX:
+        description: 'TX pin for USART2, PA2, PD5'
+        value: MCU_GPIO_PORTA(2)
+    UART_0_PIN_RX:
+        description: 'RX pin for USART2, PA3, PD6'
+        value: MCU_GPIO_PORTA(3)
+    UART_0_PIN_CTS:
+        description: 'CTS pin for USART2, PA0, PD3'
+        value: -1
+    UART_0_PIN_RTS:
+        description: 'RTS pin for USART2, PA1, PD4'
+        value: -1
+
+    UART_1:
+        description: 'Whether to enable USART1'
+        value:  0
+    UART_1_PIN_TX:
+        description: 'TX pin for USART1, PA9, PB6'
+        value: MCU_GPIO_PORTA(9)
+    UART_1_PIN_RX:
+        description: 'RX pin for USART1, PA10, PB7'
+        value: MCU_GPIO_PORTA(10)
+    UART_1_PIN_CTS:
+        description: 'CTS pin for USART1, PA11, PB4'
+        value: -1
+    UART_1_PIN_RTS:
+        description: 'RTS pin for USART1, PA12, PB3'
+        value: -1
 
     TIMER_0:
         description: 'Whether to enable TIMER_0'