[incubator-nuttx] 01/08: imxrt:mpu init handle dcache setting in MPU config

[xi...@apache.org]

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xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit 08d0434bad44a4b2ac7b5f00c12055ea99099ec1
Author: David Sidrane <Da...@NscDg.com>
AuthorDate: Wed Oct 27 07:21:01 2021 -0700

    imxrt:mpu init handle dcache setting in MPU config
    
       With CONFIG_ARMV7M_DCACHE the cache maintenance operation
       are not present. Or if CONFIG_ARMV7M_DCACHE_WRITETHROUGH
       is on then buffering operations are no-ops.
    
       This change enables MPU_RASR_C and MPU_RASR_B if
       CONFIG_ARMV7M_DCACHE is only set.
    
       if CONFIG_ARMV7M_DCACHE_WRITETHROUGH is set then only
       MPU_RASR_C is enabled.
    
       N.B When caching is disalbed unaligned access may cause hard faults
       so add -mno-unaligned-access
    
       It is always safe to enable Buffering in FLASH to achive unaligned
       access leniency, as it is not written to.
---
 arch/arm/src/imxrt/imxrt_mpuinit.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/src/imxrt/imxrt_mpuinit.c b/arch/arm/src/imxrt/imxrt_mpuinit.c
index a0ed615..a8a1f48 100644
--- a/arch/arm/src/imxrt/imxrt_mpuinit.c
+++ b/arch/arm/src/imxrt/imxrt_mpuinit.c
@@ -49,6 +49,31 @@
 #  define MIN(a,b) a < b ? a : b
 #endif
 
+#ifndef CONFIG_ARMV7M_DCACHE
+  /*  With Dcache off:
+   *  Cacheable (MPU_RASR_C) and Bufferable (MPU_RASR_B) needs to be off
+   */
+#  undef  MPU_RASR_B
+#  define MPU_RASR_B    0
+#  define RASR_B_VALUE  0
+#  define RASR_C_VALUE  0
+#else
+#  ifndef CONFIG_ARMV7M_DCACHE_WRITETHROUGH
+  /*  With Dcache on:
+   *  Cacheable (MPU_RASR_C) and Bufferable (MPU_RASR_B) needs to be on
+   */
+#  define RASR_B_VALUE  MPU_RASR_B
+#  define RASR_C_VALUE  MPU_RASR_C
+
+#  else
+  /*  With Dcache in WRITETHROUGH Bufferable (MPU_RASR_B)
+   * needs to be off, except for FLASH for alignment leniency
+   */
+#  define RASR_B_VALUE  0
+#  define RASR_C_VALUE  MPU_RASR_C
+#  endif
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/