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Posted to commits@nuttx.apache.org by gu...@apache.org on 2021/07/20 01:56:20 UTC
[incubator-nuttx] branch master updated: Fix typos in comments and
identifiers
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 609ee6b Fix typos in comments and identifiers
609ee6b is described below
commit 609ee6b54bb322e58fb21a70c3987de763d81ff9
Author: Nathan Hartman <59...@users.noreply.github.com>
AuthorDate: Fri Jul 16 17:37:45 2021 -0400
Fix typos in comments and identifiers
---
Kconfig | 10 ++++++----
arch/arm/src/armv7-a/arm_cpupause.c | 2 +-
arch/arm/src/armv7-m/Kconfig | 2 +-
arch/arm/src/armv7-m/arm_ramvec_initialize.c | 2 +-
arch/arm/src/armv7-m/ram_vectors.h | 2 +-
arch/arm/src/armv8-m/Kconfig | 2 +-
arch/arm/src/armv8-m/arm_ramvec_initialize.c | 2 +-
arch/arm/src/armv8-m/ram_vectors.h | 2 +-
arch/arm/src/cxd56xx/cxd56_adc.h | 2 +-
arch/arm/src/cxd56xx/cxd56_cpupause.c | 4 ++--
arch/arm/src/cxd56xx/cxd56_emmc.h | 2 +-
arch/arm/src/cxd56xx/cxd56_gnss_api.h | 2 +-
arch/arm/src/cxd56xx/cxd56_sph.h | 2 +-
arch/arm/src/stm32/stm32_foc.c | 2 +-
arch/arm/src/stm32/stm32_gpio.h | 4 ++--
arch/arm/src/stm32f0l0g0/stm32_gpio.c | 4 ++--
arch/arm/src/stm32f0l0g0/stm32_gpio.h | 4 ++--
arch/arm/src/stm32f7/stm32_gpio.c | 2 +-
arch/arm/src/stm32f7/stm32_gpio.h | 2 +-
arch/arm/src/stm32h7/stm32_gpio.h | 2 +-
arch/arm/src/stm32l4/stm32l4_adc.h | 2 +-
arch/arm/src/stm32l4/stm32l4_gpio.c | 4 ++--
arch/arm/src/stm32l4/stm32l4_gpio.h | 4 ++--
arch/arm/src/stm32l5/stm32l5_gpio.c | 4 ++--
arch/arm/src/stm32l5/stm32l5_gpio.h | 4 ++--
arch/renesas/src/rx65n/rx65n_eth.c | 4 ++--
boards/Kconfig | 2 +-
boards/arm/rp2040/common/src/rp2040_lcd_backpack.c | 2 +-
boards/arm/stm32/common/src/stm32_lcd_backpack.c | 2 +-
boards/arm/stm32h7/nucleo-h743zi2/README.txt | 2 +-
drivers/motor/foc/Kconfig | 2 +-
include/dsp.h | 2 +-
include/dspb16.h | 2 +-
libs/libc/unistd/Kconfig | 4 ++--
libs/libc/unistd/lib_daemon.c | 6 +++---
libs/libdsp/lib_foc.c | 12 ++++++------
libs/libdsp/lib_foc_b16.c | 12 ++++++------
libs/libdsp/lib_motor.c | 2 +-
libs/libdsp/lib_svm.c | 2 +-
libs/libdsp/lib_svm_b16.c | 2 +-
libs/libxx/cxx.defs | 2 +-
41 files changed, 68 insertions(+), 66 deletions(-)
diff --git a/Kconfig b/Kconfig
index e841572..4d8d71b 100644
--- a/Kconfig
+++ b/Kconfig
@@ -1759,14 +1759,16 @@ config STACK_COLORATION
Only supported by a few architectures.
config STACK_USAGE_SAFE_PERCENT
- int "Stack usage safe precent"
+ int "Stack usage safe percent"
default 0
range 0 100
depends on STACK_COLORATION
---help---
- Stack usage precent = up_check_tcbstack() * 100 / tcb->adj_stack_size,
- this should lower then STACK_USAGE_SAFE_PERCENT.
- Idle thread will timely check stack usage when this macro value > 0.
+ Stack usage percent = up_check_tcbstack() * 100 / tcb->adj_stack_size,
+ this should be lower than STACK_USAGE_SAFE_PERCENT.
+
+ Idle thread will periodically check stack usage when this macro
+ value > 0.
N.B. This feature should not be used in production code.
diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c
index fbb6c38..c479039 100644
--- a/arch/arm/src/armv7-a/arm_cpupause.c
+++ b/arch/arm/src/armv7-a/arm_cpupause.c
@@ -130,7 +130,7 @@ int up_cpu_paused(int cpu)
arm_savestate(tcb->xcp.regs);
- /* Release the g_cpu_puased spinlock to synchronize with the
+ /* Release the g_cpu_paused spinlock to synchronize with the
* requesting CPU.
*/
diff --git a/arch/arm/src/armv7-m/Kconfig b/arch/arm/src/armv7-m/Kconfig
index 7bd5001..61d89f7 100644
--- a/arch/arm/src/armv7-m/Kconfig
+++ b/arch/arm/src/armv7-m/Kconfig
@@ -63,7 +63,7 @@ config ARMV7M_USEBASEPRI
WARNING: If CONFIG_ARCH_HIPRI_INTERRUPT is selected, then you
MUST select CONFIG_ARMV7M_USEBASEPRI. The Kconfig dependencies
here will permit to select an invalid configuration because it
- cannot enforce that requirement. If you create this invalild
+ cannot enforce that requirement. If you create this invalid
configuration, you will encounter some problems that may be
very difficult to debug.
diff --git a/arch/arm/src/armv7-m/arm_ramvec_initialize.c b/arch/arm/src/armv7-m/arm_ramvec_initialize.c
index 1cf5962..5dc5d99 100644
--- a/arch/arm/src/armv7-m/arm_ramvec_initialize.c
+++ b/arch/arm/src/armv7-m/arm_ramvec_initialize.c
@@ -95,7 +95,7 @@
*
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
* depends on the number of vectors supported by the MCU. The safest thing
- * to do is to put the vector table at the beginning of RAM in order toforce
+ * to do is to put the vector table at the beginning of RAM in order to force
* the highest alignment possible.
*/
diff --git a/arch/arm/src/armv7-m/ram_vectors.h b/arch/arm/src/armv7-m/ram_vectors.h
index b329d1e..8045b95 100644
--- a/arch/arm/src/armv7-m/ram_vectors.h
+++ b/arch/arm/src/armv7-m/ram_vectors.h
@@ -57,7 +57,7 @@
*
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
* depends on the number of vectors supported by the MCU. The safest thing
- * to do is to put the vector table at the beginning of RAM in order toforce
+ * to do is to put the vector table at the beginning of RAM in order to force
* the highest alignment possible.
*/
diff --git a/arch/arm/src/armv8-m/Kconfig b/arch/arm/src/armv8-m/Kconfig
index 8627da1..51b968a 100644
--- a/arch/arm/src/armv8-m/Kconfig
+++ b/arch/arm/src/armv8-m/Kconfig
@@ -62,7 +62,7 @@ config ARMV8M_USEBASEPRI
WARNING: If CONFIG_ARCH_HIPRI_INTERRUPT is selected, then you
MUST select CONFIG_ARMV8M_USEBASEPRI. The Kconfig dependencies
here will permit to select an invalid configuration because it
- cannot enforce that requirement. If you create this invalild
+ cannot enforce that requirement. If you create this invalid
configuration, you will encounter some problems that may be
very difficult to debug.
diff --git a/arch/arm/src/armv8-m/arm_ramvec_initialize.c b/arch/arm/src/armv8-m/arm_ramvec_initialize.c
index 1174f84..81a4392 100644
--- a/arch/arm/src/armv8-m/arm_ramvec_initialize.c
+++ b/arch/arm/src/armv8-m/arm_ramvec_initialize.c
@@ -94,7 +94,7 @@
*
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
* depends on the number of vectors supported by the MCU. The safest thing
- * to do is to put the vector table at the beginning of RAM in order toforce
+ * to do is to put the vector table at the beginning of RAM in order to force
* the highest alignment possible.
*/
diff --git a/arch/arm/src/armv8-m/ram_vectors.h b/arch/arm/src/armv8-m/ram_vectors.h
index b305638..dcea970 100644
--- a/arch/arm/src/armv8-m/ram_vectors.h
+++ b/arch/arm/src/armv8-m/ram_vectors.h
@@ -57,7 +57,7 @@
*
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
* depends on the number of vectors supported by the MCU. The safest thing
- * to do is to put the vector table at the beginning of RAM in order toforce
+ * to do is to put the vector table at the beginning of RAM in order to force
* the highest alignment possible.
*/
diff --git a/arch/arm/src/cxd56xx/cxd56_adc.h b/arch/arm/src/cxd56xx/cxd56_adc.h
index 9a0dd5f..fee912e 100644
--- a/arch/arm/src/cxd56xx/cxd56_adc.h
+++ b/arch/arm/src/cxd56xx/cxd56_adc.h
@@ -39,7 +39,7 @@ extern "C"
#endif
/****************************************************************************
- * Public Function Protoypes
+ * Public Function Prototypes
****************************************************************************/
/****************************************************************************
diff --git a/arch/arm/src/cxd56xx/cxd56_cpupause.c b/arch/arm/src/cxd56xx/cxd56_cpupause.c
index 46aadaa..3bd3be9 100644
--- a/arch/arm/src/cxd56xx/cxd56_cpupause.c
+++ b/arch/arm/src/cxd56xx/cxd56_cpupause.c
@@ -295,12 +295,12 @@ int arm_pause_handler(int irq, void *c, FAR void *arg)
/* NOTE: Normally, we do not call up_cpu_paused() here because
* the above enter_critical_setion() would call up_cpu_paused()
* inside because the caller holds a crtical section.
- * Howerver, cxd56's remote IRQ control logic also uses this handler
+ * However, cxd56's remote IRQ control logic also uses this handler
* and a caller might not take a critical section to avoid a deadlock
* during up_enable_irq() and up_disable_irq(). This is allowed
* because IRQ control logic does not interact wtih the scheduler.
* This means that if the request was not handled above, we need
- * to call up_cpu_puased() here again.
+ * to call up_cpu_paused() here again.
*/
if (up_cpu_pausereq(cpu))
diff --git a/arch/arm/src/cxd56xx/cxd56_emmc.h b/arch/arm/src/cxd56xx/cxd56_emmc.h
index f71bfa5..91f3211 100644
--- a/arch/arm/src/cxd56xx/cxd56_emmc.h
+++ b/arch/arm/src/cxd56xx/cxd56_emmc.h
@@ -39,7 +39,7 @@ extern "C"
#endif
/****************************************************************************
- * Public Function Protoypes
+ * Public Function Prototypes
****************************************************************************/
int cxd56_emmcinitialize(void);
diff --git a/arch/arm/src/cxd56xx/cxd56_gnss_api.h b/arch/arm/src/cxd56xx/cxd56_gnss_api.h
index 9fe7077..be8d7f4 100644
--- a/arch/arm/src/cxd56xx/cxd56_gnss_api.h
+++ b/arch/arm/src/cxd56xx/cxd56_gnss_api.h
@@ -54,7 +54,7 @@
#define CXD56_GNSS_OPMOD_1PSS 5
/****************************************************************************
- * Public Function Protoypes
+ * Public Function Prototypes
****************************************************************************/
/* Start a positioning
diff --git a/arch/arm/src/cxd56xx/cxd56_sph.h b/arch/arm/src/cxd56xx/cxd56_sph.h
index c05ecac..1eb82fc 100644
--- a/arch/arm/src/cxd56xx/cxd56_sph.h
+++ b/arch/arm/src/cxd56xx/cxd56_sph.h
@@ -48,7 +48,7 @@ extern "C"
#endif
/****************************************************************************
- * Public Function Protoypes
+ * Public Function Prototypes
****************************************************************************/
int cxd56_sphinitialize(FAR const char *devname);
diff --git a/arch/arm/src/stm32/stm32_foc.c b/arch/arm/src/stm32/stm32_foc.c
index 2ceb104..5a839c6 100644
--- a/arch/arm/src/stm32/stm32_foc.c
+++ b/arch/arm/src/stm32/stm32_foc.c
@@ -680,7 +680,7 @@
****************************************************************************/
/* STM32 FOC devices.
- * This strucutre gathers all low level drivers required by FOC device.
+ * This structure gathers all low level drivers required by FOC device.
*/
struct stm32_foc_dev_s
diff --git a/arch/arm/src/stm32/stm32_gpio.h b/arch/arm/src/stm32/stm32_gpio.h
index 52a63bd..609b9cb 100644
--- a/arch/arm/src/stm32/stm32_gpio.h
+++ b/arch/arm/src/stm32/stm32_gpio.h
@@ -437,10 +437,10 @@ int stm32_configgpio(uint32_t cfgset);
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
* it into default HiZ state (and possibly mark it's unused) and unlock it
- * whether it was previsouly selected as alternative function
+ * whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32f0l0g0/stm32_gpio.c b/arch/arm/src/stm32f0l0g0/stm32_gpio.c
index bb9fe52..6ff70d0 100644
--- a/arch/arm/src/stm32f0l0g0/stm32_gpio.c
+++ b/arch/arm/src/stm32f0l0g0/stm32_gpio.c
@@ -344,10 +344,10 @@ int stm32_configgpio(uint32_t cfgset)
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
* it into default HiZ state (and possibly mark it's unused) and unlock it
- * whether it was previsouly selected as alternative function
+ * whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32f0l0g0/stm32_gpio.h b/arch/arm/src/stm32f0l0g0/stm32_gpio.h
index 99fac4a..d9e5b00 100644
--- a/arch/arm/src/stm32f0l0g0/stm32_gpio.h
+++ b/arch/arm/src/stm32f0l0g0/stm32_gpio.h
@@ -262,10 +262,10 @@ int stm32_configgpio(uint32_t cfgset);
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
* it into default HiZ state (and possibly mark it's unused) and unlock it
- * whether it was previsouly selected as alternative function
+ * whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32f7/stm32_gpio.c b/arch/arm/src/stm32f7/stm32_gpio.c
index dac28b7..a3b1a01 100644
--- a/arch/arm/src/stm32f7/stm32_gpio.c
+++ b/arch/arm/src/stm32f7/stm32_gpio.c
@@ -327,7 +327,7 @@ int stm32_configgpio(uint32_t cfgset)
* whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32f7/stm32_gpio.h b/arch/arm/src/stm32f7/stm32_gpio.h
index e51a575..07a2ab4 100644
--- a/arch/arm/src/stm32f7/stm32_gpio.h
+++ b/arch/arm/src/stm32f7/stm32_gpio.h
@@ -270,7 +270,7 @@ int stm32_configgpio(uint32_t cfgset);
* whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32h7/stm32_gpio.h b/arch/arm/src/stm32h7/stm32_gpio.h
index eaa39e9..9b90cb6 100644
--- a/arch/arm/src/stm32h7/stm32_gpio.h
+++ b/arch/arm/src/stm32h7/stm32_gpio.h
@@ -292,7 +292,7 @@ int stm32_configgpio(uint32_t cfgset);
* whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32l4/stm32l4_adc.h b/arch/arm/src/stm32l4/stm32l4_adc.h
index 5cedeb2..6002ad4 100644
--- a/arch/arm/src/stm32l4/stm32l4_adc.h
+++ b/arch/arm/src/stm32l4/stm32l4_adc.h
@@ -1142,7 +1142,7 @@ struct stm32_adc_dev_s
FAR const struct stm32_adc_ops_s *llops;
- /* Require cast-compatibility with private "lower-half" ADC strucutre */
+ /* Require cast-compatibility with private "lower-half" ADC structure */
};
/* Low-level operations for ADC */
diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.c b/arch/arm/src/stm32l4/stm32l4_gpio.c
index bdfcdf9..87272b9 100644
--- a/arch/arm/src/stm32l4/stm32l4_gpio.c
+++ b/arch/arm/src/stm32l4/stm32l4_gpio.c
@@ -361,10 +361,10 @@ int stm32l4_configgpio(uint32_t cfgset)
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
* it into default HiZ state (and possibly mark it's unused) and unlock it
- * whether it was previsouly selected as alternative function
+ * whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.h b/arch/arm/src/stm32l4/stm32l4_gpio.h
index d90f63f..083c025 100644
--- a/arch/arm/src/stm32l4/stm32l4_gpio.h
+++ b/arch/arm/src/stm32l4/stm32l4_gpio.h
@@ -272,10 +272,10 @@ int stm32l4_configgpio(uint32_t cfgset);
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
* it into default HiZ state (and possibly mark it's unused) and unlock it
- * whether it was previsouly selected as alternative function
+ * whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32l5/stm32l5_gpio.c b/arch/arm/src/stm32l5/stm32l5_gpio.c
index 4485f9b..44ea5db 100644
--- a/arch/arm/src/stm32l5/stm32l5_gpio.c
+++ b/arch/arm/src/stm32l5/stm32l5_gpio.c
@@ -301,10 +301,10 @@ int stm32l5_configgpio(uint32_t cfgset)
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
* it into default HiZ state (and possibly mark it's unused) and unlock it
- * whether it was previsouly selected as alternative function
+ * whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/arm/src/stm32l5/stm32l5_gpio.h b/arch/arm/src/stm32l5/stm32l5_gpio.h
index 1c46f45..cce75ec 100644
--- a/arch/arm/src/stm32l5/stm32l5_gpio.h
+++ b/arch/arm/src/stm32l5/stm32l5_gpio.h
@@ -268,10 +268,10 @@ int stm32l5_configgpio(uint32_t cfgset);
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
* it into default HiZ state (and possibly mark it's unused) and unlock it
- * whether it was previsouly selected as alternative function
+ * whether it was previously selected as alternative function
* (GPIO_ALT|GPIO_CNF_AFPP|...).
*
- * This is a safety function and prevents hardware from schocks, as
+ * This is a safety function and prevents hardware from shocks, as
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
* while it should operate in PWM mode could produce excessive on-board
* currents and trigger over-current/alarm function.
diff --git a/arch/renesas/src/rx65n/rx65n_eth.c b/arch/renesas/src/rx65n/rx65n_eth.c
index cba34ae..1903db4 100644
--- a/arch/renesas/src/rx65n/rx65n_eth.c
+++ b/arch/renesas/src/rx65n/rx65n_eth.c
@@ -238,7 +238,7 @@
* interrupt.
*/
-#define ETHER_CFG_AL1_INT_PRIORTY (15)
+#define ETHER_CFG_AL1_INT_PRIORITY (15)
/* Use LINKSTA signal for detect link status changes
* 0 = unused (use PHY-LSI status register)
@@ -3114,7 +3114,7 @@ void rx65n_ether_enable_icu(void)
/* Priority to this interrupt should be value 2 */
- ipl = ETHER_CFG_AL1_INT_PRIORTY;
+ ipl = ETHER_CFG_AL1_INT_PRIORITY;
/* Disable group interrupts */
diff --git a/boards/Kconfig b/boards/Kconfig
index 1f4129e..18191f2 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -1692,7 +1692,7 @@ config ARCH_BOARD_STM32_BUTTERFLY2
select ARCH_HAVE_BUTTONS
---help---
A configuration for the Kamami STM32Butterfly2 development board
- based on STM32F107VC micro-controler chip with optional ETH
+ based on STM32F107VC micro-controller chip with optional ETH
board. See
https://kamami.pl/zestawy-uruchomieniowe-stm32/178507-stm32butterfly2.html
diff --git a/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c b/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c
index 7b1b836..558c82a 100644
--- a/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c
+++ b/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c
@@ -84,7 +84,7 @@ int board_lcd_backpack_init(int devno, int busno, int rows, int cols)
return -ENODEV;
}
- /* Regiter the Segment LCD */
+ /* Register the Segment LCD */
snprintf(devpath, 12, "/dev/slcd%d", devno);
ret = pcf8574_lcd_backpack_register(devpath, i2c, &cfg);
diff --git a/boards/arm/stm32/common/src/stm32_lcd_backpack.c b/boards/arm/stm32/common/src/stm32_lcd_backpack.c
index bb1e589..662acc6 100644
--- a/boards/arm/stm32/common/src/stm32_lcd_backpack.c
+++ b/boards/arm/stm32/common/src/stm32_lcd_backpack.c
@@ -82,7 +82,7 @@ int board_lcd_backpack_init(int devno, int busno, int rows, int cols)
return -ENODEV;
}
- /* Regiter the Segment LCD */
+ /* Register the Segment LCD */
snprintf(devpath, 12, "/dev/slcd%d", devno);
ret = pcf8574_lcd_backpack_register(devpath, i2c, &cfg);
diff --git a/boards/arm/stm32h7/nucleo-h743zi2/README.txt b/boards/arm/stm32h7/nucleo-h743zi2/README.txt
index 1336feb..1dd337a 100644
--- a/boards/arm/stm32h7/nucleo-h743zi2/README.txt
+++ b/boards/arm/stm32h7/nucleo-h743zi2/README.txt
@@ -98,7 +98,7 @@ Configurations
- Ethernet
- DHCP Client
- iperf
- - telnet deamon
+ - telnet daemon
File Systems:
- FAT filesystem
diff --git a/drivers/motor/foc/Kconfig b/drivers/motor/foc/Kconfig
index 75bb91e..b231f6a 100644
--- a/drivers/motor/foc/Kconfig
+++ b/drivers/motor/foc/Kconfig
@@ -20,7 +20,7 @@ config MOTOR_FOC_SHUNTS
default 3
---help---
Number of shunts supported (or other types of current sensors).
- Any current recontruction must be done on the lower-half side.
+ Any current reconstruction must be done on the lower-half side.
config MOTOR_FOC_TRACE
bool "FOC trace support"
diff --git a/include/dsp.h b/include/dsp.h
index 4c0c758..5c32749 100644
--- a/include/dsp.h
+++ b/include/dsp.h
@@ -340,7 +340,7 @@ struct foc_data_f32_s
dq_frame_f32_t i_dq_err; /* DQ current error */
dq_frame_f32_t i_dq_ref; /* Requested current for the FOC
- * current controler
+ * current controller
*/
pid_controller_f32_t id_pid; /* Current d-axis component PI controller */
diff --git a/include/dspb16.h b/include/dspb16.h
index 8ea6330..258de02 100644
--- a/include/dspb16.h
+++ b/include/dspb16.h
@@ -277,7 +277,7 @@ struct foc_data_b16_s
dq_frame_b16_t i_dq_err; /* DQ current error */
dq_frame_b16_t i_dq_ref; /* Requested current for the FOC
- * current controler
+ * current controller
*/
pid_controller_b16_t id_pid; /* Current d-axis component PI controller */
diff --git a/libs/libc/unistd/Kconfig b/libs/libc/unistd/Kconfig
index e82b5ea..c75e0a8 100644
--- a/libs/libc/unistd/Kconfig
+++ b/libs/libc/unistd/Kconfig
@@ -12,14 +12,14 @@ config LIBC_EXECFUNCS
---help---
Enable support for the exec[l|v] family of functions that can be
used to start other programs, terminating the current program and
- the posix_spawn() familty of functions that can be used start other
+ the posix_spawn() family of functions that can be used to start other
programs without terminating the current program. The typical
usage of the exec[l|v] functions is (1) first call vfork() to create
a new thread, then (2) call exec[l|v] to replace the new thread with
a program from the file system.
NOTE 1: This two step process start is completely unnecessary in
- NuttX and is provided only for compatibily with Unix systems. These
+ NuttX and is provided only for compatibility with Unix systems. These
functions are essentially just wrapper functions that (1) call the
non-standard binfmt function 'exec', and then (2) exit(0). Since
the new thread will be terminated by the exec[l|v] call, it really
diff --git a/libs/libc/unistd/lib_daemon.c b/libs/libc/unistd/lib_daemon.c
index 6a86ebb..28f9a3f 100644
--- a/libs/libc/unistd/lib_daemon.c
+++ b/libs/libc/unistd/lib_daemon.c
@@ -44,9 +44,9 @@
* the controlling terminal and run in the background as system daemons.
*
* NOTE: daemon() is a non-standard GNU C library interface (based on a
- * BSD interface of the same way which behaves slightly differently).
+ * BSD interface of the same name which behaves slightly differently).
* The interfaces defined at OpenGroup.org are the interfaces that govern
- * NuttX. deamon() is only described in the Linux man pages like:
+ * NuttX. daemon() is only described in the Linux man pages like:
* http://man7.org/linux/man-pages/man3/daemon.3.html
*
* Limitations:
@@ -59,7 +59,7 @@
* be translated to NuttX. The above mentioned web page states:
*
* (This function forks, and if the fork(2) succeeds, the parent calls
- * _exit(2), so that further errors are seen by the child only.) On
+ * _exit(2), so that further errors are seen by the child only.)
*
* So the basic operation of the NuttX daemon() is different. The GNU C
* library daemon() begins will logic like:
diff --git a/libs/libdsp/lib_foc.c b/libs/libdsp/lib_foc.c
index 74f66a3..9f08b75 100644
--- a/libs/libdsp/lib_foc.c
+++ b/libs/libdsp/lib_foc.c
@@ -32,10 +32,10 @@
****************************************************************************/
/****************************************************************************
- * Name: foc_current_controler
+ * Name: foc_current_controller
*
* Description:
- * This function implements FOC current controler algorithm.
+ * This function implements FOC current controller algorithm.
*
* Input Parameters:
* foc - (in/out) pointer to the FOC data
@@ -46,7 +46,7 @@
*
****************************************************************************/
-static void foc_current_controler(FAR struct foc_data_f32_s *foc,
+static void foc_current_controller(FAR struct foc_data_f32_s *foc,
FAR dq_frame_f32_t *v_dq_req)
{
FAR pid_controller_f32_t *id_pid = &foc->id_pid;
@@ -404,9 +404,9 @@ void foc_current_control(FAR struct foc_data_f32_s *foc,
foc_idq_ref_set(foc, idq_ref);
- /* Run FOC current controler (current dq -> voltage dq) */
+ /* Run FOC current controller (current dq -> voltage dq) */
- foc_current_controler(foc, vdq_ref);
+ foc_current_controller(foc, vdq_ref);
/* DQ voltage compensation */
@@ -418,7 +418,7 @@ void foc_current_control(FAR struct foc_data_f32_s *foc,
* Name: foc_vabmod_get
*
* Description:
- * Get result from the FOC controler (foc_current_control or
+ * Get result from the FOC controller (foc_current_control or
* foc_voltage_control)
*
* Input Parameters:
diff --git a/libs/libdsp/lib_foc_b16.c b/libs/libdsp/lib_foc_b16.c
index 1a21a9f..898fac6 100644
--- a/libs/libdsp/lib_foc_b16.c
+++ b/libs/libdsp/lib_foc_b16.c
@@ -32,10 +32,10 @@
****************************************************************************/
/****************************************************************************
- * Name: foc_current_controler_b16
+ * Name: foc_current_controller_b16
*
* Description:
- * This function implements FOC current controler algorithm.
+ * This function implements FOC current controller algorithm.
*
* Input Parameters:
* foc - (in/out) pointer to the FOC data
@@ -46,7 +46,7 @@
*
****************************************************************************/
-static void foc_current_controler_b16(FAR struct foc_data_b16_s *foc,
+static void foc_current_controller_b16(FAR struct foc_data_b16_s *foc,
FAR dq_frame_b16_t *v_dq_req)
{
FAR pid_controller_b16_t *id_pid = &foc->id_pid;
@@ -405,9 +405,9 @@ void foc_current_control_b16(FAR struct foc_data_b16_s *foc,
foc_idq_ref_set_b16(foc, idq_ref);
- /* Run FOC current controler (current dq -> voltage dq) */
+ /* Run FOC current controller (current dq -> voltage dq) */
- foc_current_controler_b16(foc, vdq_ref);
+ foc_current_controller_b16(foc, vdq_ref);
/* DQ voltage compensation */
@@ -419,7 +419,7 @@ void foc_current_control_b16(FAR struct foc_data_b16_s *foc,
* Name: foc_vabmod_get_b16
*
* Description:
- * Get result from the FOC controler (foc_current_control or
+ * Get result from the FOC controller (foc_current_control or
* foc_voltage_control)
*
* Input Parameters:
diff --git a/libs/libdsp/lib_motor.c b/libs/libdsp/lib_motor.c
index 47c3cb9..c65f238 100644
--- a/libs/libdsp/lib_motor.c
+++ b/libs/libdsp/lib_motor.c
@@ -159,7 +159,7 @@ float motor_openloop_angle_get(FAR struct openloop_data_f32_s *op)
* Initialize motor angle structure
*
* Input Parameters:
- * angle - (in/out) pointer to the motor angle strucutre
+ * angle - (in/out) pointer to the motor angle structure
* p - (in) number of the motor pole pairs
*
* Returned Value:
diff --git a/libs/libdsp/lib_svm.c b/libs/libdsp/lib_svm.c
index 7ae9574..8fdad98 100644
--- a/libs/libdsp/lib_svm.c
+++ b/libs/libdsp/lib_svm.c
@@ -280,7 +280,7 @@ static void svm3_duty_calc(FAR struct svm3_state_f32_s *s,
* Voltage vector definitions in 3-phase SVM:
*
* |---------|-----------|--------------------|-----------------|
- * | Voltage | swithcing | Line to neutral | Line to line |
+ * | Voltage | switching | Line to neutral | Line to line |
* | vector | vectors | voltage | voltage |
* | |-----------|--------------------|-----------------|
* | | a | b | c | Van | Vbn | Vcn | Vab | Vbe | Vca |
diff --git a/libs/libdsp/lib_svm_b16.c b/libs/libdsp/lib_svm_b16.c
index 56fdafd..fc660c9 100644
--- a/libs/libdsp/lib_svm_b16.c
+++ b/libs/libdsp/lib_svm_b16.c
@@ -280,7 +280,7 @@ static void svm3_duty_calc_b16(FAR struct svm3_state_b16_s *s,
* Voltage vector definitions in 3-phase SVM:
*
* |---------|-----------|--------------------|-----------------|
- * | Voltage | swithcing | Line to neutral | Line to line |
+ * | Voltage | switching | Line to neutral | Line to line |
* | vector | vectors | voltage | voltage |
* | |-----------|--------------------|-----------------|
* | | a | b | c | Van | Vbn | Vcn | Vab | Vbe | Vca |
diff --git a/libs/libxx/cxx.defs b/libs/libxx/cxx.defs
index a1b1819..c47b236 100644
--- a/libs/libxx/cxx.defs
+++ b/libs/libxx/cxx.defs
@@ -23,7 +23,7 @@ CXXSRCS += libxx_delete.cxx libxx_delete_sized.cxx libxx_deletea.cxx
CXXSRCS += libxx_deletea_sized.cxx libxx_new.cxx libxx_newa.cxx
CXXSRCS += libxx_stdthrow.cxx
-# Note: Our implmenetations of operator new are not conforming to
+# Note: Our implementations of operator new are not conforming to
# the standard. (no bad_alloc implementation)
#
# libxx_new.cxx:64:11: error: 'operator new' is missing exception specification