You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/06/10 15:46:44 UTC
[incubator-nuttx] branch master updated: arch/arm/src/stm32h7: qspi
use indirect write instead indirect read without data.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 9d0da98 arch/arm/src/stm32h7: qspi use indirect write instead indirect read without data.
9d0da98 is described below
commit 9d0da9818cc8ce14a34141cb087580a1d64c113e
Author: Alexander Vasiljev <al...@gmail.com>
AuthorDate: Thu Jun 10 14:31:59 2021 +0300
arch/arm/src/stm32h7: qspi use indirect write instead indirect read without data.
---
arch/arm/src/stm32h7/stm32_qspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/src/stm32h7/stm32_qspi.c b/arch/arm/src/stm32h7/stm32_qspi.c
index af21b96..ce62958 100644
--- a/arch/arm/src/stm32h7/stm32_qspi.c
+++ b/arch/arm/src/stm32h7/stm32_qspi.c
@@ -2147,7 +2147,7 @@ static int qspi_command(struct qspi_dev_s *dev,
* info
*/
- qspi_ccrconfig(priv, &xctn, CCR_FMODE_INDRD);
+ qspi_ccrconfig(priv, &xctn, CCR_FMODE_INDWR);
}
/* Wait for the interrupt routine to finish it's magic */