[GitHub] [nuttx] acassis commented on a diff in pull request #8055: stm32wb: add i2c driver

[GitBox <gi...@apache.org>]

acassis commented on code in PR #8055:
URL: https://github.com/apache/nuttx/pull/8055#discussion_r1064043008


##########
arch/arm/src/stm32wb/stm32wb_i2c.c:
##########
@@ -0,0 +1,2650 @@
+/****************************************************************************
+ * arch/arm/src/stm32wb/stm32wb_i2c.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* --------------------------------------------------------------------------
+ *
+ * STM32 WB I2C Driver based on L4 I2C Driver:
+ *
+ * STM32 WB and L4 have identical I2C hardware, differences are only in
+ * clocking.
+ *
+ * Supports:
+ *  - Master operation:
+ *      Standard-mode (up to 100 kHz)
+ *      Fast-mode (up to 400 kHz)
+ *      Fast-mode+ (up to 1 MHz)
+ *      Clock source selection is based on STM32WB_RCC_CCIPR register
+ *
+ *  - Multiple instances (shared bus)
+ *  - Interrupt based operation
+ *  - RELOAD support
+ *  - I2C_M_NOSTART support
+ *
+ * Test Environment:
+ *  - STM32WB55RG based board
+ *
+ * Unsupported, possible future work:
+ *  - Wakeup from Stop mode
+ *  - More effective error reporting to higher layers
+ *  - Slave operation
+ *  - Support of clock source frequencies other than 64MHz
+ *  - Polled operation (code present but untested)
+ *  - SMBus support
+ *  - Multi-master support
+ *  - IPMI
+ *
+ * Implementation:
+ *
+ *  - Device: structure as defined by the nuttx/i2c/i2c_master.h
+ *
+ *  - Instance: represents each individual access to the I2C driver, obtained
+ *      by the i2c_init(); it extends the Device structure from the
+ *      nuttx/i2c/i2c_master.h;
+ *      Instance points to OPS, to common I2C Hardware private data and
+ *      contains its own private data including frequency, address and mode
+ *      of operation.
+ *
+ *  - Private: Private data of an I2C Hardware
+ *
+ * High Level Functional Description
+ *
+ * This driver works with I2C "messages" (struct i2c_msg_s), which carry a
+ * buffer intended to transfer data to, or store data read from, the I2C bus.
+ *
+ * As the hardware can only transmit or receive one byte at a time the basic
+ * job of the driver (and the ISR specifically) is to process each message in
+ * the order they are stored in the message list, one byte at a time.  When
+ * no messages are left the ISR exits and returns the result to the caller.
+ *
+ * The order of the list of I2C messages provided to the driver is important
+ * and dependent upon the hardware in use.  A typical I2C transaction between
+ * the F3 as an I2C Master and some other IC as a I2C Slave requires two

Review Comment:
   ```suggestion
    * the F3 as an I2C Master and some other IC as an I2C Slave requires two



-- 
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.

To unsubscribe, e-mail: commits-unsubscribe@nuttx.apache.org

For queries about this service, please contact Infrastructure at:
users@infra.apache.org