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Posted to dev@nuttx.apache.org by Janne Rosberg <ja...@offcode.fi> on 2021/05/24 18:20:03 UTC
(Late) heads-up for new risc-v soc and board
Hi all devs,
First of all, it’s nice to be back on (public) NuttX development. It’s been a while since last time. 😊
We are doing porting for MicroChip PolarFire Risc-V SoC and Icicle evaluation board.
Basic things already works (uart and gpios) so we can boot to nsh.
First PR #3770 is already “pending”
If there is anybody who is working on this SoC please let us know so that we can combine our work forces…
But anyway, we continue with peripheral drivers; I2C already done others to follow.
This work is was made possible by TII. https://github.com/tiiuae so all PR’s are coming from there.
Br,
Janne
RE: (Late) heads-up for new risc-v soc and board
Posted by Al...@sony.com.
Nice Work!
-----Original Message-----
From: Abdelatif Guettouche <ab...@gmail.com>
Sent: den 24 maj 2021 21:39
To: dev@nuttx.apache.org
Subject: Re: (Late) heads-up for new risc-v soc and board
Nice work! Thanks for the contribution!
On Mon, May 24, 2021 at 8:34 PM Janne Rosberg <ja...@offcode.fi>
wrote:
> Hi Alan,
>
> Yes, it has FPGA “build-in” so you can do very nice processing with that.
> Also 4+1 cores running on 600+Mhz so it’s almost a supercomputer. 😊
> Let’s see what we can squeeze out of it.
> Later on hoping to get SMP config working….
>
> Janne
>
> From: Alan Carvalho de Assis <ac...@gmail.com>
> Date: Monday, 24. May 2021 at 22.13
> To: dev@nuttx.apache.org <de...@nuttx.apache.org>
> Subject: Re: (Late) heads-up for new risc-v soc and board Hi Janne,
>
> Very nice! Kudos!!!
>
> So, this SoC has FPGA integrated on it?
>
> BR,
>
> Alan
>
> On 5/24/21, Janne Rosberg <ja...@offcode.fi> wrote:
> > Hi all devs,
> >
> > First of all, it’s nice to be back on (public) NuttX development.
> > It’s
> been
> > a while since last time. 😊
> >
> > We are doing porting for MicroChip PolarFire Risc-V SoC and Icicle
> > evaluation board.
> > Basic things already works (uart and gpios) so we can boot to nsh.
> > First PR #3770 is already “pending”
> >
> > If there is anybody who is working on this SoC please let us know so
> that we
> > can combine our work forces…
> > But anyway, we continue with peripheral drivers; I2C already done
> > others
> to
> > follow.
> >
> > This work is was made possible by TII.
> > https://urldefense.com/v3/__https://github.com/tiiuae__;!!JmoZiZGBv3
> > RvKRSx!pWpWHd7coS7_nWVWDrp6nYpBdWSYzz7oHtzqJDufQjN29r4NgJ9Gv0LOrKNYj
> > 5-NHQ$ so all
> PR’s
> > are coming from there.
> >
> > Br,
> > Janne
> >
> >
>
Re: (Late) heads-up for new risc-v soc and board
Posted by Abdelatif Guettouche <ab...@gmail.com>.
Nice work! Thanks for the contribution!
On Mon, May 24, 2021 at 8:34 PM Janne Rosberg <ja...@offcode.fi>
wrote:
> Hi Alan,
>
> Yes, it has FPGA “build-in” so you can do very nice processing with that.
> Also 4+1 cores running on 600+Mhz so it’s almost a supercomputer. 😊
> Let’s see what we can squeeze out of it.
> Later on hoping to get SMP config working….
>
> Janne
>
> From: Alan Carvalho de Assis <ac...@gmail.com>
> Date: Monday, 24. May 2021 at 22.13
> To: dev@nuttx.apache.org <de...@nuttx.apache.org>
> Subject: Re: (Late) heads-up for new risc-v soc and board
> Hi Janne,
>
> Very nice! Kudos!!!
>
> So, this SoC has FPGA integrated on it?
>
> BR,
>
> Alan
>
> On 5/24/21, Janne Rosberg <ja...@offcode.fi> wrote:
> > Hi all devs,
> >
> > First of all, it’s nice to be back on (public) NuttX development. It’s
> been
> > a while since last time. 😊
> >
> > We are doing porting for MicroChip PolarFire Risc-V SoC and Icicle
> > evaluation board.
> > Basic things already works (uart and gpios) so we can boot to nsh.
> > First PR #3770 is already “pending”
> >
> > If there is anybody who is working on this SoC please let us know so
> that we
> > can combine our work forces…
> > But anyway, we continue with peripheral drivers; I2C already done others
> to
> > follow.
> >
> > This work is was made possible by TII. https://github.com/tiiuae so all
> PR’s
> > are coming from there.
> >
> > Br,
> > Janne
> >
> >
>
Re: (Late) heads-up for new risc-v soc and board
Posted by Janne Rosberg <ja...@offcode.fi>.
Hi Alan,
Yes, it has FPGA “build-in” so you can do very nice processing with that.
Also 4+1 cores running on 600+Mhz so it’s almost a supercomputer. 😊
Let’s see what we can squeeze out of it.
Later on hoping to get SMP config working….
Janne
From: Alan Carvalho de Assis <ac...@gmail.com>
Date: Monday, 24. May 2021 at 22.13
To: dev@nuttx.apache.org <de...@nuttx.apache.org>
Subject: Re: (Late) heads-up for new risc-v soc and board
Hi Janne,
Very nice! Kudos!!!
So, this SoC has FPGA integrated on it?
BR,
Alan
On 5/24/21, Janne Rosberg <ja...@offcode.fi> wrote:
> Hi all devs,
>
> First of all, it’s nice to be back on (public) NuttX development. It’s been
> a while since last time. 😊
>
> We are doing porting for MicroChip PolarFire Risc-V SoC and Icicle
> evaluation board.
> Basic things already works (uart and gpios) so we can boot to nsh.
> First PR #3770 is already “pending”
>
> If there is anybody who is working on this SoC please let us know so that we
> can combine our work forces…
> But anyway, we continue with peripheral drivers; I2C already done others to
> follow.
>
> This work is was made possible by TII. https://github.com/tiiuae so all PR’s
> are coming from there.
>
> Br,
> Janne
>
>
Re: (Late) heads-up for new risc-v soc and board
Posted by Alan Carvalho de Assis <ac...@gmail.com>.
Hi Janne,
Very nice! Kudos!!!
So, this SoC has FPGA integrated on it?
BR,
Alan
On 5/24/21, Janne Rosberg <ja...@offcode.fi> wrote:
> Hi all devs,
>
> First of all, it’s nice to be back on (public) NuttX development. It’s been
> a while since last time. 😊
>
> We are doing porting for MicroChip PolarFire Risc-V SoC and Icicle
> evaluation board.
> Basic things already works (uart and gpios) so we can boot to nsh.
> First PR #3770 is already “pending”
>
> If there is anybody who is working on this SoC please let us know so that we
> can combine our work forces…
> But anyway, we continue with peripheral drivers; I2C already done others to
> follow.
>
> This work is was made possible by TII. https://github.com/tiiuae so all PR’s
> are coming from there.
>
> Br,
> Janne
>
>