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Posted to commits@mynewt.apache.org by GitBox <gi...@apache.org> on 2021/05/17 11:32:04 UTC
[GitHub] [mynewt-core] utzig commented on a change in pull request #2596: hw/drivers/spiram: Add SPI RAM driver
utzig commented on a change in pull request #2596:
URL: https://github.com/apache/mynewt-core/pull/2596#discussion_r633451091
##########
File path: hw/drivers/ram/spiram/src/spiram.c
##########
@@ -0,0 +1,273 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#include <string.h>
+#include <assert.h>
+
+#include "os/mynewt.h"
+#include <bsp/bsp.h>
+#include <hal/hal_spi.h>
+#include <hal/hal_gpio.h>
+#include <spiram/spiram.h>
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+#include <bus/drivers/spi_common.h>
+#endif
+
+static inline void
+spiram_lock(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(OS_SCHEDULING)
+ os_mutex_pend(&dev->lock, OS_TIMEOUT_NEVER);
+#endif
+}
+
+static inline void
+spiram_unlock(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(OS_SCHEDULING)
+ os_mutex_release(&dev->lock);
+#endif
+}
+
+void
+spiram_cs_activate(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ struct bus_spi_node *node = (struct bus_spi_node *)&dev->dev;
+ hal_gpio_write(node->pin_cs, 0);
+#else
+ hal_gpio_write(dev->ss_pin, 0);
+#endif
+}
+
+void
+spiram_cs_deactivate(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ struct bus_spi_node *node = &dev->dev;
+ hal_gpio_write(node->pin_cs, 1);
+#else
+ hal_gpio_write(dev->ss_pin, 1);
+#endif
+}
+
+int
+spiram_write_enable(struct spiram_dev *dev)
+{
+ spiram_lock(dev);
+
+ if (dev->characteristics->write_enable_cmd) {
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ bus_node_simple_write((struct os_dev *)&dev->dev,
+ &dev->characteristics->write_enable_cmd, 1);
+#else
+ spiram_cs_activate(dev);
+
+ hal_spi_tx_val(dev->spi_num, dev->characteristics->write_enable_cmd);
+
+ spiram_cs_deactivate(dev);
+#endif
+ }
+
+ spiram_unlock(dev);
+
+ return 0;
+}
+
+int
+spiram_read(struct spiram_dev *dev, uint32_t addr, void *buf, uint32_t size)
+{
+ uint8_t cmd[5] = { SPIRAM_READ };
+ int i;
+ int cmd_size = 1 + dev->characteristics->address_bytes + dev->characteristics->dummy_bytes;
+
+ i = dev->characteristics->address_bytes;
+ while (i) {
+ cmd[i] = (uint8_t)addr;
+ addr >>= 8;
+ --i;
+ }
+ spiram_lock(dev);
+
+ if (size > 0) {
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ bus_node_simple_write_read_transact((struct os_dev *)&dev->dev,
+ &cmd, cmd_size, buf, size);
+#else
+ spiram_cs_activate(dev);
+
+ /* Send command + address */
+ hal_spi_txrx(dev->spi_num, cmd, NULL, cmd_size);
+ /* For security mostly, do not output random data, fill it with FF */
+ memset(buf, 0xFF, size);
+ /* Tx buf does not matter, for simplicity pass read buffer */
+ hal_spi_txrx(dev->spi_num, buf, buf, size);
+
+ spiram_cs_deactivate(dev);
+#endif
+ }
+
+ spiram_unlock(dev);
+
+ return 0;
+}
+
+int
+spiram_write(struct spiram_dev *dev, uint32_t addr, void *buf, uint32_t size)
+{
+ uint8_t cmd[4] = { SPIRAM_WRITE };
+ int rc = 0;
+ int i;
+
+ spiram_lock(dev);
+
+ if (size) {
+ i = dev->characteristics->address_bytes;
+ while (i) {
+ cmd[i] = (uint8_t)addr;
+ addr >>= 8;
+ --i;
+ }
+ spiram_write_enable(dev);
+
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ bus_node_lock((struct os_dev *)&dev->dev,
+ BUS_NODE_LOCK_DEFAULT_TIMEOUT);
+ bus_node_write((struct os_dev *)&dev->dev,
+ cmd, dev->characteristics->address_bytes + 1,
+ BUS_NODE_LOCK_DEFAULT_TIMEOUT, BUS_F_NOSTOP);
+ bus_node_simple_write((struct os_dev *)&dev->dev, buf, size);
+ bus_node_unlock((struct os_dev *)&dev->dev);
+#else
+ spiram_cs_activate(dev);
+ hal_spi_txrx(dev->spi_num, cmd, NULL, dev->characteristics->address_bytes + 1);
+ hal_spi_txrx(dev->spi_num, buf, NULL, size);
+ spiram_cs_deactivate(dev);
+#endif
+ }
+ spiram_unlock(dev);
+
+ return rc;
Review comment:
`rc` will always be `0`, so this function could as well return `void`.
##########
File path: hw/drivers/ram/spiram/src/spiram.c
##########
@@ -0,0 +1,273 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#include <string.h>
+#include <assert.h>
+
+#include "os/mynewt.h"
+#include <bsp/bsp.h>
+#include <hal/hal_spi.h>
+#include <hal/hal_gpio.h>
+#include <spiram/spiram.h>
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+#include <bus/drivers/spi_common.h>
+#endif
+
+static inline void
+spiram_lock(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(OS_SCHEDULING)
+ os_mutex_pend(&dev->lock, OS_TIMEOUT_NEVER);
+#endif
+}
+
+static inline void
+spiram_unlock(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(OS_SCHEDULING)
+ os_mutex_release(&dev->lock);
+#endif
+}
+
+void
+spiram_cs_activate(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ struct bus_spi_node *node = (struct bus_spi_node *)&dev->dev;
+ hal_gpio_write(node->pin_cs, 0);
+#else
+ hal_gpio_write(dev->ss_pin, 0);
+#endif
+}
+
+void
+spiram_cs_deactivate(struct spiram_dev *dev)
+{
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ struct bus_spi_node *node = &dev->dev;
+ hal_gpio_write(node->pin_cs, 1);
+#else
+ hal_gpio_write(dev->ss_pin, 1);
+#endif
+}
+
+int
+spiram_write_enable(struct spiram_dev *dev)
+{
+ spiram_lock(dev);
+
+ if (dev->characteristics->write_enable_cmd) {
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ bus_node_simple_write((struct os_dev *)&dev->dev,
+ &dev->characteristics->write_enable_cmd, 1);
+#else
+ spiram_cs_activate(dev);
+
+ hal_spi_tx_val(dev->spi_num, dev->characteristics->write_enable_cmd);
+
+ spiram_cs_deactivate(dev);
+#endif
+ }
+
+ spiram_unlock(dev);
+
+ return 0;
+}
+
+int
+spiram_read(struct spiram_dev *dev, uint32_t addr, void *buf, uint32_t size)
+{
+ uint8_t cmd[5] = { SPIRAM_READ };
+ int i;
+ int cmd_size = 1 + dev->characteristics->address_bytes + dev->characteristics->dummy_bytes;
+
+ i = dev->characteristics->address_bytes;
+ while (i) {
+ cmd[i] = (uint8_t)addr;
+ addr >>= 8;
+ --i;
+ }
+ spiram_lock(dev);
+
+ if (size > 0) {
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ bus_node_simple_write_read_transact((struct os_dev *)&dev->dev,
+ &cmd, cmd_size, buf, size);
+#else
+ spiram_cs_activate(dev);
+
+ /* Send command + address */
+ hal_spi_txrx(dev->spi_num, cmd, NULL, cmd_size);
+ /* For security mostly, do not output random data, fill it with FF */
+ memset(buf, 0xFF, size);
+ /* Tx buf does not matter, for simplicity pass read buffer */
+ hal_spi_txrx(dev->spi_num, buf, buf, size);
+
+ spiram_cs_deactivate(dev);
+#endif
+ }
+
+ spiram_unlock(dev);
+
+ return 0;
+}
+
+int
+spiram_write(struct spiram_dev *dev, uint32_t addr, void *buf, uint32_t size)
+{
+ uint8_t cmd[4] = { SPIRAM_WRITE };
+ int rc = 0;
+ int i;
+
+ spiram_lock(dev);
+
+ if (size) {
+ i = dev->characteristics->address_bytes;
+ while (i) {
+ cmd[i] = (uint8_t)addr;
+ addr >>= 8;
+ --i;
+ }
+ spiram_write_enable(dev);
+
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ bus_node_lock((struct os_dev *)&dev->dev,
+ BUS_NODE_LOCK_DEFAULT_TIMEOUT);
+ bus_node_write((struct os_dev *)&dev->dev,
+ cmd, dev->characteristics->address_bytes + 1,
+ BUS_NODE_LOCK_DEFAULT_TIMEOUT, BUS_F_NOSTOP);
+ bus_node_simple_write((struct os_dev *)&dev->dev, buf, size);
+ bus_node_unlock((struct os_dev *)&dev->dev);
+#else
+ spiram_cs_activate(dev);
+ hal_spi_txrx(dev->spi_num, cmd, NULL, dev->characteristics->address_bytes + 1);
+ hal_spi_txrx(dev->spi_num, buf, NULL, size);
+ spiram_cs_deactivate(dev);
+#endif
+ }
+ spiram_unlock(dev);
+
+ return rc;
+}
+
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+static void
+init_node_cb(struct bus_node *bnode, void *arg)
+{
+}
+
+int
+spiram_create_spi_dev(struct spiram_dev *dev, const char *name,
+ const struct spiram_cfg *spi_cfg)
+{
+ struct bus_node_callbacks cbs = {
+ .init = init_node_cb,
+ };
+ int rc;
+
+ bus_node_set_callbacks((struct os_dev *)dev, &cbs);
+
+ dev->characteristics = spi_cfg->characteristics;
+
+ rc = bus_spi_node_create(name, &dev->dev, &spi_cfg->node_cfg, NULL);
Review comment:
Could just use a `return` here and `rc` is not needed.
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