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Posted to commits@nuttx.apache.org by ac...@apache.org on 2020/04/04 20:35:38 UTC
[incubator-nuttx] branch pr724 updated: Check the return of
nxsem_wait_uninterruptible() This commit is for all flash/progmem drivers
under arch/.
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch pr724
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/pr724 by this push:
new fb63462 Check the return of nxsem_wait_uninterruptible() This commit is for all flash/progmem drivers under arch/.
fb63462 is described below
commit fb63462bf282f94d8f86b2770420b31edcd8c5c9
Author: Ouss4 <ab...@gmail.com>
AuthorDate: Sat Apr 4 21:28:17 2020 +0100
Check the return of nxsem_wait_uninterruptible()
This commit is for all flash/progmem drivers under arch/.
---
arch/arm/src/samv7/sam_progmem.c | 13 +++--
arch/arm/src/stm32/hardware/stm32_flash.h | 50 ++++++++++---------
arch/arm/src/stm32/stm32f10xxf30xx_flash.c | 46 +++++++++++++----
arch/arm/src/stm32/stm32f20xxf40xx_flash.c | 32 +++++++++---
arch/arm/src/stm32/stm32l15xx_flash.c | 63 +++++++++++++++++++-----
arch/arm/src/stm32f7/hardware/stm32_flash.h | 6 +--
arch/arm/src/stm32f7/stm32_flash.c | 43 +++++++++++++---
arch/arm/src/stm32h7/stm32_flash.c | 76 ++++++++++++++++++++---------
arch/arm/src/stm32l4/stm32l4_flash.c | 56 +++++++++++++++++----
arch/arm/src/stm32l4/stm32l4_flash.h | 10 ++--
10 files changed, 291 insertions(+), 104 deletions(-)
diff --git a/arch/arm/src/samv7/sam_progmem.c b/arch/arm/src/samv7/sam_progmem.c
index c26401b..719f1ef 100644
--- a/arch/arm/src/samv7/sam_progmem.c
+++ b/arch/arm/src/samv7/sam_progmem.c
@@ -187,9 +187,9 @@ static sem_t g_page_sem;
*
****************************************************************************/
-static void page_buffer_lock(void)
+static int page_buffer_lock(void)
{
- nxsem_wait_uninterruptible(&g_page_sem);
+ return nxsem_wait_uninterruptible(&g_page_sem);
}
#define page_buffer_unlock() nxsem_post(&g_page_sem)
@@ -328,7 +328,8 @@ ssize_t up_progmem_getpage(size_t address)
* cluster - cluster index
*
* Returned Value:
- * Base address of given cluster, maximum size if cluster index is not valid.
+ * Base address of given cluster, maximum size if cluster index is not
+ * valid.
*
****************************************************************************/
@@ -539,7 +540,11 @@ ssize_t up_progmem_write(size_t address, const void *buffer, size_t buflen)
/* Get exclusive access to the global page buffer */
- page_buffer_lock();
+ ret = page_buffer_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
/* Make sure that the FLASH is unlocked */
diff --git a/arch/arm/src/stm32/hardware/stm32_flash.h b/arch/arm/src/stm32/hardware/stm32_flash.h
index 75656f7..1248aab 100644
--- a/arch/arm/src/stm32/hardware/stm32_flash.h
+++ b/arch/arm/src/stm32/hardware/stm32_flash.h
@@ -61,20 +61,21 @@
# if defined(CONFIG_STM32_STM32L15XX)
# if defined(CONFIG_STM32_HIGHDENSITY)
-/* Different STM32L1xxx MCU version are now called by different 'categories' instead
- * of 'densities'. Cat.5 MCU can have up to 512KB of FLASH. STM32L1xxx also have
- * data EEPROM, up to 16KB.
+/* Different STM32L1xxx MCU version are now called by different 'categories'
+ * instead of 'densities'. Cat.5 MCU can have up to 512KB of FLASH.
+ * STM32L1xxx also have data EEPROM, up to 16KB.
*/
# define STM32_FLASH_NPAGES 2048
# define STM32_FLASH_PAGESIZE 256
# else
-/* The STM32 (< Cat.5) L15xx/L16xx can support up to 384KB of FLASH. (In reality, most
- * supported L15xx parts have no more than 128KB). The program memory block is divided
- * into 96 sectors of 4 Kbytes each, and each sector is further split up into 16 pages
- * of 256 bytes each. The sector is the write protection granularity. In total, the
- * program memory block contains 1536 pages.
+/* The STM32 (< Cat.5) L15xx/L16xx can support up to 384KB of FLASH.
+ * (In reality, most supported L15xx parts have no more than 128KB).
+ * The program memory block is divided into 96 sectors of 4 Kbytes each,
+ * and each sector is further split up into 16 pages of 256 bytes each.
+ * The sector is the write protection granularity. In total, the program
+ * memory block contains 1536 pages.
*/
# define STM32_FLASH_NPAGES 1536
@@ -325,6 +326,7 @@
#endif
/* Register Bitfield Definitions ****************************************************/
+
/* Flash Access Control Register (ACR) */
#if defined(CONFIG_STM32_STM32L15XX)
@@ -445,10 +447,10 @@
# define FLASH_CR_PSIZE_X16 (1 << FLASH_CR_PSIZE_SHIFT) /* 01 program x16 */
# define FLASH_CR_PSIZE_X32 (2 << FLASH_CR_PSIZE_SHIFT) /* 10 program x32 */
# define FLASH_CR_PSIZE_X64 (3 << FLASH_CR_PSIZE_SHIFT) /* 11 program x64 */
-# define FLASH_CR_STRT (1 << 16) /* Bit 16: Start Erase */
-# define FLASH_CR_EOPIE (1 << 24) /* Bit 24: End of operation interrupt enable */
-# define FLASH_CR_ERRIE (1 << 25) /* Bit 25: Error interrupt enable */
-# define FLASH_CR_LOCK (1 << 31) /* Bit 31: Lock */
+# define FLASH_CR_STRT (1 << 16) /* Bit 16: Start Erase */
+# define FLASH_CR_EOPIE (1 << 24) /* Bit 24: End of operation interrupt enable */
+# define FLASH_CR_ERRIE (1 << 25) /* Bit 25: Error interrupt enable */
+# define FLASH_CR_LOCK (1 << 31) /* Bit 31: Lock */
#endif
#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429)
# define FLASH_CR_MER1 (1 << 15) /* Bit 15: Mass Erase sectors 12..23 */
@@ -457,22 +459,22 @@
/* Flash Option Control Register (OPTCR) */
#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
-# define FLASH_OPTCR_OPTLOCK (1 << 0) /* Bit 0: Option lock */
-# define FLASH_OPTCR_OPTSTRT (1 << 1) /* Bit 1: Option start */
-# define FLASH_OPTCR_BORLEV_SHIFT (2) /* Bits 2-3: BOR reset Level */
+# define FLASH_OPTCR_OPTLOCK (1 << 0) /* Bit 0: Option lock */
+# define FLASH_OPTCR_OPTSTRT (1 << 1) /* Bit 1: Option start */
+# define FLASH_OPTCR_BORLEV_SHIFT (2) /* Bits 2-3: BOR reset Level */
# define FLASH_OPTCR_BORLEV_MASK (3 << FLASH_OPTCR_BORLEV_SHIFT)
# define FLASH_OPTCR_VBOR3 (0 << FLASH_OPTCR_BORLEV_SHIFT) /* 00: BOR Level 3 */
# define FLASH_OPTCR_VBOR2 (1 << FLASH_OPTCR_BORLEV_SHIFT) /* 01: BOR Level 2 */
# define FLASH_OPTCR_VBOR1 (2 << FLASH_OPTCR_BORLEV_SHIFT) /* 10: BOR Level 1 */
# define FLASH_OPTCR_VBOR0 (3 << FLASH_OPTCR_BORLEV_SHIFT) /* 11: BOR off */
-# define FLASH_OPTCR_USER_SHIFT (5) /* Bits 5-7: User option bytes */
+# define FLASH_OPTCR_USER_SHIFT (5) /* Bits 5-7: User option bytes */
# define FLASH_OPTCR_USER_MASK (7 << FLASH_OPTCR_USER_SHIFT)
-# define FLASH_OPTCR_NRST_STDBY (1 << 7) /* Bit 7: nRST_STDBY */
-# define FLASH_OPTCR_NRST_STOP (1 << 6) /* Bit 6: nRST_STOP */
-# define FLASH_OPTCR_WDG_SW (1 << 5) /* Bit 5: WDG_SW */
-# define FLASH_OPTCR_RDP_SHIFT (8) /* Bits 8-15: Read protect */
+# define FLASH_OPTCR_NRST_STDBY (1 << 7) /* Bit 7: nRST_STDBY */
+# define FLASH_OPTCR_NRST_STOP (1 << 6) /* Bit 6: nRST_STOP */
+# define FLASH_OPTCR_WDG_SW (1 << 5) /* Bit 5: WDG_SW */
+# define FLASH_OPTCR_RDP_SHIFT (8) /* Bits 8-15: Read protect */
# define FLASH_OPTCR_RDP_MASK (0xff << FLASH_OPTCR_RDP_SHIFT)
-# define FLASH_OPTCR_NWRP_SHIFT (16) /* Bits 16-27: Not write protect */
+# define FLASH_OPTCR_NWRP_SHIFT (16) /* Bits 16-27: Not write protect */
# define FLASH_OPTCR_NWRP_MASK (0xfff << FLASH_OPTCR_NWRP_SHIFT)
#endif
@@ -492,11 +494,11 @@
#endif
/************************************************************************************
- * Public Functions
+ * Public Functions Prototypes
************************************************************************************/
-void stm32_flash_lock(void);
-void stm32_flash_unlock(void);
+int stm32_flash_lock(void);
+int stm32_flash_unlock(void);
#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
int stm32_flash_writeprotect(size_t page, bool enabled);
diff --git a/arch/arm/src/stm32/stm32f10xxf30xx_flash.c b/arch/arm/src/stm32/stm32f10xxf30xx_flash.c
index 8af8e7c..c2e8681 100644
--- a/arch/arm/src/stm32/stm32f10xxf30xx_flash.c
+++ b/arch/arm/src/stm32/stm32f10xxf30xx_flash.c
@@ -94,9 +94,9 @@ static sem_t g_sem = SEM_INITIALIZER(1);
* Private Functions
************************************************************************************/
-static void sem_lock(void)
+static int sem_lock(void)
{
- nxsem_wait_uninterruptible(&g_sem);
+ return nxsem_wait_uninterruptible(&g_sem);
}
static inline void sem_unlock(void)
@@ -129,24 +129,42 @@ static void flash_lock(uintptr_t base)
* Public Functions
************************************************************************************/
-void stm32_flash_unlock(void)
+int stm32_flash_unlock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_unlock(STM32_FLASHIF_BASE);
#if defined(STM32_FLASH_DUAL_BANK)
flash_unlock(STM32_FLASHIF1_BASE);
#endif
sem_unlock();
+
+ return ret;
}
-void stm32_flash_lock(void)
+int stm32_flash_lock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_lock(STM32_FLASHIF_BASE);
#if defined(STM32_FLASH_DUAL_BANK)
flash_lock(STM32_FLASHIF1_BASE);
#endif
sem_unlock();
+
+ return ret;
}
size_t up_progmem_pagesize(size_t page)
@@ -227,6 +245,7 @@ ssize_t up_progmem_eraseblock(size_t block)
{
uintptr_t base;
size_t page_address;
+ int ret;
if (block >= STM32_FLASH_NPAGES)
{
@@ -246,7 +265,11 @@ ssize_t up_progmem_eraseblock(size_t block)
base = STM32_FLASHIF_BASE;
}
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
if ((getreg32(STM32_RCC_CR) & RCC_CR_HSION) == 0)
{
@@ -292,6 +315,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
uintptr_t base;
uint16_t *hword = (uint16_t *)buf;
size_t written = count;
+ int ret;
#if defined(STM32_FLASH_DUAL_BANK)
/* Handle paged FLASH */
@@ -320,12 +344,16 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
addr -= STM32_FLASH_BASE;
}
- if ((addr+count) > STM32_FLASH_SIZE)
+ if ((addr + count) > STM32_FLASH_SIZE)
{
return -EFAULT;
}
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
if ((getreg32(STM32_RCC_CR) & RCC_CR_HSION) == 0)
{
diff --git a/arch/arm/src/stm32/stm32f20xxf40xx_flash.c b/arch/arm/src/stm32/stm32f20xxf40xx_flash.c
index f43ff48..eafb023 100644
--- a/arch/arm/src/stm32/stm32f20xxf40xx_flash.c
+++ b/arch/arm/src/stm32/stm32f20xxf40xx_flash.c
@@ -87,9 +87,9 @@ static sem_t g_sem = SEM_INITIALIZER(1);
* Private Functions
****************************************************************************/
-static void sem_lock(void)
+static int sem_lock(void)
{
- nxsem_wait_uninterruptible(&g_sem);
+ return nxsem_wait_uninterruptible(&g_sem);
}
static inline void sem_unlock(void)
@@ -140,18 +140,36 @@ static void data_cache_enable(void)
* Public Functions
****************************************************************************/
-void stm32_flash_unlock(void)
+int stm32_flash_unlock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_unlock();
sem_unlock();
+
+ return ret;
}
-void stm32_flash_lock(void)
+int stm32_flash_lock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_lock();
sem_unlock();
+
+ return ret;
}
/****************************************************************************
@@ -383,7 +401,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
addr -= STM32_FLASH_BASE;
}
- if ((addr+count) > STM32_FLASH_SIZE)
+ if ((addr + count) > STM32_FLASH_SIZE)
{
return -EFAULT;
}
diff --git a/arch/arm/src/stm32/stm32l15xx_flash.c b/arch/arm/src/stm32/stm32l15xx_flash.c
index 672112e..e62fea0 100644
--- a/arch/arm/src/stm32/stm32l15xx_flash.c
+++ b/arch/arm/src/stm32/stm32l15xx_flash.c
@@ -97,9 +97,9 @@ static sem_t g_sem = SEM_INITIALIZER(1);
* Private Functions
************************************************************************************/
-static void sem_lock(void)
+static int sem_lock(void)
{
- nxsem_wait_uninterruptible(&g_sem);
+ return nxsem_wait_uninterruptible(&g_sem);
}
static inline void sem_unlock(void)
@@ -284,18 +284,36 @@ static ssize_t stm32_eeprom_erase_write(size_t addr, const void *buf,
* Public Functions
************************************************************************************/
-void stm32_flash_unlock(void)
+int stm32_flash_unlock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_unlock();
sem_unlock();
+
+ return ret;
}
-void stm32_flash_lock(void)
+int stm32_flash_lock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_lock();
sem_unlock();
+
+ return ret;
}
size_t stm32_eeprom_size(void)
@@ -311,13 +329,19 @@ size_t stm32_eeprom_getaddress(void)
ssize_t stm32_eeprom_write(size_t addr, const void *buf, size_t buflen)
{
ssize_t outlen;
+ int ret;
if (!buf)
{
return -EINVAL;
}
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
+
outlen = stm32_eeprom_erase_write(addr, buf, buflen);
sem_unlock();
@@ -327,8 +351,14 @@ ssize_t stm32_eeprom_write(size_t addr, const void *buf, size_t buflen)
ssize_t stm32_eeprom_erase(size_t addr, size_t eraselen)
{
ssize_t outlen;
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
- sem_lock();
outlen = stm32_eeprom_erase_write(addr, NULL, eraselen);
sem_unlock();
@@ -412,6 +442,7 @@ ssize_t up_progmem_ispageerased(size_t page)
ssize_t up_progmem_eraseblock(size_t block)
{
size_t page_address;
+ int ret;
if (block >= STM32_FLASH_NPAGES)
{
@@ -422,7 +453,12 @@ ssize_t up_progmem_eraseblock(size_t block)
/* Get flash ready and begin erasing single page */
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
+
flash_unlock();
modifyreg32(STM32_FLASH_PECR, 0, FLASH_PECR_ERASE);
@@ -479,14 +515,19 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
addr -= STM32_FLASH_BASE;
}
- if ((addr+count) > STM32_FLASH_SIZE)
+ if ((addr + count) > STM32_FLASH_SIZE)
{
return -EFAULT;
}
/* Get flash ready and begin flashing */
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
+
flash_unlock();
for (addr += STM32_FLASH_BASE; count; count -= 4, word++, addr += 4)
diff --git a/arch/arm/src/stm32f7/hardware/stm32_flash.h b/arch/arm/src/stm32f7/hardware/stm32_flash.h
index d6848be..6ad9595 100644
--- a/arch/arm/src/stm32f7/hardware/stm32_flash.h
+++ b/arch/arm/src/stm32f7/hardware/stm32_flash.h
@@ -55,11 +55,11 @@
#endif
/************************************************************************************
- * Public Functions
+ * Public Functions Prototypes
************************************************************************************/
-void stm32_flash_lock(void);
-void stm32_flash_unlock(void);
+int stm32_flash_lock(void);
+int stm32_flash_unlock(void);
int stm32_flash_writeprotect(size_t page, bool enabled);
#endif /* __ARCH_ARM_SRC_STM32F7_HARDWARE_STM32_FLASH_H */
diff --git a/arch/arm/src/stm32f7/stm32_flash.c b/arch/arm/src/stm32f7/stm32_flash.c
index d83e3fe..6268ecf 100644
--- a/arch/arm/src/stm32f7/stm32_flash.c
+++ b/arch/arm/src/stm32f7/stm32_flash.c
@@ -87,9 +87,9 @@ static void up_waste(void)
{
}
-static void sem_lock(void)
+static int sem_lock(void)
{
- nxsem_wait_uninterruptible(&g_sem);
+ return nxsem_wait_uninterruptible(&g_sem);
}
static inline void sem_unlock(void)
@@ -122,18 +122,36 @@ static void flash_lock(void)
* Public Functions
****************************************************************************/
-void stm32_flash_unlock(void)
+int stm32_flash_unlock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_unlock();
sem_unlock();
+
+ return ret;
}
void stm32_flash_lock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_lock();
sem_unlock();
+
+ return ret;
}
/****************************************************************************
@@ -314,12 +332,18 @@ ssize_t up_progmem_ispageerased(size_t page)
ssize_t up_progmem_eraseblock(size_t block)
{
+ int ret;
+
if (block >= STM32_FLASH_NPAGES)
{
return -EFAULT;
}
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
/* Get flash ready and begin erasing single block */
@@ -351,6 +375,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
uint8_t *byte = (uint8_t *)buf;
size_t written = count;
uintptr_t flash_base;
+ int ret;
/* Check for valid address range */
@@ -371,7 +396,11 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
addr -= flash_base;
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
/* Get flash ready and begin flashing */
diff --git a/arch/arm/src/stm32h7/stm32_flash.c b/arch/arm/src/stm32h7/stm32_flash.c
index c7dc127..ad600ac 100644
--- a/arch/arm/src/stm32h7/stm32_flash.c
+++ b/arch/arm/src/stm32h7/stm32_flash.c
@@ -237,9 +237,9 @@ static inline void stm32h7_flash_modifyreg32(FAR struct stm32h7_flash_priv_s
*
****************************************************************************/
-static void stm32h7_flash_sem_lock(FAR struct stm32h7_flash_priv_s *priv)
+static int stm32h7_flash_sem_lock(FAR struct stm32h7_flash_priv_s *priv)
{
- nxsem_wait_uninterruptible(&priv->sem);
+ return nxsem_wait_uninterruptible(&priv->sem);
}
/****************************************************************************
@@ -300,7 +300,8 @@ static void stm32h7_lock_flash(FAR struct stm32h7_flash_priv_s *priv)
*
****************************************************************************/
-static inline uint32_t stm32h7_flash_size(FAR struct stm32h7_flash_priv_s *priv)
+static inline uint32_t stm32h7_flash_size(
+ FAR struct stm32h7_flash_priv_s *priv)
{
return FLASH_SECTOR_SIZE * PROGMEM_NBLOCKS;
}
@@ -317,7 +318,8 @@ static inline
FAR struct stm32h7_flash_priv_s * stm32h7_flash_bank(size_t address)
{
struct stm32h7_flash_priv_s *priv = &stm32h7_flash_bank1_priv;
- if (address < priv->base || address >= priv->base + stm32h7_flash_size(priv))
+ if (address < priv->base || address >=
+ priv->base + stm32h7_flash_size(priv))
{
return NULL;
}
@@ -346,12 +348,15 @@ static void stm32h7_unlock_flashopt(FAR struct stm32h7_flash_priv_s *priv)
{
}
- if (stm32h7_flash_getreg32(priv, STM32_FLASH_OPTCR_OFFSET) & FLASH_OPTCR_OPTLOCK)
+ if (stm32h7_flash_getreg32(priv, STM32_FLASH_OPTCR_OFFSET) &
+ FLASH_OPTCR_OPTLOCK)
{
/* Unlock sequence */
- stm32h7_flash_putreg32(priv, STM32_FLASH_OPTKEYR_OFFSET, FLASH_OPTKEY1);
- stm32h7_flash_putreg32(priv, STM32_FLASH_OPTKEYR_OFFSET, FLASH_OPTKEY2);
+ stm32h7_flash_putreg32(priv, STM32_FLASH_OPTKEYR_OFFSET,
+ FLASH_OPTKEY1);
+ stm32h7_flash_putreg32(priv, STM32_FLASH_OPTKEYR_OFFSET,
+ FLASH_OPTKEY2);
}
}
@@ -365,7 +370,8 @@ static void stm32h7_unlock_flashopt(FAR struct stm32h7_flash_priv_s *priv)
static void stm32h7_lock_flashopt(FAR struct stm32h7_flash_priv_s *priv)
{
- stm32h7_flash_modifyreg32(priv, STM32_FLASH_OPTCR_OFFSET, 0, FLASH_OPTCR_OPTLOCK);
+ stm32h7_flash_modifyreg32(priv, STM32_FLASH_OPTCR_OFFSET, 0,
+ FLASH_OPTCR_OPTLOCK);
}
/****************************************************************************
@@ -418,18 +424,22 @@ static void stm32h7_save_flashopt(FAR struct stm32h7_flash_priv_s *priv)
int stm32h7_flash_unlock(size_t addr)
{
- int rv = -ENODEV;
+ int ret = -ENODEV;
struct stm32h7_flash_priv_s *priv = stm32h7_flash_bank(addr);
if (priv)
{
- rv = OK;
- stm32h7_flash_sem_lock(priv);
+ ret = stm32h7_flash_sem_lock(priv);
+ if (ret < 0)
+ {
+ return ret;
+ }
+
stm32h7_unlock_flash(priv);
stm32h7_flash_sem_unlock(priv);
}
- return rv;
+ return ret:;
}
/****************************************************************************
@@ -442,18 +452,22 @@ int stm32h7_flash_unlock(size_t addr)
int stm32h7_flash_lock(size_t addr)
{
- int rv = -ENODEV;
+ int ret = -ENODEV;
struct stm32h7_flash_priv_s *priv = stm32h7_flash_bank(addr);
if (priv)
{
- rv = OK;
- stm32h7_flash_sem_lock(priv);
+ ret = stm32h7_flash_sem_lock(priv);
+ if (ret < 0)
+ {
+ return ret;
+ }
+
stm32h7_lock_flash(priv);
stm32h7_flash_sem_unlock(priv);
}
- return rv;
+ return ret;
}
/****************************************************************************
@@ -532,7 +546,8 @@ void stm32h7_flash_optmodify(uint32_t clear, uint32_t set)
if (priv)
{
stm32h7_unlock_flashopt(priv);
- stm32h7_flash_modifyreg32(priv, STM32_FLASH_OPTSR_PRG_OFFSET, clear, set);
+ stm32h7_flash_modifyreg32(priv, STM32_FLASH_OPTSR_PRG_OFFSET,
+ clear, set);
stm32h7_save_flashopt(priv);
}
}
@@ -629,6 +644,7 @@ ssize_t up_progmem_ispageerased(size_t page)
ssize_t up_progmem_eraseblock(size_t block)
{
struct stm32h7_flash_priv_s *priv;
+ int ret;
if (block >= PROGMEM_NBLOCKS)
{
@@ -637,7 +653,11 @@ ssize_t up_progmem_eraseblock(size_t block)
priv = stm32h7_flash_bank(STM32_FLASH_BANK1 + (block * FLASH_SECTOR_SIZE));
- stm32h7_flash_sem_lock(priv);
+ ret = stm32h7_flash_sem_lock(priv);
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
/* Get flash ready and begin erasing single block */
@@ -686,6 +706,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
const size_t llperblock = blocksize / sizeof(uint64_t);
size_t bcount = count / blocksize;
size_t remaining = count % blocksize;
+ int ret;
priv = stm32h7_flash_bank(addr);
@@ -702,7 +723,11 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
return -EFAULT;
}
- stm32h7_flash_sem_lock(priv);
+ ret = stm32h7_flash_sem_lock(priv);
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
/* Get flash ready and begin flashing */
@@ -710,8 +735,8 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
stm32h7_flash_modifyreg32(priv, STM32_FLASH_CR1_OFFSET, 0, FLASH_CR_PG);
- stm32h7_flash_modifyreg32(priv, STM32_FLASH_CR1_OFFSET, FLASH_CR_PSIZE_MASK,
- FLASH_CR_PSIZE_X64);
+ stm32h7_flash_modifyreg32(priv, STM32_FLASH_CR1_OFFSET,
+ FLASH_CR_PSIZE_MASK, FLASH_CR_PSIZE_X64);
ARM_DSB();
ARM_ISB();
@@ -744,7 +769,8 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
/* Verify */
- if (stm32h7_flash_getreg32(priv, STM32_FLASH_SR1_OFFSET) & FLASH_CR_SER)
+ if (stm32h7_flash_getreg32(priv, STM32_FLASH_SR1_OFFSET) &
+ FLASH_CR_SER)
{
written = -EROFS;
break;
@@ -785,7 +811,8 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
/* Force the fractional write */
- stm32h7_flash_modifyreg32(priv, STM32_FLASH_CR1_OFFSET, 0, FLASH_CR_FW);
+ stm32h7_flash_modifyreg32(priv, STM32_FLASH_CR1_OFFSET, 0,
+ FLASH_CR_FW);
ARM_DSB();
ARM_ISB();
@@ -802,7 +829,8 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
/* Verify */
- if (stm32h7_flash_getreg32(priv, STM32_FLASH_SR1_OFFSET) & FLASH_CR_SER)
+ if (stm32h7_flash_getreg32(priv, STM32_FLASH_SR1_OFFSET) &
+ FLASH_CR_SER)
{
written = -EROFS;
}
diff --git a/arch/arm/src/stm32l4/stm32l4_flash.c b/arch/arm/src/stm32l4/stm32l4_flash.c
index fc4488a..805fbc7 100644
--- a/arch/arm/src/stm32l4/stm32l4_flash.c
+++ b/arch/arm/src/stm32l4/stm32l4_flash.c
@@ -118,9 +118,9 @@ static uint32_t g_page_buffer[FLASH_PAGE_WORDS];
* Private Functions
****************************************************************************/
-static inline void sem_lock(void)
+static inline int sem_lock(void)
{
- nxsem_wait_uninterruptible(&g_sem);
+ return nxsem_wait_uninterruptible(&g_sem);
}
static inline void sem_unlock(void)
@@ -176,7 +176,8 @@ static inline void flash_erase(size_t page)
finfo("erase page %u\n", page);
modifyreg32(STM32L4_FLASH_CR, 0, FLASH_CR_PAGE_ERASE);
- modifyreg32(STM32L4_FLASH_CR, FLASH_CR_PNB_MASK, FLASH_CR_PNB(page & 0xff));
+ modifyreg32(STM32L4_FLASH_CR, FLASH_CR_PNB_MASK,
+ FLASH_CR_PNB(page & 0xff));
#if defined(CONFIG_STM32L4_STM32L4X5) || \
defined(CONFIG_STM32L4_STM32L4X6) || \
@@ -223,18 +224,36 @@ static void data_cache_enable(void)
* Public Functions
****************************************************************************/
-void stm32l4_flash_unlock(void)
+int stm32l4_flash_unlock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_unlock();
sem_unlock();
+
+ return ret;
}
-void stm32l4_flash_lock(void)
+int stm32l4_flash_lock(void)
{
- sem_lock();
+ int ret;
+
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return ret;
+ }
+
flash_lock();
sem_unlock();
+
+ return ret;
}
/****************************************************************************
@@ -257,6 +276,7 @@ void stm32l4_flash_lock(void)
uint32_t stm32l4_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
{
uint32_t regval;
+ int ret;
/* To avoid accidents, do not allow setting RDP via this function.
* Remove these asserts if want to enable changing the protection level.
@@ -266,7 +286,12 @@ uint32_t stm32l4_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
DEBUGASSERT((clrbits & FLASH_OPTCR_RDP_MASK) == 0);
DEBUGASSERT((setbits & FLASH_OPTCR_RDP_MASK) == 0);
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return 0;
+ }
+
flash_optbytes_unlock();
/* Modify Option Bytes in register. */
@@ -342,6 +367,8 @@ bool up_progmem_isuniform(void)
ssize_t up_progmem_eraseblock(size_t block)
{
+ int ret;
+
if (block >= STM32L4_FLASH_NPAGES)
{
return -EFAULT;
@@ -349,7 +376,12 @@ ssize_t up_progmem_eraseblock(size_t block)
/* Erase single block */
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
+
flash_unlock();
flash_erase(block);
@@ -429,7 +461,11 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t buflen)
dest = (uint32_t *)((uint8_t *)addr - offset);
written = 0;
- sem_lock();
+ ret = sem_lock();
+ if (ret < 0)
+ {
+ return (ssize_t)ret;
+ }
/* Get flash ready and begin flashing. */
diff --git a/arch/arm/src/stm32l4/stm32l4_flash.h b/arch/arm/src/stm32l4/stm32l4_flash.h
index b33c287..adce92f 100644
--- a/arch/arm/src/stm32l4/stm32l4_flash.h
+++ b/arch/arm/src/stm32l4/stm32l4_flash.h
@@ -46,13 +46,13 @@
#include "hardware/stm32l4_flash.h"
/************************************************************************************
- * Public Functions
+ * Public Functions Prototypes
************************************************************************************/
-void stm32l4_flash_lock(void);
-void stm32l4_flash_unlock(void);
+int stm32l4_flash_lock(void);
+int stm32l4_flash_unlock(void);
-/****************************************************************************
+/************************************************************************************
* Name: stm32l4_flash_user_optbytes
*
* Description:
@@ -67,7 +67,7 @@ void stm32l4_flash_unlock(void);
* Returned Value:
* Option bytes after operation is completed
*
- ****************************************************************************/
+ ************************************************************************************/
uint32_t stm32l4_flash_user_optbytes(uint32_t clrbits, uint32_t setbits);